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1.1.1.2 ! root 1: ! $Id: m68k-iset.txt,v 1.5 2003/10/25 17:08:01 fredette Exp $ 1.1 root 2: 1.1.1.2 ! root 3: ! ic/m68k/m68k-iset.txt: the m68k instruction set ! 4: ! 5: ! Copyright (c) 2002, 2003 Matt Fredette ! 6: ! All rights reserved. ! 7: ! ! 8: ! Redistribution and use in source and binary forms, with or without ! 9: ! modification, are permitted provided that the following conditions ! 10: ! are met: ! 11: ! 1. Redistributions of source code must retain the above copyright ! 12: ! notice, this list of conditions and the following disclaimer. ! 13: ! 2. Redistributions in binary form must reproduce the above copyright ! 14: ! notice, this list of conditions and the following disclaimer in the ! 15: ! documentation and/or other materials provided with the distribution. ! 16: ! 3. All advertising materials mentioning features or use of this software ! 17: ! must display the following acknowledgement: ! 18: ! This product includes software developed by Matt Fredette. ! 19: ! 4. The name of the author may not be used to endorse or promote products ! 20: ! derived from this software without specific prior written permission. ! 21: ! ! 22: ! THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR ! 23: ! IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED ! 24: ! WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE ! 25: ! DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, ! 26: ! INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ! 27: ! (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ! 28: ! SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) ! 29: ! HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, ! 30: ! STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ! 31: ! ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ! 32: ! POSSIBILITY OF SUCH DAMAGE. 1.1 root 33: 34: ! load some common EA categories: 35: eax-cat all ro yyyyyyyyyyyynnn 36: eax-cat data ro ynyyyyyyyyyynnn 37: eax-cat datalt rw ynyyyyyyynnnnnn ! example: andi pp 122 38: eax-cat memalt rw nnyyyyyyynnnnnn 39: eax-cat control un nnynnyyyyyynnnn 40: 41: 0000 0000 0011 1100 ori_ccr #8 ! ori_ccr pp 258 42: 0000 0000 0111 1100 ori_sr #16 ! ori_sr pp 480 43: 0000 0000 ssxx xxxx or.s #s, xs/datalt ! ori pp 256 44: 45: 0000 0010 0011 1100 andi_ccr #8 ! andi_ccr pp 123 46: 0000 0010 0111 1100 andi_sr #16 ! andi_sr pp 455 47: 0000 0010 ssxx xxxx and.s #s, xs/datalt ! andi pp 121 48: 49: 0000 0100 ssxx xxxx sub.s #s, xs/datalt ! subi pp 282 50: 51: .if m68020 52: 0000 0110 1100 0ddd rtm %d.32 ! rtm pp 270 53: 0000 0110 1100 1aaa rtm %a.32 ! rtm pp 270 54: 0000 0110 11xx xxxx callm #8, x0/control ! callm pp 167 55: .endif 56: 57: 0000 0110 ssxx xxxx add.s #s, xs/datalt ! addi pp 112 58: 59: .if m68020 || m68030 60: specop specop16 cmp2_chk2 61: 0000 0ss0 11xx xxxx cmp2_chk2 X, x0/control ! chk2 pp 174, cmp2 pp 185 62: specop specop16 cas 63: 0000 1SS0 11xx xxxx cas.S X, x0/memalt/un ! cas pp 169 64: specop cas2 cas2 65: 0000 1100 1111 1100 cas2_16 ! cas2 pp 169 66: 0000 1110 1111 1100 cas2_32 ! cas2 pp 169 67: .endif 68: 69: 0000 1010 0011 1100 eori_ccr #8 ! eori_ccr pp 207 70: 0000 1010 0111 1100 eori_sr #16 ! eori_sr pp 463 71: 0000 1010 ssxx xxxx eor.s #s, xs/datalt ! eori pp 205 72: 73: ! cmpi addressing modes are unusual. per pp 183, immediate is 74: ! never allowed, and on the 000 and 010, PC-relative addressing 75: ! modes are not allowed: 76: .if m68000 || m68010 77: eax-cat cmpi ro ynyyyyyyynnnnnn 78: .endif 79: .if m68020 || m68030 80: eax-cat cmpi ro ynyyyyyyyyynnnn 81: .endif 82: 0000 1100 ssxx xxxx cmp.s #s, xs/cmpi ! cmpi pp 182 83: 84: eax-cat bitro ro nnyyyyyyyyyynnn 85: eax-cat bitrw rw nnyyyyyyynnnnnn 86: 0000 1000 0000 0ddd btst32 #8, %d.32 ! btst pp 164 87: 0000 1000 00xx xxxx btst8 #8, x8/bitro ! btst pp 164 88: 0000 1000 0100 0ddd bchg32 #8, %d.32 ! bchg pp 130 89: 0000 1000 01xx xxxx bchg8 #8, x8/bitrw ! bchg pp 130 90: 0000 1000 1000 0ddd bclr32 #8, %d.32 ! bclr pp 133 91: 0000 1000 10xx xxxx bclr8 #8, x8/bitrw ! bclr pp 133 92: 0000 1000 1100 0ddd bset32 #8, %d.32 ! bset pp 159 93: 0000 1000 11xx xxxx bset8 #8, x8/bitrw ! bset pp 159 94: 95: .if m68010 || m68020 || m68030 96: ! the moves specop handling forces the right EA cycles: 97: specop moves moves.s 98: 0000 1110 ssxx xxxx moves.s X, xs/memalt ! moves pp 477 99: .endif 100: 101: 0000 ddd1 0000 0DDD btst32 %d.8, %D.32 ! btst pp 164 102: 0000 ddd1 00xx xxxx btst8 %d.8, x8/bitro ! btst pp 164 103: 0000 ddd1 0100 0DDD bchg32 %d.8, %D.32 ! bchg pp 130 104: 0000 ddd1 01xx xxxx bchg8 %d.8, x8/bitrw ! bchg pp 130 105: 0000 ddd1 1000 0DDD bclr32 %d.8, %D.32 ! bclr pp 133 106: 0000 ddd1 10xx xxxx bclr8 %d.8, x8/bitrw ! bclr pp 133 107: 0000 ddd1 1100 0DDD bset32 %d.8, %D.32 ! bset pp 159 108: 0000 ddd1 11xx xxxx bset8 %d.8, x8/bitrw ! bset pp 159 109: 110: ! we don't decode the data register field, to allow for better EA 111: ! submap reuse, and this is a rare function anyways: 112: 0000 ddd1 0000 1aaa movep_mr16 X, %a.32 ! movep pp 234 113: 0000 ddd1 0100 1aaa movep_mr32 X, %a.32 ! movep pp 234 114: 0000 ddd1 1000 1aaa movep_rm16 X, %a.32 ! movep pp 234 115: 0000 ddd1 1100 1aaa movep_rm32 X, %a.32 ! movep pp 234 116: 117: 0010 aaa0 01xx xxxx movea32 %a.32, x32/all ! movea pp 222 118: 0011 aaa0 01xx xxxx movea16 %a.32, x16/all ! movea pp 222 119: 120: 00SS yyyy yyxx xxxx move.S yS/datalt/wo, xS/all ! move pp 219 121: 122: ! move_from_sr isn't privileged on the 68000: 123: .if m68000 124: 0100 0000 11xx xxxx move_from_sr0 X, x16/datalt ! move_from_sr pp 228 125: .endif 126: .if m68010 || m68020 || m68030 127: 0100 0000 11xx xxxx move_from_sr X, x16/datalt/wo ! move_from_sr pp 470 128: 0100 0010 11xx xxxx move_from_ccr X, x16/datalt/wo ! move_from_ccr pp 224 129: .endif 130: 131: 0100 0000 ssxx xxxx negx.s X, xs/datalt ! negx pp 249 132: 133: ! the EA is read before it is written on on the 68000, pp 177 134: .if m68000 135: 0100 0010 ssxx xxxx clr.s X, xs/datalt ! clr pp 176 136: .endif 137: .if m68010 || m68020 || m68030 138: 0100 0010 ssxx xxxx clr.s X, xs/datalt/wo ! clr pp 176 139: .endif 140: 141: 0100 0100 11xx xxxx move_to_ccr X, x16/data ! move_to_ccr pp 226 142: 143: 0100 0100 ssxx xxxx neg.s X, xs/datalt ! neg pp 246 144: 145: 0100 0110 11xx xxxx move_to_sr X, x16/data ! move_to_sr pp 472 146: 147: 0100 0110 ssxx xxxx not.s X, xs/datalt ! not pp 251 148: 149: 0100 1000 1000 0ddd extw X, %d.16 ! ext pp 209 150: 0100 1000 1100 0ddd extl X, %d.32 ! ext pp 209 151: .if m68020 || m68030 152: 0100 1001 1100 0ddd extbl X, %d.32 ! ext pp 209 153: .endif 154: 155: .if m68020 || m68030 156: 0100 1000 0000 1aaa link #32, %a.32 ! link pp 214 157: .endif 158: 159: 0100 1000 00xx xxxx nbcd X, x8/datalt ! nbcd pp 244 160: 161: 0100 1000 0100 0ddd swap X, %d.32 ! swap pp 288 162: 163: .if m68010 || m68020 || m68030 164: 0100 1000 0100 1??? bkpt ! bkpt pp 157 165: .endif 166: 167: 0100 1000 01xx xxxx pea X, x0/control ! pea pp 262 168: 169: specop illegal illegal 170: 0100 1010 1111 1100 illegal ! illegal pp 210 171: 172: 0100 1010 1100 0ddd tas_r X, %d.8 ! tas pp 289 173: 0100 1010 11xx xxxx tas X, x0/memalt/un ! tas pp 289 174: 175: ! tst addressing modes are unusual. per pp 296, on the 68000 176: ! and 68010, PC-relative addressing modes and immediates are not 177: ! allowed: 178: .if m68000 || m68010 179: eax-cat tst ro ynyyyyyyynnnnnn 180: 0100 1010 ssxx xxxx tst.s X, xs/tst ! tst pp 295 181: .endif 182: .if m68020 || m68030 183: 0100 1010 ssxx xxxx tst.s X, xs/all ! tst pp 295 184: .endif 185: 186: .if m68020 || m68030 187: specop mulul mulul 188: specop divul divul 189: 0100 1100 00xx xxxx mulul X, x32/data ! mulsl pp 238, mulul pp 241 190: 0100 1100 01xx xxxx divul X, x32/data ! divsl pp 195, divul pp 199 191: .endif 192: 193: 0100 1110 0100 ???? trap ! trap pp 291 194: 195: 0100 1110 0101 0aaa link #16S32, %a.32 ! link pp 214 196: 197: 0100 1110 0101 1aaa unlk %a.32 ! unlk pp 297 198: 199: 0100 1110 0110 ?aaa move_usp X, %a.32 ! move_usp pp 474 200: 201: 0100 1110 0111 0000 reset ! reset pp 536 202: 203: 0100 1110 0111 0001 nop ! nop pp 250 204: 205: specop specop16 stop 206: 0100 1110 0111 0010 stop ! stop pp 538 207: 208: 0100 1110 0111 0011 rte ! rte pp 537 209: 210: .if m68010 || m68020 || m68030 211: 0100 1110 0111 0100 rtd #16S32 ! rtd pp 269 212: .endif 213: 214: 0100 1110 0111 0101 rts ! rts pp 272 215: 216: 0100 1110 0111 0110 trapv ! trapv pp 294 217: 218: 0100 1110 0111 0111 rtr ! rtr pp 271 219: 220: .if m68010 || m68020 || m68030 221: specop specop16 movec 222: 0100 1110 0111 101? movec ! movec pp 475 223: .endif 224: 225: 0100 1110 10xx xxxx jsr X, x0/control ! jsr pp 212 226: 0100 1110 11xx xxxx jmp X, x0/control ! jmp pp 211 227: 228: eax-cat movem_rm un nnynyyyyynnnnnn 229: eax-cat movem_mr un nnyynyyyyyynnnn 230: specop specop16 movem_rm.s movem_mr.s 231: 0100 1000 10xx xxxx movem_rm16 X, x0/movem_rm ! movem pp 231 232: 0100 1000 11xx xxxx movem_rm32 X, x0/movem_rm ! movem pp 231 233: 0100 1100 10xx xxxx movem_mr16 X, x0/movem_mr ! movem pp 231 234: 0100 1100 11xx xxxx movem_mr32 X, x0/movem_mr ! movem pp 231 235: 236: 0100 aaa1 11xx xxxx lea %a.32, x0/control ! lea pp 213 237: 238: 0100 ddd1 00xx xxxx chk32 %d.32, x32/data ! chk pp 173 239: 0100 ddd1 10xx xxxx chk16 %d.16, x16/data ! chk pp 173 240: 241: eax-cat alterable rw ynyyyyyyynnnnnn 242: 0101 qqq0 ss00 1aaa adda32 #q.32, %a.32 ! addq pp 114 243: 0101 qqq0 ssxx xxxx add.s #q.s, xs/alterable ! addq pp 114 244: 0101 qqq1 ss00 1aaa suba32 #q.32, %a.32 ! subq pp 284 245: 0101 qqq1 ssxx xxxx sub.s #q.s, xs/alterable ! subq pp 284 246: 247: 0101 cccc 1100 1ddd dbcc %d.16, #16 ! dbcc pp 193 248: 249: .if m68020 || m68030 250: 0101 cccc 1111 1010 trapcc #16 ! trapcc pp 292 251: 0101 cccc 1111 1011 trapcc #32 ! trapcc pp 292 252: 0101 cccc 1111 1100 trapcc ! trapcc pp 292 253: .endif 254: 255: 0101 cccc 11xx xxxx scc X, x8/datalt ! scc pp 275 256: 257: ! bcc pp 128, bra pp 158, bsr pp 162 258: specop bcc bcc 259: 0110 cccc ???? ???? bcc 260: 261: 0111 ddd0 ???? ???? moveq32 X, %d.32 ! moveq pp 237 262: 263: 1000 ddd0 11xx xxxx divu #d, x16/data ! divu pp 199 264: 265: 1000 ???1 0000 ???? sbcd ! sbcd pp 273 266: .if m68020 || m68030 267: specop specop16 pack unpk 268: 1000 ???1 0100 ???? pack ! pack pp 259 269: 1000 ???1 1000 ???? unpk ! unpk pp 298 270: .endif 271: 272: 1000 ddd1 11xx xxxx divs #d, x16/data ! divs pp 195 273: 274: 1000 ddd0 ssxx xxxx or.s xs/data, %d.s ! or pp 253 275: 1000 ddd1 ssxx xxxx or.s %d.s, xs/memalt ! or pp 253 276: 277: 1001 ???1 ss00 ???? subx.s ! subx pp 286 278: 279: 1001 ddd0 ssxx xxxx sub.s xs/all, %d.s ! sub pp 277 280: 1001 ddd1 ssxx xxxx sub.s %d.s, xs/memalt ! sub pp 277 281: 1001 aaa0 11xx xxxx suba16 x16/all, %a.32 ! suba pp 280 282: 1001 aaa1 11xx xxxx suba32 x32/all, %a.32 ! suba pp 280 283: 284: 1011 ???1 ss00 1??? cmpm.s ! cmpm pp 184 285: 286: 1011 ddd0 ssxx xxxx cmp.s xs/all, %d.s ! cmp pp 178 287: 1011 ddd1 ssxx xxxx eor.s %d.s, xs/datalt ! eor pp 203 288: 1011 aaa0 11xx xxxx cmpa16 x16/all, %a.32 ! cmpa pp 180 289: 1011 aaa1 11xx xxxx cmp32 x32/all, %a.32 ! cmpa pp 180 290: 291: 1100 ddd0 11xx xxxx mulu #d, x16/data ! mulu pp 241 292: 293: 1100 ???1 0000 ???? abcd ! abcd pp 105 294: 295: 1100 ddd1 11xx xxxx muls #d, x16/data ! muls pp 238 296: 297: 1100 ddd1 0100 0DDD exg %d.32, %D.32 ! exg pp 208 298: 1100 aaa1 0100 1AAA exg %a.32, %A.32 ! exg pp 208 299: 1100 ddd1 1000 1aaa exg %d.32, %a.32 ! exg pp 208 300: 301: 1100 ddd0 ssxx xxxx and.s xs/data, %d.s ! and pp 118 302: 1100 ddd1 ssxx xxxx and.s %d.s, xs/memalt ! and pp 118 303: 304: 1101 ???1 ss00 ???? addx.s ! addx pp 116 305: 306: 1101 ddd0 ssxx xxxx add.s xs/all, %d.s ! add pp 107 307: 1101 ddd1 ssxx xxxx add.s %d.s, xs/memalt ! add pp 107 308: 1101 aaa0 11xx xxxx adda16 x16/all, %a.32 ! adda pp 110 309: 1101 aaa1 11xx xxxx adda32 x32/all, %a.32 ! adda pp 110 310: 311: 1110 0000 11xx xxxx asr16 #1.8, x16/memalt ! asr pp 124 312: 1110 0001 11xx xxxx asl16 #1.8, x16/memalt ! asl pp 124 313: 314: 1110 0010 11xx xxxx lsr16 #1.8, x16/memalt ! lsr pp 216 315: 1110 0011 11xx xxxx lsl16 #1.8, x16/memalt ! lsl pp 216 316: 317: 1110 0100 11xx xxxx roxr16 #1.8, x16/memalt ! roxr pp 263 318: 1110 0101 11xx xxxx roxl16 #1.8, x16/memalt ! roxl pp 263 319: 320: 1110 0110 11xx xxxx ror16 #1.8, x16/memalt ! ror pp 263 321: 1110 0111 11xx xxxx rol16 #1.8, x16/memalt ! rol pp 263 322: 323: .if m68020 || m68030 324: eax-cat bitfieldro un nnynnyyyyyynnnn 325: eax-cat bitfieldrw un nnynnyyyynnnnnn 326: specop specop16 bftst bfextu bfchg bfexts bfclr bfffo bfset bfins 327: 1110 1000 1100 0ddd bftst ! bftst pp 154 328: 1110 1000 11xx xxxx bftst X, x0/bitfieldro ! bftst pp 154 329: 1110 1001 1100 0ddd bfextu ! bfextu pp 143 330: 1110 1001 11xx xxxx bfextu X, x0/bitfieldro ! bfextu pp 143 331: 1110 1010 1100 0ddd bfchg ! bfchg pp 137 332: 1110 1010 11xx xxxx bfchg X, x0/bitfieldrw ! bfchg pp 137 333: 1110 1011 1100 0ddd bfexts ! bfexts pp 141 334: 1110 1011 11xx xxxx bfexts X, x0/bitfieldro ! bfexts pp 141 335: 1110 1100 1100 0ddd bfclr ! bfclr pp 138 336: 1110 1100 11xx xxxx bfclr X, x0/bitfieldrw ! bfclr pp 138 337: 1110 1101 1100 0ddd bfffo ! bfffo pp 146 338: 1110 1101 11xx xxxx bfffo X, x0/bitfieldro ! bfffo pp 146 339: 1110 1110 1100 0ddd bfset ! bfset pp 152 340: 1110 1110 11xx xxxx bfset X, x0/bitfieldrw ! bfset pp 152 341: 1110 1111 1100 0ddd bfins ! bfins pp 149 342: 1110 1111 11xx xxxx bfins X, x0/bitfieldrw ! bfins pp 149 343: .endif 344: 345: 1110 qqq0 ss00 0ddd asr.s #q.8, %d.s ! asr pp 124 346: 1110 DDD0 ss10 0ddd asr.s %D.8, %d.s ! asr pp 124 347: 1110 qqq1 ss00 0ddd asl.s #q.8, %d.s ! asl pp 124 348: 1110 DDD1 ss10 0ddd asl.s %D.8, %d.s ! asl pp 124 349: 350: 1110 qqq0 ss00 1ddd lsr.s #q.8, %d.s ! lsr pp 216 351: 1110 DDD0 ss10 1ddd lsr.s %D.8, %d.s ! lsr pp 216 352: 1110 qqq1 ss00 1ddd lsl.s #q.8, %d.s ! lsl pp 216 353: 1110 DDD1 ss10 1ddd lsl.s %D.8, %d.s ! lsl pp 216 354: 355: 1110 qqq0 ss01 0ddd roxr.s #q.8, %d.s ! roxr pp 263 356: 1110 DDD0 ss11 0ddd roxr.s %D.8, %d.s ! roxr pp 263 357: 1110 qqq1 ss01 0ddd roxl.s #q.8, %d.s ! roxl pp 263 358: 1110 DDD1 ss11 0ddd roxl.s %D.8, %d.s ! roxl pp 263 359: 360: 1110 qqq0 ss01 1ddd ror.s #q.8, %d.s ! ror pp 263 361: 1110 DDD0 ss11 1ddd ror.s %D.8, %d.s ! ror pp 263 362: 1110 qqq1 ss01 1ddd rol.s #q.8, %d.s ! rol pp 263 363: 1110 DDD1 ss11 1ddd rol.s %D.8, %d.s ! rol pp 263
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