![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to sparc-misc-auto.sh CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [The Machine Emulator] / tme / ic / sparc|
Return to sparc-misc-auto.sh CVS log | Up to [The Machine Emulator] / tme / ic / sparc |
1.1 root 1: #! /bin/sh
2:
3: # $Id: sparc-misc-auto.sh,v 1.2 2007/02/12 23:49:21 fredette Exp $
4:
5: # ic/sparc/sparc-misc-auto.sh - automatically generates C code
6: # for miscellaneous SPARC emulation support:
7:
8: #
9: # Copyright (c) 2005 Matt Fredette
10: # All rights reserved.
11: #
12: # Redistribution and use in source and binary forms, with or without
13: # modification, are permitted provided that the following conditions
14: # are met:
15: # 1. Redistributions of source code must retain the above copyright
16: # notice, this list of conditions and the following disclaimer.
17: # 2. Redistributions in binary form must reproduce the above copyright
18: # notice, this list of conditions and the following disclaimer in the
19: # documentation and/or other materials provided with the distribution.
20: # 3. All advertising materials mentioning features or use of this software
21: # must display the following acknowledgement:
22: # This product includes software developed by Matt Fredette.
23: # 4. The name of the author may not be used to endorse or promote products
24: # derived from this software without specific prior written permission.
25: #
26: # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
27: # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28: # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29: # DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
30: # INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31: # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32: # SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33: # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
34: # STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
35: # ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: # POSSIBILITY OF SUCH DAMAGE.
37: #
38:
39: header=false
40:
41: for option
42: do
43: case $option in
44: --header) header=true ;;
45: esac
46: done
47:
48: PROG=`basename $0`
49: cat <<EOF
50: /* automatically generated by $PROG, do not edit! */
51: EOF
52:
53: # emit the register mapping macros:
54: if $header; then
55:
56: echo ""
57: echo "/* the register mapping: */"
58: echo "#define TME_SPARC_IREG_UNDEF (-1)"
59: ireg_next=0
60:
61: # all integer registers start from register number zero:
62: #
63: for regnum in 0 1 2 3 4 5 6 7; do
64: echo "#define TME_SPARC_IREG_G${regnum} (${ireg_next})"
65: ireg_next=`expr ${ireg_next} + 1`
66: done
67:
68: # all other registers start after the last register in the last
69: # possible register window, plus the eight sparc64 alternate
70: # globals:
71: #
72: ireg_base='((TME_SPARC_WINDOWS_MAX * 16) + 8)'
73:
74: # the current, next, and next-next program counter:
75: #
76: echo "#define TME_SPARC_IREG_PC (${ireg_base} + ${ireg_next})"
77: ireg_next=`expr ${ireg_next} + 1`
78: echo "#define TME_SPARC_IREG_PC_NEXT (${ireg_base} + ${ireg_next})"
79: ireg_next=`expr ${ireg_next} + 1`
80: echo "#define TME_SPARC_IREG_PC_NEXT_NEXT (${ireg_base} + ${ireg_next})"
81: ireg_next=`expr ${ireg_next} + 1`
82:
83: # the immediate register:
84: #
85: echo "#define TME_SPARC_IREG_IMM (${ireg_base} + ${ireg_next})"
86: ireg_next=`expr ${ireg_next} + 3`
87:
88: # the Y multiply/divide register:
89: #
90: echo "#define TME_SPARC_IREG_Y (${ireg_base} + ${ireg_next})"
91: ireg_next=`expr ${ireg_next} + 1`
92:
93: # the floating-point transfer registers. since these are often
94: # treated as 32-bit parts used to transfer 64- and 128-bit values,
95: # this block of registers must be aligned to four. NB that we
96: # assume that ${ireg_base} is aligned to at least four:
97: #
98: while test `expr ${ireg_next} % 4` != 0; do ireg_next=`expr ${ireg_next} + 1`; done
99: echo "#define TME_SPARC_IREG_FPX (${ireg_base} + ${ireg_next})"
100: ireg_next=`expr ${ireg_next} + 4`
101:
102: # the sparc32 PSR and WIM:
103: #
104: echo "#define tme_sparc32_ireg_psr tme_sparc_ireg_uint32(${ireg_base} + ${ireg_next})"
105: ireg_next=`expr ${ireg_next} + 1`
106: echo "#define tme_sparc32_ireg_wim tme_sparc_ireg_uint32(${ireg_base} + ${ireg_next})"
107: ireg_next=`expr ${ireg_next} + 1`
108:
109: # the sparc32 TBR register, and the sparc64 TBA register:
110: #
111: echo "#define tme_sparc32_ireg_tbr tme_sparc_ireg_uint32(${ireg_base} + ${ireg_next})"
112: echo "#define tme_sparc64_ireg_tba tme_sparc_ireg_uint64(${ireg_base} + ${ireg_next})"
113: ireg_next=`expr ${ireg_next} + 1`
114:
115: # the sparc64 PSTATE register:
116: #
117: echo "#define tme_sparc64_ireg_pstate tme_sparc_ireg_uint32((${ireg_base} + ${ireg_next}) << 1)"
118: ireg_next=`expr ${ireg_next} + 1`
119:
120: # the sparc64 CCR and ASI registers:
121: #
122: echo "#define tme_sparc64_ireg_ccr tme_sparc_ireg_uint8(((${ireg_base} + ${ireg_next}) << 3) + 0)"
123: echo "#define tme_sparc64_ireg_asi tme_sparc_ireg_uint8(((${ireg_base} + ${ireg_next}) << 3) + 1)"
124: ireg_next=`expr ${ireg_next} + 1`
125: fi
126:
127: # emit the integer condition codes->conditions mapping. note that the
128: # nesting of the flag variables is deliberate, to make this array
129: # indexable with the condition codes value:
130: #
131: if $header; then :; else
132: echo ""
133: echo "/* the icc->conditions mapping: */"
134: echo "const tme_uint8_t _tme_sparc_conds_icc[16] = {"
135: for nflag in 0 1; do
136: for zflag in 0 1; do
137: for vflag in 0 1; do
138: for cflag in 0 1; do
139:
140: # the Never condition:
141: #
142: echo -n " 0"
143:
144: # the Equal condition:
145: #
146: if test $zflag = 1; then
147: echo -n " | TME_BIT(1)"
148: fi
149:
150: # the Less or Equal condition:
151: #
152: if test $zflag = 1 || test $nflag != $vflag; then
153: echo -n " | TME_BIT(2)"
154: fi
155:
156: # the Less condition:
157: #
158: if test $nflag != $vflag; then
159: echo -n " | TME_BIT(3)"
160: fi
161:
162: # the Less or Equal Unsigned condition:
163: #
164: if test $cflag = 1 || test $zflag = 1; then
165: echo -n " | TME_BIT(4)"
166: fi
167:
168: # the Carry Set condition:
169: #
170: if test $cflag = 1; then
171: echo -n " | TME_BIT(5)"
172: fi
173:
174: # the Negative condition:
175: #
176: if test $nflag = 1; then
177: echo -n " | TME_BIT(6)"
178: fi
179:
180: # the Overflow Set condition:
181: #
182: if test $vflag = 1; then
183: echo -n " | TME_BIT(7)"
184: fi
185:
186: echo ","
187: done
188: done
189: done
190: done
191: echo "};"
192: fi
193:
194: # done:
195: #
196: exit 0
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.