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1.1 root 1: /* $Id: stp222x-impl.h,v 1.4 2009/11/08 16:45:14 fredette Exp $ */
2:
3: /* ic/stp22xx/stp222x-impl.h - implementation header file for STP2220
4: and STP2222 emulation: */
5:
6: /*
7: * Copyright (c) 2009 Matt Fredette
8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by Matt Fredette.
21: * 4. The name of the author may not be used to endorse or promote products
22: * derived from this software without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
28: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
32: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
33: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34: * POSSIBILITY OF SUCH DAMAGE.
35: */
36:
37: #ifndef _STP222X_IMPL_H
38: #define _STP222X_IMPL_H
39:
40: #include <tme/common.h>
41: _TME_RCSID("$Id: stp222x-impl.h,v 1.4 2009/11/08 16:45:14 fredette Exp $");
42:
43: /* includes: */
44: #include "stp22xx-impl.h"
45:
46: /* macros: */
47:
48: /* common interrupt diagnostic register indices: */
49: #define TME_STP222X_IDI0_OBIO (0x20)
50: #define TME_STP222X_IDI_SCSI (TME_STP222X_IDI0_OBIO + 0x00)
51: #define TME_STP222X_IDI_ETHER (TME_STP222X_IDI0_OBIO + 0x01)
52: #define TME_STP222X_IDI_BPP (TME_STP222X_IDI0_OBIO + 0x02)
53: #define TME_STP222X_IDI_NULL (0x40)
54:
55: /* the common register size: */
56: #define TME_STP222X_REG_SIZE (sizeof(tme_uint64_t))
57:
58: /* common timer register offsets: */
59: #define TME_STP222X_TIMER_COUNT (0x00)
60: #define TME_STP222X_TIMER_LIMIT (0x08)
61: #define TME_STP222X_TIMER_SIZE (0x10)
62:
63: /* the maximum count of interrupt dispatch buffers: */
64: #define TME_STP222X_MDU_BUFFER_COUNT (2)
65:
66: /* the number of IOMMU TLB entries: */
67: #define TME_STP222X_IOMMU_TLB_SIZE (16)
68:
69: /* the maximum count of streaming caches: */
70: #define TME_STP222X_STC_COUNT (2)
71:
72: /* stp2220-specific slots: */
73: #define TME_STP2220_SLOTS_CARD (4)
74: #define TME_STP2220_SLOTS_OBIO (3)
75: #define TME_STP2220_SLOT_CARD(n) (n)
76: #define TME_STP2220_SLOT_OBIO(n) (13 + (n))
77: #define TME_STP2220_SLOT_AUDIO TME_STP2220_SLOT_OBIO(0)
78: #define TME_STP2220_SLOT_MACIO TME_STP2220_SLOT_OBIO(1)
79: #define TME_STP2220_SLOT_SLAVIO TME_STP2220_SLOT_OBIO(2)
80:
81: /* stp2220-specific interrupt diagnostic register indices: */
82: #define TME_STP2220_IDI_CARD(slot, intn) ((TME_SBUS_SLOT_INTS * (slot)) + (intn))
83: #define TME_STP2220_IDI_AUDIO (TME_STP222X_IDI0_OBIO + 0x03)
84: #define TME_STP2220_IDI_POWER (TME_STP222X_IDI0_OBIO + 0x04)
85: #define TME_STP2220_IDI_ZS0_ZS1 (TME_STP222X_IDI0_OBIO + 0x05)
86: #define TME_STP2220_IDI_FD (TME_STP222X_IDI0_OBIO + 0x06)
87: #define TME_STP2220_IDI_THERM (TME_STP222X_IDI0_OBIO + 0x07)
88: #define TME_STP2220_IDI_KBD (TME_STP222X_IDI0_OBIO + 0x08)
89: #define TME_STP2220_IDI_MOUSE (TME_STP222X_IDI0_OBIO + 0x09)
90: #define TME_STP2220_IDI_SERIAL (TME_STP222X_IDI0_OBIO + 0x0a)
91: #define TME_STP2220_IDI_TIMER(n) (TME_STP222X_IDI0_OBIO + 0x0b + (n))
92: #define TME_STP2220_IDI_UE (TME_STP222X_IDI0_OBIO + 0x0d)
93: #define TME_STP2220_IDI_CE (TME_STP222X_IDI0_OBIO + 0x0e)
94: #define TME_STP2220_IDI_SBUS_ASYNC (TME_STP222X_IDI0_OBIO + 0x0f)
95: #define TME_STP2220_IDI_POWER_MANAGE (TME_STP222X_IDI0_OBIO + 0x10)
96: #define TME_STP2220_IDI_UPA (TME_STP222X_IDI0_OBIO + 0x11)
97: #define TME_STP2220_IDI_RESERVED (TME_STP222X_IDI0_OBIO + 0x12)
98:
99: /* stp2222-specific IDIs: */
100: #define TME_STP2222_IDI_CARD(bus, slot, intn) ((TME_PCI_SLOT_INTS * (((bus) * 4) + (slot))) + (intn))
101: #define TME_STP2222_IDI_AUDIO_RECORD (TME_STP222X_IDI0_OBIO + 0x03)
102: #define TME_STP2222_IDI_AUDIO_PLAYBACK (TME_STP222X_IDI0_OBIO + 0x04)
103: #define TME_STP2222_IDI_TIMER(n) (TME_STP222X_IDI0_OBIO + 0x0c + (n))
104: #define TME_STP2222_IDI_UE (TME_STP222X_IDI0_OBIO + 0x0e)
105: #define TME_STP2222_IDI_CE (TME_STP222X_IDI0_OBIO + 0x0f)
106: #define TME_STP2222_IDI_POWER_MANAGE (TME_STP222X_IDI0_OBIO + 0x12)
107: #define TME_STP2222_IDI_FFB0 (TME_STP222X_IDI0_OBIO + 0x13)
108: #define TME_STP2222_IDI_FFB1 (TME_STP222X_IDI0_OBIO + 0x14)
109:
110: /* the STP2222 BOOT_BUS: */
111: #define TME_STP2222_BOOT_BUS(stp222x) (0 && (stp222x))
112:
113: /* a register group covers 256 addresses: */
114: #define TME_STP222X_REGGROUP_WHICH(x) ((x) / 256)
115: #define TME_STP222X_REGGROUP_INDEX(x) ((((tme_uint32_t) (x)) / TME_STP222X_REG_SIZE) % (256 / TME_STP222X_REG_SIZE))
116:
117: /* XXX FIXME - these should be in bus-specific headers: */
118: #define TME_SBUS_SLOT_INTS (8)
119: #define TME_PCI_SLOT_INTS (4)
120:
121: /* connections: */
122: #define TME_STP222X_CONN_SLAVE0 (sizeof(((struct tme_stp222x *) 0)->tme_stp222x_io_brs) * 8)
123: #define TME_STP222X_CONN_NULL (64)
124: #define TME_STP222X_CONN_UPA (TME_STP222X_CONN_NULL + 1)
125: #define TME_STP222X_CONN_COUNT (TME_STP222X_CONN_UPA + 1)
126:
127: /* the number of TLB tokens in a list: */
128: #define TME_STP222X_TLB_LIST_TOKENS_COUNT (4)
129:
130: /* connection identifiers: */
131: /* NB: connection identifiers are complicated because we want to be
132: able to quickly map identifiers for connections that can interrupt
133: into an IDI, and quickly map identifiers for masters into
134: connection indices, but the connection identifier often has to
135: carry addressing information for the connection too.
136:
137: obio connections use one type of identifier. known obio
138: connections (that we need to get IDIs and connection indices for
139: quickly) have a short form, that contains the IDI and connection
140: index directly. unknown obio connections use a long form that
141: captures the slot and offset only.
142:
143: card connections use another type of identifier. these identifiers
144: always contain the addressing information for the connection, which
145: can always be quickly mapped into a base IDI. card identifiers for
146: masters can usually be mapped quickly into a connection index: */
147: #define TME_STP222X_CONNID_TYPE (0x1 << 0)
148: #define TME_STP222X_CONNID_TYPE_OBIO (0x1 << 0)
149: #define TME_STP222X_CONNID_TYPE_CARD (0x0 << 0)
150: #define TME_STP222X_CONNID_OBIO_TYPE (0x1 << 1)
151: #define TME_STP222X_CONNID_OBIO_TYPE_SHORT (0x1 << 1)
152: #define TME_STP222X_CONNID_OBIO_TYPE_LONG (0x0 << 1)
153: #if (TME_STP222X_IDI_NULL & (TME_STP222X_IDI_NULL - 1))
154: #error "TME_STP222X_IDI_NULL must be a power of two"
155: #endif
156: #define TME_STP222X_CONNID_OBIO_SHORT_IDI ((TME_STP222X_IDI_NULL - 1) << 2)
157: #define TME_STP222X_CONNID_OBIO_SHORT_CONN_WHICH \
158: (~ (tme_uint32_t) \
159: (TME_STP222X_CONNID_TYPE \
160: | TME_STP222X_CONNID_OBIO_TYPE \
161: | TME_STP222X_CONNID_OBIO_SHORT_IDI))
162: #define TME_STP222X_CONNID_OBIO_LONG_WHICH (0x3 << 2)
163: #define TME_STP222X_CONNID_OBIO_LONG_OFFSET ((TME_STP2220_SLOT_SIZE - 1) << 4)
164: #define TME_STP2220_CONNID_CARD_WHICH (0x3 << 1)
165: #define TME_STP2220_CONNID_CARD_ALTERNATE (0x1 << 3)
166: #define TME_STP2220_CONNID_CARD_OFFSET ((TME_STP2220_SLOT_SIZE - 1) << 4)
167: #define TME_STP2222_CONNID_DEVICE_WHICH (0x3 << 1)
168: #define TME_STP2222_CONNID_BUS_WHICH (0x4 << 1)
169:
170: /* address spaces: */
171: #define TME_STP2220_ASPACE_SBUS (0)
172: #define TME_STP2222_ASPACE_PCI_MEMORY(bus) (1 + (bus))
173: #define TME_STP2222_ASPACE_PCI_IO(bus) (3 + (bus))
174: #define TME_STP2222_ASPACE_PCI_CONFIGURATION (5)
175: #define TME_STP222X_ASPACE_NULL (6)
176:
177: /* address searches: */
178: #define TME_STP222X_ASEARCH_MISS (((tme_uint32_t) 1) << 31)
179:
180: /* predicates: */
181: #define TME_STP222X_IS_2220(stp222x) ((stp222x)->tme_stp222x_is_2220)
182:
183: /* miscellaneous: */
184: #define TME_STP222X_LOG_HANDLE(stp222x) (&(stp222x)->tme_stp222x.tme_stp22xx_element->tme_element_log_handle)
185:
186: /* these busy a bus connection: */
187: #define tme_stp222x_busy_bus(stp222x, conn_index) \
188: tme_stp22xx_busy_bus(&(stp222x)->tme_stp222x, conn_index)
189: #define tme_stp222x_busy_upa(stp222x) \
190: ((struct tme_upa_bus_connection *) tme_stp222x_busy_bus(stp222x, TME_STP222X_CONN_UPA))
191:
192: /* this unbusies a generic bus connection: */
193: #define tme_stp222x_unbusy_bus(stp222x, conn_bus) \
194: tme_stp22xx_unbusy_bus(&(stp222x)->tme_stp222x, conn_bus)
195:
196: /* this busies a slave generic bus connection: */
197: #define tme_stp222x_slave_busy_bus(stp222x, conn_index) \
198: tme_stp22xx_slave_busy_bus(&(stp222x)->tme_stp222x, conn_index)
199:
200: /* this unbusies a slave generic bus connection: */
201: #define tme_stp222x_slave_unbusy(stp222x) \
202: tme_stp22xx_slave_unbusy(&(stp222x)->tme_stp222x)
203:
204: /* this enters an stp222x: */
205: #define tme_stp222x_enter_bus(conn_bus) \
206: ((struct tme_stp222x *) tme_stp22xx_enter((struct tme_stp22xx *) (conn_bus)->tme_bus_connection.tme_connection_element->tme_element_private))
207:
208: /* this enters an stp222x as the bus master: */
209: #define tme_stp222x_enter_master_bus(master_conn_bus) \
210: ((struct tme_stp222x *) tme_stp22xx_enter_master(master_conn_bus))
211:
212: /* this leaves an stp222x: */
213: #define tme_stp222x_leave(stp222x) \
214: tme_stp22xx_leave(&(stp222x)->tme_stp222x)
215:
216: /* this validates a completion: */
217: /* NB: completion may be NULL: */
218: #define tme_stp222x_completion_validate(stp222x, completion) \
219: tme_stp22xx_completion_validate(&(stp222x)->tme_stp222x, completion)
220:
221: /* this allocates a completion: */
222: #define tme_stp222x_completion_alloc(stp222x, handler, arg) \
223: tme_stp22xx_completion_alloc(&(stp222x)->tme_stp222x, handler, arg)
224:
225: /* types: */
226:
227: /* a timer: */
228: struct tme_stp222x_timer {
229:
230: /* a backpointer to the stp222x: */
231: struct tme_stp222x *tme_stp222x_timer_stp222x;
232:
233: /* the real limit register value: */
234: tme_uint32_t tme_stp222x_timer_limit;
235:
236: /* the current period of this timer: */
237: struct timeval tme_stp222x_timer_period;
238:
239: /* when the timer reaches its next limit: */
240: struct timeval tme_stp222x_timer_limit_next;
241:
242: /* a condition for waking up the thread for this timer: */
243: struct tme_stp22xx_cond tme_stp222x_timer_cond;
244:
245: /* these are used to track the interrupt rate for this timer: */
246: tme_uint32_t tme_stp222x_timer_track_ints;
247: struct timeval tme_stp222x_timer_track_sample;
248:
249: /* the IDI for this timer: */
250: tme_uint8_t tme_stp222x_timer_idi;
251: };
252:
253: /* a TLB list: */
254: struct tme_stp222x_tlb_list {
255:
256: /* the head of the list: */
257: unsigned int tme_stp222x_tlb_list_head;
258:
259: /* the tokens for the TLBs in the list: */
260: struct tme_token *tme_stp222x_tlb_list_tokens[TME_STP222X_TLB_LIST_TOKENS_COUNT];
261: };
262:
263: /* a streaming cache: */
264: struct tme_stp222x_stc {
265:
266: /* the STC control register: */
267: tme_uint32_t tme_stp222x_stc_cr;
268:
269: /* if this is nonzero, a flush is active: */
270: int tme_stp222x_stc_pgflush;
271:
272: /* the STC FLUSHSYNC register: */
273: tme_uint64_t tme_stp222x_stc_flushsync;
274:
275: /* the TLB entry for the flushsync range: */
276: struct tme_bus_tlb tme_stp222x_stc_flushsync_tlb;
277: struct tme_token tme_stp222x_stc_flushsync_tlb_token;
278: };
279:
280: /* an address range: */
281: struct tme_stp222x_arange {
282:
283: /* the first address in the address range: */
284: tme_bus_addr64_t tme_stp222x_arange_first;
285:
286: /* the size minus one of the address range: */
287: tme_bus_addr64_t tme_stp222x_arange_size_m1;
288:
289: /* the key for this address range: */
290: tme_uint32_t tme_stp222x_arange_key;
291: };
292:
293: /* an address space: */
294: struct tme_stp222x_aspace {
295:
296: /* all address ranges claimed in this space: */
297: struct tme_stp222x_arange *tme_stp222x_aspace_aranges;
298: tme_uint32_t tme_stp222x_aspace_arange_count;
299:
300: /* the count of 32-bit address ranges claimed in this space: */
301: tme_uint32_t tme_stp222x_aspace_arange32_count;
302:
303: /* the offset in this address space for each connection index: */
304: tme_bus_addr32_t tme_stp222x_aspace_conn_offset[TME_STP222X_CONN_NULL];
305: };
306:
307: /* a set of IDIs: */
308: typedef tme_uint32_t tme_stp222x_idis_t;
309:
310: /* a register access: */
311: struct tme_stp222x_reg {
312:
313: /* the register value: */
314: tme_uint64_t tme_stp222x_reg_value;
315:
316: /* the register address: */
317: tme_uint16_t tme_stp222x_reg_address;
318:
319: /* if nonzero, this is a write: */
320: tme_uint8_t tme_stp222x_reg_write;
321:
322: /* if nonzero, the access was completed: */
323: tme_uint8_t tme_stp222x_reg_completed;
324: };
325:
326: /* the device: */
327: struct tme_stp222x {
328:
329: /* the common structure, and space for the connections: */
330: struct tme_stp22xx tme_stp222x;
331: #define tme_stp222x_master_conn_index_pending tme_stp222x.tme_stp22xx_master_conn_index_pending
332: #define tme_stp222x_master_conn_index tme_stp222x.tme_stp22xx_master_conn_index
333: #define tme_stp222x_master_completion tme_stp222x.tme_stp22xx_master_completion
334: union tme_stp22xx_conn __tme_stp222x_conns[TME_STP222X_CONN_COUNT];
335:
336: /* this is nonzero if this is an STP2220: */
337: int tme_stp222x_is_2220;
338:
339: /* the next slave connection index: */
340: tme_uint32_t tme_stp222x_slave_conn_index_next;
341:
342: /* this is nonzero if we are asserting bus request on the UPA bus: */
343: tme_uint8_t tme_stp222x_br;
344:
345: /* this is nonzero if we have been granted the UPA bus: */
346: tme_uint8_t tme_stp222x_bg;
347:
348: /* the UPA port configuration register: */
349: tme_uint8_t tme_stp222x_upa_port_config;
350:
351: /* the ECC control register: */
352: tme_uint8_t tme_stp222x_ecc_control;
353:
354: /* the CSR: */
355: tme_uint64_t tme_stp222x_csr;
356:
357: /* the wired-together state of the zs0 and zs1 IDIs: */
358: tme_uint8_t tme_stp2220_mdu_idi_zs0_zs1_active;
359:
360: /* the active IDIs: */
361: tme_stp222x_idis_t tme_stp222x_mdu_idis_active[TME_STP222X_IDI_NULL / (sizeof(tme_stp222x_idis_t) * 8)];
362:
363: /* the received IDIs: */
364: tme_stp222x_idis_t tme_stp222x_mdu_idis_received[TME_STP222X_IDI_NULL / (sizeof(tme_stp222x_idis_t) * 8)];
365:
366: /* the IMRs: */
367: tme_uint32_t tme_stp222x_mdu_imrs[TME_STP222X_IDI_NULL];
368:
369: /* the pending IDIs: */
370: tme_stp222x_idis_t tme_stp222x_mdu_idis_pending[TME_STP222X_IDI_NULL / (sizeof(tme_stp222x_idis_t) * 8)];
371:
372: /* the interrupt dispatch buffers: */
373: tme_uint32_t tme_stp222x_mdu_dispatch_imr[TME_STP222X_MDU_BUFFER_COUNT];
374: tme_uint8_t tme_stp222x_mdu_dispatch_idi[TME_STP222X_MDU_BUFFER_COUNT];
375: tme_uint8_t tme_stp222x_mdu_dispatch_state[TME_STP222X_MDU_BUFFER_COUNT];
376:
377: /* the next interrupt dispatch buffer: */
378: unsigned int tme_stp222x_mdu_dispatch_buffer;
379:
380: /* the interrupt retry period and condition: */
381: tme_uint32_t tme_stp222x_mdu_retry;
382: struct timeval tme_stp222x_mdu_retry_sleep;
383: struct tme_stp22xx_cond tme_stp222x_mdu_retry_cond;
384:
385: /* the UPA bus reset level: */
386: unsigned int tme_stp222x_reset_level;
387:
388: /* the reset state: */
389: tme_uint32_t tme_stp222x_reset_state;
390:
391: /* the mask of I/O connection indices requesting the bus: */
392: tme_uint32_t tme_stp222x_io_brs;
393:
394: /* the address spaces: */
395: struct tme_stp222x_aspace tme_stp222x_aspaces[TME_STP222X_ASPACE_NULL];
396:
397: /* the STP2220 SBus registers: */
398: tme_uint64_t tme_stp2220_sbus_csr;
399: tme_uint64_t tme_stp2220_sbus_config_card[TME_STP2220_SLOTS_CARD + TME_STP2220_SLOTS_OBIO];
400:
401: /* the SBus offset for each connection index: */
402: tme_bus_addr32_t tme_stp2220_conn_offset[TME_STP222X_CONN_NULL];
403:
404: /* the timers: */
405: struct tme_stp222x_timer tme_stp222x_timers[2];
406:
407: /* the IOMMU control register: */
408: tme_uint32_t tme_stp222x_iommu_cr;
409:
410: /* the most recently used IOMMU TLB entry: */
411: unsigned int tme_stp222x_iommu_tlb_i_mru;
412:
413: /* the IOMMU TLB LRU queue: */
414: tme_uint8_t tme_stp222x_iommu_lru[TME_STP222X_IOMMU_TLB_SIZE][2];
415: #define tme_stp222x_iommu_lru_prev(x) tme_stp222x_iommu_lru[x][0]
416: #define tme_stp222x_iommu_lru_next(x) tme_stp222x_iommu_lru[x][1]
417:
418: /* the IOMMU TLB entry tags: */
419: tme_uint32_t tme_stp222x_iommu_tlb_tags[TME_STP222X_IOMMU_TLB_SIZE];
420:
421: /* the IOMMU TLB entry data: */
422: tme_uint32_t tme_stp222x_iommu_tlb_data[TME_STP222X_IOMMU_TLB_SIZE];
423:
424: /* the TSB address: */
425: tme_uint64_t tme_stp222x_iommu_tsb;
426:
427: /* the TSB TLB: */
428: struct tme_bus_tlb tme_stp222x_iommu_tsb_tlb;
429: struct tme_token tme_stp222x_iommu_tsb_tlb_token;
430:
431: /* the TLB lists for the IOMMU: */
432: struct tme_stp222x_tlb_list tme_stp222x_iommu_tlb_list_fixed;
433: struct tme_stp222x_tlb_list tme_stp222x_iommu_tlb_list[TME_STP222X_IOMMU_TLB_SIZE];
434:
435: /* the IOMMU VA and compare registers: */
436: tme_uint32_t tme_stp222x_iommu_va;
437: tme_uint32_t tme_stp222x_iommu_compare;
438:
439: #if TME_STP22XX_BUS_TRANSITION
440: /* the token for a TLB entry that missed the IOMMU TLB: */
441: struct tme_token *tme_stp222x_iommu_tlb_missed_token;
442: #endif /* TME_STP22XX_BUS_TRANSITION */
443:
444: /* the streaming caches: */
445: struct tme_stp222x_stc tme_stp222x_stcs[TME_STP222X_STC_COUNT];
446: };
447:
448: /* prototypes: */
449:
450: /* the timer register handler: */
451: void tme_stp222x_timer_regs _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
452:
453: /* this initializes an stp222x timer: */
454: void tme_stp222x_timer_init _TME_P((struct tme_stp222x *, struct tme_stp222x_timer *));
455:
456: /* this updates the interrupt concentrator: */
457: void tme_stp222x_mdu_intcon _TME_P((struct tme_stp222x *, tme_uint32_t, tme_uint32_t));
458:
459: /* this receives an interrupt: */
460: void tme_stp222x_mdu_receive _TME_P((struct tme_stp222x *, tme_uint32_t));
461:
462: /* this dispatches an interrupt: */
463: int tme_stp222x_mdu_dispatch _TME_P((struct tme_stp222x *));
464:
465: /* the MDU IMR and retry register handler: */
466: void tme_stp222x_mdu_regs_imr_retry _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
467:
468: /* the MDU clear register handler: */
469: void tme_stp222x_mdu_regs_clear _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
470:
471: /* the MDU diagnostic register handler: */
472: void tme_stp222x_mdu_regs_diag _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
473:
474: /* this updates the IGN for the partial IMRs: */
475: void tme_stp222x_mdu_ign_update _TME_P((struct tme_stp222x *, tme_uint32_t));
476:
477: /* this initializes the MDU: */
478: void tme_stp222x_mdu_init _TME_P((struct tme_stp222x *));
479:
480: /* this handles an IOMMU bus cycle: */
481: void tme_stp222x_iommu_cycle _TME_P((struct tme_bus_connection *, struct tme_bus_cycle *, tme_uint32_t *, struct tme_completion *));
482:
483: /* this fills a TLB entry from the IOMMU: */
484: void tme_stp222x_iommu_tlb_fill _TME_P((struct tme_bus_connection *, struct tme_bus_tlb *, tme_bus_addr_t, unsigned int));
485:
486: /* the IOMMU register handler: */
487: void tme_stp222x_iommu_regs _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
488:
489: /* the IOMMU diagnostic register handler: */
490: void tme_stp222x_iommu_regs_diag _TME_P((struct tme_stp222x *, struct tme_stp222x_reg *));
491:
492: /* this initializes the IOMMU: */
493: void tme_stp222x_iommu_init _TME_P((struct tme_stp222x *));
494:
495: /* this flushes a streaming cache: */
496: int tme_stp222x_stc_flush _TME_P((struct tme_stp222x *));
497:
498: /* the STC register handler: */
499: void tme_stp222x_stc_regs _TME_P((struct tme_stp222x *, unsigned long, struct tme_stp222x_reg *));
500:
501: /* the STC diagnostic register handler: */
502: void tme_stp222x_stc_regs_diag _TME_P((struct tme_stp222x *, unsigned long, struct tme_stp222x_reg *));
503:
504: /* this initializes a streaming cache: */
505: void tme_stp222x_stc_init _TME_P((struct tme_stp222x_stc *));
506:
507: /* these search address ranges for an address: */
508: tme_uint32_t tme_stp222x_asearch32 _TME_P((const struct tme_stp222x_arange *, tme_uint32_t, tme_bus_addr32_t));
509: tme_uint32_t tme_stp222x_asearch64 _TME_P((const struct tme_stp222x_arange *, tme_uint32_t, tme_bus_addr64_t));
510:
511: /* this searches an address space: */
512: tme_uint32_t tme_stp222x_aspace_search _TME_P((const struct tme_stp222x_aspace *, tme_bus_addr64_t));
513:
514: /* this rebuilds the address spaces: */
515: int tme_stp222x_aspaces_rebuild _TME_P((struct tme_stp222x *));
516:
517: /* this looks up the slave connection for an address in a space, and
518: adjusts the address to be slave-relative: */
519: tme_uint32_t tme_stp222x_aspace_lookup _TME_P((const struct tme_stp222x *, unsigned int, tme_bus_addr64_t *));
520:
521: #endif /* !_STP222X_IMPL_H */
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