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1.1 root 1: /* $Id: sun2-impl.h,v 1.6 2003/05/16 21:48:13 fredette Exp $ */
2:
3: /* machine/sun2/sun2-impl.h - implementation header file for Sun 2 emulation: */
4:
5: /*
6: * Copyright (c) 2003 Matt Fredette
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. All advertising materials mentioning features or use of this software
18: * must display the following acknowledgement:
19: * This product includes software developed by Matt Fredette.
20: * 4. The name of the author may not be used to endorse or promote products
21: * derived from this software without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
27: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
31: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
32: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33: * POSSIBILITY OF SUCH DAMAGE.
34: */
35:
36: #ifndef _MACHINE_SUN2_IMPL_H
37: #define _MACHINE_SUN2_IMPL_H
38:
39: #include <tme/common.h>
40: _TME_RCSID("$Id: sun2-impl.h,v 1.6 2003/05/16 21:48:13 fredette Exp $");
41:
42: /* includes: */
43: #include <tme/generic/bus.h>
44: #include <tme/generic/ic.h>
45: #include <tme/machine/sun.h>
46: #include <tme/ic/m68k.h>
47: #include <tme/element.h>
48:
49: /* macros: */
50:
51: /* the sun2 control register file can be thought of as 16-bit
52: big-endian memory, so we use a struct tme_ic to hold the register
53: file, and use the TME_IC_BUS_IREGN macros to map it using real sun2
54: control addresses: */
55: #define _TME_SUN2_CONTROL_IREG8(addr) tme_sun2_ic.tme_ic_ireg_uint8(TME_IC_BUS_IREG8(1, TME_ENDIAN_BIG, addr))
56: #define _TME_SUN2_CONTROL_IREG16(addr) tme_sun2_ic.tme_ic_ireg_uint16(TME_IC_BUS_IREG16(1, TME_ENDIAN_BIG, addr))
57: #define tme_sun2_pgmap_hi _TME_SUN2_CONTROL_IREG16(0x00000000)
58: #define tme_sun2_pgmap_lo _TME_SUN2_CONTROL_IREG16(0x00000002)
59: #define tme_sun2_segmap _TME_SUN2_CONTROL_IREG8(0x00000005)
60: #define tme_sun2_context_system _TME_SUN2_CONTROL_IREG8(0x00000006)
61: #define tme_sun2_context_user _TME_SUN2_CONTROL_IREG8(0x00000007)
62: #define tme_sun2_idprom _TME_SUN2_CONTROL_IREG8(0x00000008)
63: #define tme_sun2_diag _TME_SUN2_CONTROL_IREG8(0x0000000B)
64: #define tme_sun2_buserr _TME_SUN2_CONTROL_IREG16(0x0000000C)
65: #define tme_sun2_enable _TME_SUN2_CONTROL_IREG16(0x0000000E)
66: #define TME_SUN2_CONTROL_JUNK 0x00000010
67:
68: /* real enable register bits: */
69: #define TME_SUN2_ENA_PAR_GEN (0x01) /* enable parity generation */
70: #define TME_SUN2_ENA_SOFT_INT_1 (0x02) /* software interrupt on level 1 */
71: #define TME_SUN2_ENA_SOFT_INT_2 (0x04) /* software interrupt on level 2 */
72: #define TME_SUN2_ENA_SOFT_INT_3 (0x08) /* software interrupt on level 3 */
73: #define TME_SUN2_ENA_PAR_CHECK (0x10) /* enable parity checking and errors */
74: #define TME_SUN2_ENA_SDVMA (0x20) /* enable DVMA */
75: #define TME_SUN2_ENA_INTS (0x40) /* enable interrupts */
76: #define TME_SUN2_ENA_NOTBOOT (0x80) /* non-boot state */
77:
78: /* this recovers the control address of a register. it should
79: optimize right down to a constant: */
80: #define TME_SUN2_CONTROL_ADDRESS(reg) \
81: TME_IC_IREG_BUS(1, TME_ENDIAN_BIG, reg, tme_sun2, tme_sun2_ic.)
82:
83: /* this starts a bus cycle structure: */
84: #define TME_SUN2_CONTROL_BUS_CYCLE(sun2, addr, cycle) \
85: TME_IC_IREG_BUS_CYCLE(1, TME_ENDIAN_BIG, &sun2->tme_sun2_ic, addr, cycle)
86:
87: /* the page size: */
88: #define TME_SUN2_PAGE_SIZE_LOG2 (11)
89: #define TME_SUN2_PAGE_SIZE (1 << TME_SUN2_PAGE_SIZE_LOG2)
90:
91: /* the PROM location: */
92: #define TME_SUN2_PROM_BASE (0x00EF0000)
93: #define TME_SUN2_PROM_SIZE (0x00010000)
94:
95: /* identifiers for the different buses: */
96: #define TME_SUN2_BUS_OBIO (0)
97: #define TME_SUN2_BUS_OBMEM (1)
98: #define TME_SUN2_BUS_MBIO (2)
99: #define TME_SUN2_BUS_MBMEM (3)
100: #define TME_SUN2_BUS_VME (4)
101: #define TME_SUN2_BUS_COUNT (5)
102:
103: #define TME_SUN2_LOG_HANDLE(sun2) (&(sun2)->tme_sun2_element->tme_element_log_handle)
104:
105: /* structures: */
106: struct tme_sun2 {
107:
108: /* our IC data structure, containing our various registers: */
109: struct tme_ic tme_sun2_ic;
110:
111: /* backpointer to our element: */
112: struct tme_element *tme_sun2_element;
113:
114: /* nonzero if this is a VME sun2: */
115: int tme_sun2_has_vme;
116:
117: /* the IDPROM: */
118: tme_uint8_t tme_sun2_idprom_contents[TME_SUN_IDPROM_SIZE];
119:
120: /* the MMU: */
121: void *tme_sun2_mmu;
122:
123: /* the CPU: */
124: struct tme_m68k_bus_connection *tme_sun2_m68k;
125:
126: /* the different buses: */
127: struct tme_bus_connection *tme_sun2_buses[TME_SUN2_BUS_COUNT];
128: #define tme_sun2_obio tme_sun2_buses[TME_SUN2_BUS_OBIO]
129: #define tme_sun2_obmem tme_sun2_buses[TME_SUN2_BUS_OBMEM]
130: #define tme_sun2_mbio tme_sun2_buses[TME_SUN2_BUS_MBIO]
131: #define tme_sun2_mbmem tme_sun2_buses[TME_SUN2_BUS_MBMEM]
132: #define tme_sun2_vmebus tme_sun2_buses[TME_SUN2_BUS_VME]
133:
134: /* during reset, this handles the special ROM read bus cycles: */
135: struct tme_m68k_tlb *tme_sun2_reset_tlbs;
136: unsigned int tme_sun2_reset_tlb_count;
137: unsigned int tme_sun2_reset_cycles;
138: void *tme_sun2_reset_cycle_private;
139: tme_bus_cycle_handler tme_sun2_reset_cycle;
140:
141: /* the interrupt lines that are being asserted: */
142: tme_uint8_t tme_sun2_int_signals[(TME_M68K_IPL_MAX + 1 + 7) >> 3];
143:
144: /* the last ipl we gave to the CPU: */
145: unsigned int tme_sun2_int_ipl_last;
146: };
147:
148: /* prototypes: */
149: void _tme_sun2_mmu_new _TME_P((struct tme_sun2 *));
150: int _tme_sun2_m68k_tlb_fill _TME_P((struct tme_m68k_bus_connection *, struct tme_m68k_tlb *,
151: unsigned int, tme_uint32_t, unsigned int));
152: int _tme_sun2_bus_tlb_fill _TME_P((struct tme_bus_connection *, struct tme_bus_tlb *,
153: tme_uint32_t, unsigned int));
154: int _tme_sun2_mmu_tlb_set_allocate _TME_P((struct tme_bus_connection *,
155: unsigned int, unsigned int,
156: TME_ATOMIC_POINTER_TYPE(struct tme_bus_tlb **)));
157: int _tme_sun2_mmu_pte_get _TME_P((struct tme_sun2 *, tme_uint32_t, tme_uint32_t *));
158: int _tme_sun2_mmu_pte_set _TME_P((struct tme_sun2 *, tme_uint32_t, tme_uint32_t));
159: void _tme_sun2_mmu_context_system_set _TME_P((struct tme_sun2 *));
160: void _tme_sun2_mmu_context_user_set _TME_P((struct tme_sun2 *));
161: int _tme_sun2_mmu_reset _TME_P((struct tme_sun2 *));
162:
163: int _tme_sun2_control_cycle_handler _TME_P((void *, struct tme_bus_cycle *));
164: int _tme_sun2_ipl_check _TME_P((struct tme_sun2 *));
165:
166: #endif /* !_MACHINE_SUN2_IMPL_H */
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