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Annotation of tme/machine/sun4/sun4-impl.h, revision 1.1

1.1     ! root        1: /* $Id: sun4-impl.h,v 1.2 2007/02/15 01:31:14 fredette Exp $ */
        !             2: 
        !             3: /* machine/sun4/sun4-impl.h - implementation header file for Sun 4 emulation: */
        !             4: 
        !             5: /*
        !             6:  * Copyright (c) 2005, 2006 Matt Fredette
        !             7:  * All rights reserved.
        !             8:  *
        !             9:  * Redistribution and use in source and binary forms, with or without
        !            10:  * modification, are permitted provided that the following conditions
        !            11:  * are met:
        !            12:  * 1. Redistributions of source code must retain the above copyright
        !            13:  *    notice, this list of conditions and the following disclaimer.
        !            14:  * 2. Redistributions in binary form must reproduce the above copyright
        !            15:  *    notice, this list of conditions and the following disclaimer in the
        !            16:  *    documentation and/or other materials provided with the distribution.
        !            17:  * 3. All advertising materials mentioning features or use of this software
        !            18:  *    must display the following acknowledgement:
        !            19:  *      This product includes software developed by Matt Fredette.
        !            20:  * 4. The name of the author may not be used to endorse or promote products
        !            21:  *    derived from this software without specific prior written permission.
        !            22:  *
        !            23:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
        !            24:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
        !            25:  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
        !            26:  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
        !            27:  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
        !            28:  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
        !            29:  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            30:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
        !            31:  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
        !            32:  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
        !            33:  * POSSIBILITY OF SUCH DAMAGE.
        !            34:  */
        !            35: 
        !            36: #ifndef _MACHINE_SUN4_IMPL_H
        !            37: #define _MACHINE_SUN4_IMPL_H
        !            38: 
        !            39: #include <tme/common.h>
        !            40: _TME_RCSID("$Id: sun4-impl.h,v 1.2 2007/02/15 01:31:14 fredette Exp $");
        !            41: 
        !            42: /* includes: */
        !            43: #include <tme/generic/bus.h>
        !            44: #include <tme/machine/sun.h>
        !            45: #include <tme/ic/sparc.h>
        !            46: #include <tme/element.h>
        !            47: #include <sys/types.h>
        !            48: #include <sys/time.h>
        !            49: 
        !            50: /* macros: */
        !            51: 
        !            52: /* real sun4 ASIs: */
        !            53:                                        /* 0x00 unused */
        !            54:                                        /* 0x01 unused */
        !            55: #define TME_SUN4_32_ASI_CONTROL                (0x02)          /* all 32-bit sun4: control space */
        !            56: #define TME_SUN44C_ASI_SEGMAP          (0x03)          /* sun4/4c: the segment map */
        !            57: #define TME_SUN44C_ASI_PGMAP           (0x04)          /* sun4/4c: the page map */
        !            58: #define TME_SUN4_ASI_COPY              (0x05)          /* sun4:  block copy */
        !            59: #define TME_SUN4C_ASI_HW_FLUSH_SEG     (0x05)          /* sun4c: hardware-assisted flush segment */
        !            60: #define TME_SUN4_ASI_REGMAP            (0x06)          /* sun4:  region map */
        !            61: #define TME_SUN4C_ASI_HW_FLUSH_PG      (0x06)          /* sun4c: hardware-assisted flush page */
        !            62: #define TME_SUN4_ASI_FLUSH_REG         (0x07)          /* sun4:  flush region */
        !            63: #define TME_SUN4C_ASI_HW_FLUSH_CONTEXT (0x07)          /* sun4c: hardware-assisted flush context */
        !            64:                                        /* 0x08 is TME_SPARC32_ASI_UI */
        !            65:                                        /* 0x09 is TME_SPARC32_ASI_SI */
        !            66:                                        /* 0x0a is TME_SPARC32_ASI_UD */
        !            67:                                        /* 0x0b is TME_SPARC32_ASI_SD */
        !            68: #define TME_SUN44C_ASI_FLUSH_SEG       (0x0c)          /* sun4/4c: flush segment */
        !            69: #define TME_SUN44C_ASI_FLUSH_PG                (0x0d)          /* sun4/4c: flush page */
        !            70: #define TME_SUN44C_ASI_FLUSH_CONTEXT   (0x0e)          /* sun4/4c: flush context */
        !            71: #define TME_SUN4_ASI_FLUSH_USER                (0x0f)          /* sun4:  flush user */
        !            72: #define TME_SUN4C_ASI_HW_FLUSH_ALL     (0x0f)          /* sun4c: hardware-assisted flush all */
        !            73: #define TME_SUN4_32_ASI_COUNT          (0x3a)          /* all 32-bit sun4: count of ASIs */
        !            74: 
        !            75: /* real sun4 ASI_CONTROL space addresses: */
        !            76: #define TME_SUN4_CONTROL_IDPROM                (0x00000000)    /* sun4: the IDPROM */
        !            77:                                        /* 0x10000000 was the sun3 page map */
        !            78:                                        /* 0x20000000 was the sun3 segment map */
        !            79: #define TME_SUN44C_CONTROL_CONTEXT     (0x30000000)    /* sun4/4c: the context register */
        !            80: #define TME_SUN44C_CONTROL_ENABLE      (0x40000000)    /* sun4/4c: the enable register */
        !            81: #define TME_SUN4_CONTROL_UDVMA         (0x50000000)    /* sun4:  the user DVMA enable register */
        !            82: #define TME_SUN4_CONTROL_BUSERR                (0x60000000)    /* sun4:  the bus error register */
        !            83: #define TME_SUN4C_CONTROL_SYNC_ERR     (0x60000000)    /* sun4c: the synchronous error register */
        !            84: #define TME_SUN4C_CONTROL_SYNC_VADDR   (0x60000004)    /* sun4c: the synchronous error virtual address register */
        !            85: #define TME_SUN4C_CONTROL_ASYNC_ERR    (0x60000008)    /* sun4c: the asynchronous error register */
        !            86: #define TME_SUN4C_CONTROL_ASYNC_VADDR  (0x6000000c)    /* sun4c: the asynchronous error virtual address register */
        !            87: #define TME_SUN4C_CONTROL_ASYNC_DATA_LO        (0x60000010)    /* sun4c: the asynchronous error low data register */
        !            88: #define TME_SUN4C_CONTROL_ASYNC_DATA_HI        (0x60000014)    /* sun4c: the asynchronous error low data register */
        !            89: #define TME_SUN4_CONTROL_DIAG          (0x70000000)    /* sun4:  the diagnostic register */
        !            90: #define TME_SUN44C_CONTROL_CACHE_TAGS  (0x80000000)    /* sun4/4c: the VAC tags */
        !            91: #define TME_SUN44C_CONTROL_CACHE_DATA  (0x90000000)    /* sun4/4c: the VAC data */
        !            92:                                        /* 0xa0000000 was the sun3 VAC flush */
        !            93:                                        /* 0xb0000000 was the sun3 block copy hardware */
        !            94:                                        /* 0xc0000000 unused */
        !            95: #define TME_SUN4_CONTROL_UDVMA_MAP     (0xd0000000)    /* sun4:  the user DVMA map */
        !            96: #define TME_SUN4_CONTROL_VME_INTVEC    (0xe0000000)    /* sun4:  the VME interrupt vector */
        !            97: #define TME_SUN44C_CONTROL_UART_BYPASS (0xf0000000)    /* sun4/4c: the special UART bypass */
        !            98: 
        !            99: /* this converts a sun4/4c control space address into the register number: */
        !           100: #define TME_SUN44C_CONTROL_REG(address)        ((address) >> 28)
        !           101: 
        !           102: /* real sun4/4c enable register bits: */
        !           103: #define TME_SUN4_ENA_DIAG              (0x01)  /* sun4:  diagnostic switch (read-only) */
        !           104: #define TME_SUN4_ENA_MONITOR           (0x01)  /* sun4:  "monitor bit" (write-only) */
        !           105: #define TME_SUN4_ENA_RESET_VME         (0x02)  /* sun4:  reset the VME bus */
        !           106: #define TME_SUN4_ENA_RESET_CACHE       (0x04)  /* sun4:  reset the cache */
        !           107: #define TME_SUN4C_ENA_RESET_SW         (0x04)  /* sun4c: software reset */
        !           108: #define TME_SUN4_ENA_VIDEO             (0x08)  /* sun4:  enable video display */
        !           109: #define TME_SUN44C_ENA_CACHE           (0x10)  /* sun4/4c: enable external cache */
        !           110: #define TME_SUN44C_ENA_SDVMA           (0x20)  /* sun4/4c: enable system DVMA */
        !           111: #define TME_SUN4_ENA_IOCACHE           (0x40)  /* sun4:  enable the I/O cache */
        !           112: #define TME_SUN44C_ENA_NOTBOOT         (0x80)  /* sun4/4c: non-boot state */
        !           113: 
        !           114: /* real sun4/4c interrupt register bits: */
        !           115: #define TME_SUN44C_IREG_INTS_ENAB      (0x01)  /* sun4/4c: enable interrupts */
        !           116: #define TME_SUN44C_IREG_SOFT_INT_L1    (0x02)  /* sun4/4c: enable level 1 soft interrupts */
        !           117: #define TME_SUN44C_IREG_SOFT_INT_L4    (0x04)  /* sun4/4c: enable level 4 soft interrupts */
        !           118: #define TME_SUN44C_IREG_SOFT_INT_L6    (0x08)  /* sun4/4c: enable level 6 soft interrupts */
        !           119: #define TME_SUN44C_IREG_VIDEO_INT      (0x10)  /* sun4/4c: enable level 8 video interrupts */
        !           120: #define TME_SUN44C_IREG_COUNTER_L10    (0x20)  /* sun4/4c: enable counter0 level 10 interrupts */
        !           121:                                        /* 0x40 unused */
        !           122: #define TME_SUN44C_IREG_COUNTER_L14    (0x80)  /* sun4/4c: enable counter1 level 14 interrupts */
        !           123: 
        !           124: /* real sun4/4c memory error register parts: */
        !           125: #define TME_SUN44C_MEMERR_REG_CSR      (0)
        !           126: #define TME_SUN44C_MEMERR_SIZ_CSR      (sizeof(tme_uint32_t))
        !           127: #define TME_SUN4C_MEMERR_REG_PARCTL    (4)
        !           128: #define TME_SUN4C_MEMERR_SIZ_PARCTL    (sizeof(tme_uint32_t))
        !           129: #define TME_SUN4_MEMERR_REG_VADDR      (4)
        !           130: #define TME_SUN4_MEMERR_SIZ_VADDR      (sizeof(tme_uint32_t))
        !           131: #define TME_SUN44C_MEMERR_SIZ_REG      (TME_SUN4_MEMERR_REG_VADDR + TME_SUN4_MEMERR_SIZ_VADDR)
        !           132: 
        !           133: /* real sun4/4c parity and ECC memory error control register bits: */
        !           134: #define TME_SUN4_MEMERR_X_CONTEXT_MASK (0x1fe00) /* sun4: context mask */
        !           135: #define TME_SUN4_MEMERR_X_DVMA         (0x100) /* sun4: access was DVMA */
        !           136: #define TME_SUN4_MEMERR_X_INT_ACTIVE   (0x80)  /* sun4: interrupt is active */
        !           137: #define TME_SUN4C_MEMERR_PAR_ERROR     (0x80)  /* sun4c: parity error detected */
        !           138: #define TME_SUN4_MEMERR_X_ENABLE_INT   (0x40)  /* sun4: enable memory error interrupts */
        !           139: #define TME_SUN4C_MEMERR_PAR_MULTI     (0x40)  /* sun4c: multiple parity errors detected */
        !           140: #define TME_SUN44C_MEMERR_PAR_TEST     (0x20)  /* sun4/4c: write inverse parity */
        !           141: #define TME_SUN44C_MEMERR_PAR_ENABLE   (0x10)  /* sun4/4c: enable parity checking */
        !           142: #define TME_SUN44C_MEMERR_PAR_ERR_BL3  (0x08)  /* sun4/4c: parity error in (sun4) D24..D31 (sun4c) D0..D7 */
        !           143: #define TME_SUN44C_MEMERR_PAR_ERR_BL2  (0x04)  /* sun4/4c: parity error in (sun4) D16..D23 (sun4c) D8..D15 */
        !           144: #define TME_SUN44C_MEMERR_PAR_ERR_BL1  (0x02)  /* sun4/4c: parity error in (sun4) D8..D15  (sun4c) D16..D23 */
        !           145: #define TME_SUN44C_MEMERR_PAR_ERR_BL0  (0x01)  /* sun4/4c: parity error in (sun4) D0..D7   (sun4c) D24..D31 */
        !           146: 
        !           147: /* real sun4/4c/4m timer register parts: */
        !           148: #define TME_SUN4_32_TIMER_REG_COUNTER  (0)
        !           149: #define TME_SUN4_32_TIMER_SIZ_COUNTER  (sizeof(tme_uint32_t))
        !           150: #define TME_SUN4_32_TIMER_REG_LIMIT    (TME_SUN4_32_TIMER_REG_COUNTER + TME_SUN4_32_TIMER_SIZ_COUNTER)
        !           151: #define TME_SUN4_32_TIMER_SIZ_LIMIT    (sizeof(tme_uint32_t))
        !           152: #define TME_SUN44C_TIMER_SIZ_REG       (TME_SUN4_32_TIMER_REG_LIMIT + TME_SUN4_32_TIMER_SIZ_LIMIT)
        !           153: 
        !           154: /* the page sizes: */
        !           155: #define TME_SUN4_PAGE_SIZE_LOG2                (13)
        !           156: #define TME_SUN4_PAGE_SIZE             (1 << TME_SUN4_PAGE_SIZE_LOG2)
        !           157: #define TME_SUN4C_PAGE_SIZE_LOG2       (12)
        !           158: #define TME_SUN4C_PAGE_SIZE            (1 << TME_SUN4C_PAGE_SIZE_LOG2)
        !           159: 
        !           160: /* all 32-bit sun4s have the same segment size: */
        !           161: #define TME_SUN4_32_SEGMENT_SIZE_LOG2  (18)
        !           162: #define TME_SUN4_32_SEGMENT_SIZE       (1 << TME_SUN4_32_SEGMENT_SIZE_LOG2)
        !           163: 
        !           164: /* real sun4/4c PTE entry bits: */
        !           165: #define TME_SUN44C_PTE_VALID           (0x80000000)
        !           166: #define TME_SUN44C_PTE_WRITE           (0x40000000)
        !           167: #define TME_SUN44C_PTE_SYSTEM          (0x20000000)
        !           168: #define TME_SUN44C_PTE_NC              (0x10000000)
        !           169: #define TME_SUN44C_PTE_PGTYPE          (0x0C000000)
        !           170: #define TME_SUN44C_PTE_REF             (0x02000000)
        !           171: #define TME_SUN44C_PTE_MOD             (0x01000000)
        !           172: #define TME_SUN4_PTE_PGFRAME           (0x0007FFFF)
        !           173: #define TME_SUN4C_PTE_PGFRAME          (0x0000FFFF)
        !           174: 
        !           175: /* the PROM location: */
        !           176: #define TME_SUN44C_PROM_BASE           (0xF6000000)
        !           177: #define TME_SUN44C_PROM_SIZE           (0x00040000)
        !           178: 
        !           179: /* the obio addresses of zs0 and zs1: */
        !           180: #define TME_SUN44C_OBIO_ZS0            (0xf1000000)
        !           181: 
        !           182: /* the obio address of the start of the SBus slots: */
        !           183: #define TME_SUN4C_OBIO_SBUS            (0xf8000000)
        !           184: 
        !           185: /* identifiers for the different board bus connections.  the buses are
        !           186:    together at the beginning of the value space: */
        !           187: #define TME_SUN4_32_CONN_BUS_OBIO      (0)
        !           188: #define TME_SUN4_32_CONN_BUS_OBMEM     (1)
        !           189: #define TME_SUN4_CONN_BUS_VME          (2)
        !           190: #define TME_SUN4_32_CONN_BUS_COUNT     (3)
        !           191: #define TME_SUN4_32_CONN_REG_TIMER     (3)
        !           192: #define TME_SUN4_32_CONN_REG_MEMERR    (4)
        !           193: #define TME_SUN4_32_CONN_REG_INTREG    (5)
        !           194: #define TME_SUN4C4M_CONN_REG_AUXREG    (6)
        !           195: #define TME_SUN4_32_CONN_REG_COUNT     (7)
        !           196: 
        !           197: /* the DVMA sizes: */
        !           198: #define TME_SUN4_DVMA_SIZE_VME         (0x00100000)
        !           199: 
        !           200: /* these return nonzero on a match of the IDPROM machine type byte: */
        !           201: #define TME_SUN4_IS_ARCH(sun4, arch)   \
        !           202:   (((sun4)->tme_sun4_idprom_contents[TME_SUN_IDPROM_OFF_MACHTYPE] & TME_SUN_IDPROM_TYPE_MASK_ARCH) == (arch))
        !           203: #define TME_SUN4_IS_MODEL(sun4, model) \
        !           204:   ((sun4)->tme_sun4_idprom_contents[TME_SUN_IDPROM_OFF_MACHTYPE] == (model))
        !           205: #define TME_SUN4_IS_SUN4(sun4)         TME_SUN4_IS_ARCH(sun4, TME_SUN_IDPROM_TYPE_ARCH_SUN4)
        !           206: #define TME_SUN4_IS_SUN4C(sun4)                TME_SUN4_IS_ARCH(sun4, TME_SUN_IDPROM_TYPE_ARCH_SUN4C)
        !           207: #define TME_SUN4_IS_SUN44C(sun4)       TRUE
        !           208: #define TME_SUN4_IS_SUN4M(sun4)                FALSE
        !           209: #define TME_SUN4_IS_SUN4C4M(sun4)      (TME_SUN4_IS_SUN4C(sun4) || TME_SUN4_IS_SUN4M(sun4))
        !           210: 
        !           211: /* this returns the MMU context used by a particular bus connection: */
        !           212: #define TME_SUN44C_BUS_MMU_CONTEXT(sun4, conn_bus)     ((sun4)->tme_sun44c_context)
        !           213: 
        !           214: /* these returns nonzero if memory error testing is visible: */
        !           215: /* on the sun4/4c, memory error testing is visible if there are any
        !           216:    bad addresses and parity checking is enabled, or if bad parity
        !           217:    writing is enabled: */
        !           218: #define TME_SUN44C_MEMERR_VISIBLE(sun4)                        \
        !           219:   ((sun4)->tme_sun4_memerr_bad_memory_count > 0                \
        !           220:    || (((sun4)->tme_sun44c_memerr_csr[0]               \
        !           221:        | (sun4)->tme_sun44c_memerr_csr[1])             \
        !           222:        & TME_SUN44C_MEMERR_PAR_TEST) != 0)
        !           223: 
        !           224: #define TME_SUN4_LOG_HANDLE(sun4)      (&(sun4)->tme_sun4_element->tme_element_log_handle)
        !           225: 
        !           226: /* types: */
        !           227: 
        !           228: /* a sun4 bus connection: */
        !           229: struct tme_sun4_bus_connection {
        !           230: 
        !           231:   /* the generic bus connection: */
        !           232:   struct tme_bus_connection tme_sun4_bus_connection;
        !           233: 
        !           234:   /* what kind of connection this is: */
        !           235:   unsigned int tme_sun4_bus_connection_which;
        !           236: };
        !           237: 
        !           238: /* a sun4 timer: */
        !           239: struct tme_sun4_timer {
        !           240: 
        !           241:   /* a backpointer to the sun4: */
        !           242:   struct tme_sun4 *tme_sun4_timer_sun4;
        !           243: 
        !           244:   /* the real counter and limit register values: */
        !           245:   tme_uint32_t tme_sun4_timer_counter;
        !           246:   tme_uint32_t tme_sun4_timer_limit;
        !           247: 
        !           248:   /* the period of this timer: */
        !           249:   struct timeval tme_sun4_timer_period;
        !           250: 
        !           251:   /* when the timer reaches its next limit: */
        !           252:   struct timeval tme_sun4_timer_limit_next;
        !           253: 
        !           254:   /* a condition for waking up the thread for this timer: */
        !           255:   tme_cond_t tme_sun4_timer_cond;
        !           256: 
        !           257:   /* this is nonzero if the interrupt for this timer is asserted: */
        !           258:   unsigned int tme_sun4_timer_int_asserted;
        !           259: 
        !           260:   /* these are used to track the interrupt rate for this timer: */
        !           261:   tme_uint32_t tme_sun4_timer_track_ints;
        !           262:   struct timeval tme_sun4_timer_track_sample;
        !           263: };
        !           264: 
        !           265: /* a sun4: */
        !           266: struct tme_sun4 {
        !           267: 
        !           268:   /* our mutex: */
        !           269:   tme_mutex_t tme_sun4_mutex;
        !           270: 
        !           271:   /* backpointer to our element: */
        !           272:   struct tme_element *tme_sun4_element;
        !           273: 
        !           274:   /* the IDPROM: */
        !           275:   tme_uint8_t tme_sun4_idprom_contents[TME_SUN_IDPROM_SIZE];
        !           276: 
        !           277:   /* the CPU: */
        !           278:   struct tme_sparc_bus_connection *tme_sun4_sparc;
        !           279: 
        !           280:   /* a set of bus connections: */
        !           281:   struct tme_bus_connection *tme_sun4_buses[TME_SUN4_32_CONN_REG_COUNT];
        !           282: #define tme_sun4_32_obio tme_sun4_buses[TME_SUN4_32_CONN_BUS_OBIO]
        !           283: #define tme_sun4_32_obmem tme_sun4_buses[TME_SUN4_32_CONN_BUS_OBMEM]
        !           284: #define tme_sun4_vmebus tme_sun4_buses[TME_SUN4_CONN_BUS_VME]
        !           285: 
        !           286:   /* these dummy bus connection structures are used to thread bus
        !           287:      information to bus error handlers: */
        !           288:   struct tme_connection tme_sun4_dummy_connection_sparc;
        !           289: 
        !           290:   /* these structures are used to thread ASI information to a control
        !           291:      cycle handler.  if the backpointer for an ASI is NULL, the ASI is
        !           292:      undefined: */
        !           293:   struct tme_sun4_asi {
        !           294:     struct tme_sun4 *tme_sun4_asi_sun4;
        !           295:   } tme_sun4_asis[TME_SUN4_32_ASI_COUNT];
        !           296: 
        !           297:   /* the current TLB fill function: */
        !           298:   int (*tme_sun4_tlb_fill) _TME_P((const struct tme_bus_connection *,
        !           299:                                   struct tme_bus_tlb *,
        !           300:                                   tme_uint32_t *,
        !           301:                                   tme_uint32_t,
        !           302:                                   unsigned int));
        !           303: 
        !           304:   /* visible memory test support: */
        !           305:   struct tme_bus_tlb *tme_sun4_memtest_tlb;
        !           306:   tme_uint32_t tme_sun4_memtest_tlb_asi_mask;
        !           307: 
        !           308:   /* cache support: */
        !           309:   unsigned int tme_sun4_cache_size_log2;
        !           310:   unsigned int tme_sun4_cache_size_line_log2;
        !           311:   unsigned int tme_sun4_cache_writeback;
        !           312:   tme_shared tme_uint8_t *tme_sun4_cache_data;
        !           313:   tme_rwlock_t tme_sun4_cache_rwlock;
        !           314:   tme_uint32_t tme_sun4_cache_visible;
        !           315:   struct tme_bus_tlb tme_sun4_cache_tlb_internal;
        !           316: 
        !           317:   /* memory error support: */
        !           318:   unsigned int tme_sun4_memerr_int_asserted;
        !           319:   const tme_shared tme_uint8_t *tme_sun4_memerr_bad_memory[128];
        !           320:   unsigned int tme_sun4_memerr_bad_memory_count;
        !           321:   const tme_shared tme_uint8_t *tme_sun4_memerr_tlb_emulator_off_read;
        !           322:   tme_shared tme_uint8_t *tme_sun4_memerr_tlb_emulator_off_write;
        !           323: 
        !           324:   /* timer support: */
        !           325:   unsigned int tme_sun4_timer_callouts_running;
        !           326:   struct tme_sun4_timer tme_sun4_timers[2];
        !           327: #define tme_sun4_timer_l10 tme_sun4_timers[0]
        !           328: #define tme_sun4_timer_l14 tme_sun4_timers[1]
        !           329: 
        !           330:   /* the sun4/4c MMU and context register: */
        !           331:   void *tme_sun44c_mmu;
        !           332:   tme_uint32_t tme_sun44c_mmu_pmegs;
        !           333:   tme_uint8_t tme_sun44c_context;
        !           334: 
        !           335:   /* the sun4/4c enable register: */
        !           336:   tme_uint8_t tme_sun44c_enable;
        !           337: 
        !           338:   /* the sun4/4c UDVMA register: */
        !           339:   tme_uint8_t tme_sun4_udvma;
        !           340: 
        !           341:   /* the sun4 bus error register: */
        !           342:   tme_uint8_t tme_sun4_buserr;
        !           343: 
        !           344:   /* the sun4 diagnostic register: */
        !           345:   tme_uint8_t tme_sun4_diag;
        !           346: 
        !           347:   /* the sun4/4c interrupt register: */
        !           348:   tme_uint8_t tme_sun44c_ints;
        !           349: 
        !           350:   /* the sun4c/4m auxiliary register: */
        !           351:   tme_uint8_t tme_sun4c4m_aux;
        !           352: 
        !           353:   /* the sun4/4c cache: */
        !           354:   tme_uint32_t *tme_sun44c_cache_tags;
        !           355: 
        !           356:   /* the sun4c synchronous and asynchronous error registers: */
        !           357:   tme_uint32_t tme_sun4c_sync_err;
        !           358:   tme_uint32_t tme_sun4c_sync_vaddr;
        !           359:   tme_uint32_t tme_sun4c_async_err;
        !           360:   tme_uint32_t tme_sun4c_async_vaddr;
        !           361:   tme_uint32_t tme_sun4c_async_data_lo;
        !           362:   tme_uint32_t tme_sun4c_async_data_hi;
        !           363: 
        !           364:   /* the sun4/4c memory error registers: */
        !           365:   tme_uint32_t tme_sun44c_memerr_csr[2];
        !           366:   tme_uint32_t tme_sun4c_memerr_parctl[2];
        !           367:   tme_uint32_t tme_sun4_memerr_vaddr;
        !           368: 
        !           369:   /* the interrupt lines that are being asserted: */
        !           370:   tme_uint8_t tme_sun4_int_signals[(TME_SPARC_IPL_MAX + 1 + 7) >> 3];
        !           371: 
        !           372:   /* the last ipl we gave to the CPU: */
        !           373:   unsigned int tme_sun4_int_ipl_last;
        !           374: 
        !           375:   /* the set of active sun4/4c boot state TLB entries: */
        !           376:   unsigned int tme_sun44c_boot_state_tlb_next;
        !           377: #define TME_SUN44C_BOOT_STATE_TLBS     (8)
        !           378:   struct tme_bus_tlb *tme_sun44c_boot_state_tlbs[TME_SUN44C_BOOT_STATE_TLBS];
        !           379: 
        !           380:   /* the set of active sun4/4c SDVMA TLB entries: */
        !           381:   unsigned int tme_sun44c_sdvma_tlb_next;
        !           382: #define TME_SUN44C_SDVMA_TLBS          (16)
        !           383:   struct tme_bus_tlb *tme_sun44c_sdvma_tlbs[TME_SUN44C_SDVMA_TLBS];
        !           384: };
        !           385: 
        !           386: /* sun4/4c cache prototypes: */
        !           387: void _tme_sun44c_cache_new _TME_P((struct tme_sun4 *));
        !           388: void _tme_sun44c_cache_enable_change _TME_P((struct tme_sun4 *));
        !           389: int _tme_sun44c_cache_cycle_control _TME_P((struct tme_sun4 *, struct tme_bus_cycle *));
        !           390: void _tme_sun44c_cache_cycle_flush _TME_P((struct tme_sun4 *sun4, tme_uint32_t, tme_uint32_t));
        !           391: 
        !           392: /* sun4/4c memory error prototypes: */
        !           393: int _tme_sun44c_memerr_cycle_control _TME_P((void *, struct tme_bus_cycle *));
        !           394: int _tme_sun44c_memerr_cycle_bus _TME_P((void *, struct tme_bus_cycle *));
        !           395: int _tme_sun44c_memerr_check _TME_P((const struct tme_bus_connection *, tme_uint32_t, tme_uint32_t, const tme_shared tme_uint8_t *, unsigned int));
        !           396: void _tme_sun44c_memerr_update _TME_P((struct tme_sun4 *, tme_uint32_t, const tme_shared tme_uint8_t *, unsigned int));
        !           397: int _tme_sun44c_tlb_fill_memerr _TME_P((const struct tme_bus_connection *,
        !           398:                                        struct tme_bus_tlb *,
        !           399:                                        tme_uint32_t *,
        !           400:                                        tme_uint32_t,
        !           401:                                        unsigned int));
        !           402: 
        !           403: /* sun4/4c MMU prototypes: */
        !           404: void _tme_sun44c_mmu_new _TME_P((struct tme_sun4 *));
        !           405: int _tme_sun44c_mmu_tlb_set_allocate _TME_P((struct tme_bus_connection *,
        !           406:                                             unsigned int, unsigned int, 
        !           407:                                             struct tme_bus_tlb * tme_shared *,
        !           408:                                             tme_rwlock_t *));
        !           409: void _tme_sun44c_mmu_sdvma_change _TME_P((struct tme_sun4 *));
        !           410: void _tme_sun44c_mmu_context_set _TME_P((struct tme_sun4 *));
        !           411: int _tme_sun44c_mmu_pte_get _TME_P((struct tme_sun4 *, tme_uint32_t, tme_uint32_t *));
        !           412: int _tme_sun44c_mmu_pte_set _TME_P((struct tme_sun4 *, tme_uint32_t, tme_uint32_t));
        !           413: int _tme_sun44c_mmu_proterr _TME_P((void *, struct tme_bus_cycle *));
        !           414: int _tme_sun44c_tlb_fill_sparc _TME_P((struct tme_sparc_bus_connection *,
        !           415:                                       struct tme_sparc_tlb *,
        !           416:                                       tme_uint32_t asi_mask,
        !           417:                                       tme_bus_addr_t address,
        !           418:                                       unsigned int cycles));
        !           419: int _tme_sun44c_tlb_fill_bus _TME_P((struct tme_bus_connection *,
        !           420:                                     struct tme_bus_tlb *,
        !           421:                                     tme_uint32_t,
        !           422:                                     unsigned int));
        !           423: int _tme_sun44c_tlb_fill_mmu _TME_P((const struct tme_bus_connection *,
        !           424:                                     struct tme_bus_tlb *,
        !           425:                                     tme_uint32_t *,
        !           426:                                     tme_uint32_t,
        !           427:                                     unsigned int));
        !           428: int _tme_sun44c_ob_fault_handler _TME_P((void *, struct tme_bus_tlb *, struct tme_bus_cycle *, int));
        !           429: 
        !           430: /* timer prototypes: */
        !           431: void _tme_sun4_timer_new _TME_P((struct tme_sun4 *));
        !           432: int _tme_sun4_timer_cycle_control _TME_P((void *, struct tme_bus_cycle *));
        !           433: void _tme_sun4_timer_int_force _TME_P((struct tme_sun4 *, struct tme_sun4_timer *));
        !           434: 
        !           435: /* other prototypes: */
        !           436: int _tme_sun44c_control_cycle_handler _TME_P((void *, struct tme_bus_cycle *));
        !           437: int _tme_sun44c_intreg_cycle_control _TME_P((void *, struct tme_bus_cycle *));
        !           438: int _tme_sun4c_auxreg_cycle_control _TME_P((void *, struct tme_bus_cycle *));
        !           439: int _tme_sun4_ipl_check _TME_P((struct tme_sun4 *));
        !           440: int _tme_sun4_reset _TME_P((struct tme_sun4 *, int));
        !           441: 
        !           442: #endif /* !_MACHINE_SUN4_IMPL_H */

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