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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * CIA chip support
5: *
6: * Copyright 1995 Bernd Schmidt, Alessandro Bissacco
1.1.1.3 root 7: * Copyright 1996, 1997 Stefan Reinauer, Christian Schmitt
1.1 root 8: */
9:
10: #include "sysconfig.h"
11: #include "sysdeps.h"
12: #include <assert.h>
13:
14: #include "config.h"
15: #include "options.h"
1.1.1.3 root 16: #include "threaddep/penguin.h"
1.1 root 17: #include "events.h"
18: #include "memory.h"
19: #include "custom.h"
20: #include "cia.h"
1.1.1.3 root 21: #include "serial.h"
1.1 root 22: #include "disk.h"
23: #include "xwin.h"
24: #include "keybuf.h"
25: #include "gui.h"
26:
27: #define DIV10 5 /* Yes, a bad identifier. */
28:
29: /* battclock stuff */
30: #define RTC_D_ADJ 8
31: #define RTC_D_IRQ 4
32: #define RTC_D_BUSY 2
33: #define RTC_D_HOLD 1
34: #define RTC_E_t1 8
35: #define RTC_E_t0 4
36: #define RTC_E_INTR 2
37: #define RTC_E_MASK 1
38: #define RTC_F_TEST 8
39: #define RTC_F_24_12 4
40: #define RTC_F_STOP 2
41: #define RTC_F_RSET 1
42:
1.1.1.3 root 43: static unsigned int clock_control_d = RTC_D_ADJ + RTC_D_HOLD;
44: static unsigned int clock_control_e = 0;
45: static unsigned int clock_control_f = RTC_F_24_12;
46:
47: unsigned int ciaaicr,ciaaimask,ciabicr,ciabimask;
48: unsigned int ciaacra,ciaacrb,ciabcra,ciabcrb;
49: unsigned long ciaata,ciaatb,ciabta,ciabtb;
50: unsigned long ciaatod,ciabtod,ciaatol,ciabtol,ciaaalarm,ciabalarm;
1.1.1.2 root 51: int ciaatlatch,ciabtlatch;
1.1.1.3 root 52:
53: unsigned int ciabpra;
54:
55: unsigned int gui_ledstate;
56:
57: static unsigned long ciaala,ciaalb,ciabla,ciablb;
58: static int ciaatodon, ciabtodon;
59: static unsigned int ciaapra,ciaaprb,ciaadra,ciaadrb,ciaasdr;
60: static unsigned int ciabprb,ciabdra,ciabdrb,ciabsdr;
1.1 root 61: static int div10;
1.1.1.2 root 62: static int kbstate, kback, ciaasdr_unread = 0;
1.1 root 63:
64: static int prtopen;
65: static FILE *prttmp;
66:
1.1.1.3 root 67: static void setclr(unsigned int *p, unsigned int val)
1.1 root 68: {
69: if (val & 0x80) {
70: *p |= val & 0x7F;
71: } else {
72: *p &= ~val;
73: }
74: }
75:
76: static void RethinkICRA(void)
77: {
78: if (ciaaimask & ciaaicr) {
79: ciaaicr |= 0x80;
80: custom_bank.wput(0xDFF09C,0x8008);
81: } else {
82: ciaaicr &= 0x7F;
83: /* custom_bank.wput(0xDFF09C,0x0008);*/
84: }
85: }
86:
87: static void RethinkICRB(void)
88: {
89: #if 0 /* ??? What's this then? */
90: if (ciabicr & 0x10) {
91: custom_bank.wput(0xDFF09C,0x9000);
92: }
93: #endif
94: if (ciabimask & ciabicr) {
95: ciabicr |= 0x80;
96: custom_bank.wput(0xDFF09C,0xA000);
97: } else {
98: ciabicr &= 0x7F;
99: /* custom_bank.wput(0xDFF09C,0x2000);*/
100: }
101: }
102:
103: static int lastdiv10;
104:
105: static void CIA_update(void)
106: {
107: unsigned long int ccount = cycles - eventtab[ev_cia].oldcycles + lastdiv10;
108: unsigned long int ciaclocks = ccount / DIV10;
109:
110: int aovfla = 0, aovflb = 0, bovfla = 0, bovflb = 0;
111:
112: lastdiv10 = div10;
113: div10 = ccount % DIV10;
1.1.1.3 root 114:
1.1 root 115: /* CIA A timers */
116: if ((ciaacra & 0x21) == 0x01) {
117: assert((ciaata+1) >= ciaclocks);
118: if ((ciaata+1) == ciaclocks) {
119: aovfla = 1;
120: if ((ciaacrb & 0x61) == 0x41) {
1.1.1.3 root 121: if (ciaatb-- == 0) aovflb = 1;
1.1 root 122: }
1.1.1.3 root 123: }
1.1 root 124: ciaata -= ciaclocks;
125: }
126: if ((ciaacrb & 0x61) == 0x01) {
127: assert((ciaatb+1) >= ciaclocks);
128: if ((ciaatb+1) == ciaclocks) aovflb = 1;
129: ciaatb -= ciaclocks;
130: }
1.1.1.3 root 131:
1.1 root 132: /* CIA B timers */
133: if ((ciabcra & 0x21) == 0x01) {
134: assert((ciabta+1) >= ciaclocks);
135: if ((ciabta+1) == ciaclocks) {
136: bovfla = 1;
137: if ((ciabcrb & 0x61) == 0x41) {
138: if (ciabtb-- == 0) bovflb = 1;
139: }
1.1.1.3 root 140: }
1.1 root 141: ciabta -= ciaclocks;
142: }
143: if ((ciabcrb & 0x61) == 0x01) {
144: assert ((ciabtb+1) >= ciaclocks);
145: if ((ciabtb+1) == ciaclocks) bovflb = 1;
146: ciabtb -= ciaclocks;
147: }
148: if (aovfla) {
149: ciaaicr |= 1; RethinkICRA();
150: ciaata = ciaala;
151: if (ciaacra & 0x8) ciaacra &= ~1;
152: }
153: if (aovflb) {
154: ciaaicr |= 2; RethinkICRA();
155: ciaatb = ciaalb;
156: if (ciaacrb & 0x8) ciaacrb &= ~1;
157: }
158: if (bovfla) {
159: ciabicr |= 1; RethinkICRB();
160: ciabta = ciabla;
161: if (ciabcra & 0x8) ciabcra &= ~1;
162: }
163: if (bovflb) {
164: ciabicr |= 2; RethinkICRB();
165: ciabtb = ciablb;
166: if (ciabcrb & 0x8) ciabcrb &= ~1;
167: }
168: }
169:
170: static void CIA_calctimers(void)
171: {
172: int ciaatimea = -1, ciaatimeb = -1, ciabtimea = -1, ciabtimeb = -1;
173:
174: eventtab[ev_cia].oldcycles = cycles;
1.1.1.3 root 175:
1.1 root 176: if ((ciaacra & 0x21) == 0x01) {
1.1.1.3 root 177: ciaatimea = (DIV10-div10) + DIV10*ciaata;
1.1 root 178: }
179: if ((ciaacrb & 0x61) == 0x41) {
180: /* Timer B will not get any pulses if Timer A is off. */
181: if (ciaatimea >= 0) {
182: /* If Timer A is in one-shot mode, and Timer B needs more than
183: * one pulse, it will not underflow. */
184: if (ciaatb == 0 || (ciaacra & 0x8) == 0) {
185: /* Otherwise, we can determine the time of the underflow. */
186: ciaatimeb = ciaatimea + ciaala * DIV10 * ciaatb;
187: }
188: }
189: }
190: if ((ciaacrb & 0x61) == 0x01) {
191: ciaatimeb = (DIV10-div10) + DIV10*ciaatb;
192: }
193:
194: if ((ciabcra & 0x21) == 0x01) {
1.1.1.3 root 195: ciabtimea = (DIV10-div10) + DIV10*ciabta;
1.1 root 196: }
197: if ((ciabcrb & 0x61) == 0x41) {
198: /* Timer B will not get any pulses if Timer A is off. */
199: if (ciabtimea >= 0) {
200: /* If Timer A is in one-shot mode, and Timer B needs more than
201: * one pulse, it will not underflow. */
202: if (ciabtb == 0 || (ciabcra & 0x8) == 0) {
203: /* Otherwise, we can determine the time of the underflow. */
204: ciabtimeb = ciabtimea + ciabla * DIV10 * ciabtb;
205: }
206: }
207: }
208: if ((ciabcrb & 0x61) == 0x01) {
209: ciabtimeb = (DIV10-div10) + DIV10*ciabtb;
210: }
211: eventtab[ev_cia].active = (ciaatimea != -1 || ciaatimeb != -1
212: || ciabtimea != -1 || ciabtimeb != -1);
213: if (eventtab[ev_cia].active) {
214: unsigned long int ciatime = ~0L;
215: if (ciaatimea != -1) ciatime = ciaatimea;
216: if (ciaatimeb != -1 && ciaatimeb < ciatime) ciatime = ciaatimeb;
217: if (ciabtimea != -1 && ciabtimea < ciatime) ciatime = ciabtimea;
218: if (ciabtimeb != -1 && ciabtimeb < ciatime) ciatime = ciabtimeb;
219: eventtab[ev_cia].evtime = ciatime + cycles;
220: }
221: events_schedule();
222: }
223:
224: void CIA_handler(void)
225: {
226: CIA_update();
227: CIA_calctimers();
228: }
229:
230: void diskindex_handler(void)
231: {
232: eventtab[ev_diskindex].evtime += cycles - eventtab[ev_diskindex].oldcycles;
233: eventtab[ev_diskindex].oldcycles = cycles;
234: /* printf(".\n");*/
235: ciabicr |= 0x10;
236: RethinkICRB();
237: }
238:
239: void CIA_hsync_handler(void)
240: {
1.1.1.3 root 241: static unsigned int keytime = 0, sleepyhead = 0;
1.1 root 242:
243: if (ciabtodon)
244: ciabtod++;
245: ciabtod &= 0xFFFFFF;
246:
247: if (ciabtod == ciabalarm) {
248: ciabicr |= 4; RethinkICRB();
249: }
1.1.1.3 root 250:
251: /* check wether the serial port gets some data */
252: if (doreadser)
253: doreadser = SERDATS();
254:
1.1 root 255: if (keys_available() && kback && (++keytime & 15) == 0) {
1.1.1.3 root 256: /*
1.1.1.2 root 257: * This hack lets one possible ciaaicr cycle go by without any key
258: * being read, for every cycle in which a key is pulled out of the
259: * queue. If no hack is used, a lot of key events just get lost
260: * when you type fast. With a simple hack that waits for ciaasdr
261: * to be read before feeding it another, it will keep up until the
262: * queue gets about 14 characters ahead and then lose events, and
263: * the mouse pointer will freeze while typing is being taken in.
264: * With this hack, you can type 30 or 40 characters ahead with little
265: * or no lossage, and the mouse doesn't get stuck. The tradeoff is
266: * that the total slowness of typing appearing on screen is worse.
267: */
1.1.1.3 root 268: if (ciaasdr_unread == 2)
269: ciaasdr_unread = 0;
270: else if (ciaasdr_unread == 0) {
271: switch (kbstate) {
1.1.1.2 root 272: case 0:
1.1.1.3 root 273: ciaasdr = (uae_s8)~0xFB; /* aaarghh... stupid compiler */
274: kbstate++;
275: break;
1.1.1.2 root 276: case 1:
1.1.1.3 root 277: kbstate++;
278: ciaasdr = (uae_s8)~0xFD;
279: break;
1.1.1.2 root 280: case 2:
1.1.1.3 root 281: ciaasdr = ~get_next_key();
282: ciaasdr_unread = 1; /* interlock to prevent lost keystrokes */
283: break;
1.1.1.2 root 284: }
285: ciaaicr |= 8;
286: RethinkICRA();
287: sleepyhead = 0;
1.1.1.3 root 288: } else if (!(++sleepyhead & 15))
289: ciaasdr_unread = 0; /* give up on this key event after unread for a long time */
1.1 root 290: }
291: }
292:
293: void CIA_vsync_handler()
1.1.1.3 root 294: {
295: if (ciaatodon)
1.1 root 296: ciaatod++;
297: ciaatod &= 0xFFFFFF;
298: if (ciaatod == ciaaalarm) {
299: ciaaicr |= 4; RethinkICRA();
300: }
1.1.1.3 root 301:
302: doreadser = 1;
303: serstat = -1;
304: serial_flush_buffer();
1.1 root 305: }
306:
1.1.1.3 root 307: static uae_u8 ReadCIAA(unsigned int addr)
1.1 root 308: {
1.1.1.3 root 309: unsigned int tmp;
310:
1.1.1.5 root 311: switch(addr & 0xf) {
1.1.1.3 root 312: case 0:
313: if (currprefs.use_serial && (serstat < 0)) /* Only read status when needed */
314: serstat=serial_readstatus(); /* and only once per frame */
315:
1.1 root 316: tmp = (DISK_status() & 0x3C);
1.1.1.6 ! root 317: if ((JSEM_ISMOUSE (0, &currprefs) && !buttonstate[0])
! 318: || (!JSEM_ISMOUSE (0, &currprefs) && !(joy0button & 1)))
1.1.1.3 root 319: tmp |= 0x40;
320: if (!(joy1button & 1))
321: tmp |= 0x80;
1.1 root 322: return tmp;
323: case 1:
324: return ciaaprb;
325: case 2:
326: return ciaadra;
327: case 3:
328: return ciaadrb;
329: case 4:
330: return ciaata & 0xff;
331: case 5:
332: return ciaata >> 8;
333: case 6:
334: return ciaatb & 0xff;
335: case 7:
336: return ciaatb >> 8;
337: case 8:
338: if (ciaatlatch) {
339: ciaatlatch = 0;
340: return ciaatol & 0xff;
1.1.1.3 root 341: } else
342: return ciaatod & 0xff;
1.1 root 343: case 9:
1.1.1.3 root 344: if (ciaatlatch)
345: return (ciaatol >> 8) & 0xff;
346: else
347: return (ciaatod >> 8) & 0xff;
1.1 root 348: case 10:
1.1.1.3 root 349: ciaatlatch = 1;
350: ciaatol = ciaatod; /* ??? only if not already latched? */
1.1 root 351: return (ciaatol >> 16) & 0xff;
352: case 12:
1.1.1.3 root 353: if (ciaasdr == 1) ciaasdr_unread = 2;
1.1 root 354: return ciaasdr;
355: case 13:
356: tmp = ciaaicr; ciaaicr = 0; RethinkICRA(); return tmp;
357: case 14:
358: return ciaacra;
359: case 15:
360: return ciaacrb;
361: }
362: return 0;
363: }
364:
1.1.1.3 root 365: static uae_u8 ReadCIAB(unsigned int addr)
1.1 root 366: {
1.1.1.3 root 367: unsigned int tmp;
368:
1.1.1.5 root 369: switch(addr & 0xf) {
1.1.1.3 root 370: case 0:
371: if (currprefs.use_serial && serstat < 0) /* Only read status when needed */
372: serstat=serial_readstatus(); /* and only once per frame */
1.1 root 373: return ciabpra;
374: case 1:
375: return ciabprb;
376: case 2:
377: return ciabdra;
378: case 3:
379: return ciabdrb;
380: case 4:
381: return ciabta & 0xff;
382: case 5:
383: return ciabta >> 8;
384: case 6:
385: return ciabtb & 0xff;
386: case 7:
387: return ciabtb >> 8;
388: case 8:
389: if (ciabtlatch) {
390: ciabtlatch = 0;
391: return ciabtol & 0xff;
1.1.1.3 root 392: } else
393: return ciabtod & 0xff;
1.1 root 394: case 9:
1.1.1.3 root 395: if (ciabtlatch)
396: return (ciabtol >> 8) & 0xff;
397: else
398: return (ciabtod >> 8) & 0xff;
1.1 root 399: case 10:
1.1.1.3 root 400: ciabtlatch = 1;
401: ciabtol = ciabtod;
1.1 root 402: return (ciabtol >> 16) & 0xff;
403: case 12:
404: return ciabsdr;
405: case 13:
406: tmp = ciabicr; ciabicr = 0; RethinkICRB();
407: return tmp;
408: case 14:
409: return ciabcra;
410: case 15:
411: return ciabcrb;
412: }
413: return 0;
414: }
415:
1.1.1.3 root 416: static void WriteCIAA(uae_u16 addr,uae_u8 val)
1.1 root 417: {
1.1.1.3 root 418: int oldled, oldovl;
1.1.1.5 root 419: switch(addr & 0xf) {
1.1 root 420: case 0:
1.1.1.3 root 421: oldovl = ciaapra & 1;
1.1 root 422: oldled = ciaapra & 2;
423: ciaapra = (ciaapra & ~0x3) | (val & 0x3); LED(ciaapra & 0x2);
1.1.1.3 root 424: gui_ledstate &= ~1;
425: gui_ledstate |= ((~ciaapra & 2) >> 1);
1.1 root 426: if ((ciaapra & 2) != oldled)
427: gui_led (0, !(ciaapra & 2));
1.1.1.3 root 428: if ((ciaapra & 1) != oldovl) {
429: map_banks(oldovl || ersatzkickfile ? &chipmem_bank : &kickmem_bank, 0, 32);
430: }
1.1 root 431: break;
432: case 1:
433: ciaaprb = val;
434: if (prtopen==1) {
435: #ifndef __DOS__
1.1.1.4 root 436: fprintf (prttmp, "%c",val);
1.1 root 437: #else
438: fputc (val, prttmp);
439: fflush (prttmp);
440: #endif
441: if (val==0x04) {
1.1.1.2 root 442: #if defined(__unix) && !defined(__BEOS__) && !defined(__DOS__)
1.1 root 443: pclose (prttmp);
444: #else
445: fclose (prttmp);
446: #endif
447: prtopen = 0;
448: }
1.1.1.3 root 449: } else {
1.1.1.2 root 450: #if defined(__unix) && !defined(__BEOS__) && !defined(__DOS__)
1.1.1.6 ! root 451: prttmp = (FILE *)popen ((const char *)currprefs.prtname, "w");
1.1 root 452: #else
1.1.1.6 ! root 453: prttmp = (FILE *)fopen ((const char *)currprefs.prtname, "wb");
1.1 root 454: #endif
455: if (prttmp != NULL) {
456: prtopen = 1;
457: #ifndef __DOS__
458: fprintf (prttmp,"%c",val);
459: #else
460: fputc (val, prttmp);
461: fflush (prttmp);
462: #endif
463: }
1.1.1.3 root 464: }
1.1 root 465: ciaaicr |= 0x10;
466: break;
467: case 2:
468: ciaadra = val; break;
469: case 3:
470: ciaadrb = val; break;
471: case 4:
472: CIA_update();
473: ciaala = (ciaala & 0xff00) | val;
474: CIA_calctimers();
475: break;
476: case 5:
477: CIA_update();
478: ciaala = (ciaala & 0xff) | (val << 8);
479: if ((ciaacra & 1) == 0)
480: ciaata = ciaala;
1.1.1.3 root 481: if (ciaacra & 8) {
482: ciaata = ciaala;
483: ciaacra |= 1;
1.1 root 484: }
485: CIA_calctimers();
486: break;
487: case 6:
488: CIA_update();
489: ciaalb = (ciaalb & 0xff00) | val;
490: CIA_calctimers();
491: break;
492: case 7:
493: CIA_update();
494: ciaalb = (ciaalb & 0xff) | (val << 8);
495: if ((ciaacrb & 1) == 0)
496: ciaatb = ciaalb;
1.1.1.3 root 497: if (ciaacrb & 8) {
1.1 root 498: ciaatb = ciaalb;
1.1.1.3 root 499: ciaacrb |= 1;
1.1 root 500: }
501: CIA_calctimers();
502: break;
503: case 8:
1.1.1.5 root 504: if (ciaacrb & 0x80) {
1.1 root 505: ciaaalarm = (ciaaalarm & ~0xff) | val;
506: } else {
507: ciaatod = (ciaatod & ~0xff) | val;
508: ciaatodon = 1;
509: }
510: break;
511: case 9:
1.1.1.5 root 512: if (ciaacrb & 0x80) {
1.1 root 513: ciaaalarm = (ciaaalarm & ~0xff00) | (val << 8);
514: } else {
515: ciaatod = (ciaatod & ~0xff00) | (val << 8);
516: ciaatodon = 0;
517: }
518: break;
519: case 10:
1.1.1.5 root 520: if (ciaacrb & 0x80) {
1.1 root 521: ciaaalarm = (ciaaalarm & ~0xff0000) | (val << 16);
522: } else {
523: ciaatod = (ciaatod & ~0xff0000) | (val << 16);
524: ciaatodon = 0;
525: }
526: break;
527: case 12:
528: ciaasdr = val; break;
529: case 13:
530: setclr(&ciaaimask,val); break; /* ??? call RethinkICR() ? */
531: case 14:
532: CIA_update();
533: ciaacra = val;
1.1.1.5 root 534: if (ciaacra & 0x10) {
1.1 root 535: ciaacra &= ~0x10;
536: ciaata = ciaala;
537: }
538: if (ciaacra & 0x40) {
539: kback = 1;
540: }
541: CIA_calctimers();
542: break;
543: case 15:
544: CIA_update();
1.1.1.3 root 545: ciaacrb = val;
1.1.1.5 root 546: if (ciaacrb & 0x10) {
1.1 root 547: ciaacrb &= ~0x10;
548: ciaatb = ciaalb;
549: }
550: CIA_calctimers();
551: break;
552: }
553: }
554:
1.1.1.3 root 555: static void WriteCIAB(uae_u16 addr,uae_u8 val)
1.1 root 556: {
1.1.1.3 root 557: int oldval;
1.1.1.5 root 558: switch(addr & 0xf) {
1.1 root 559: case 0:
1.1.1.3 root 560: if (currprefs.use_serial) {
561: oldval = ciabpra;
562: ciabpra = serial_writestatus(oldval,val);
563: } else
564: ciabpra = val;
565: break;
1.1 root 566: case 1:
567: ciabprb = val; DISK_select(val); break;
568: case 2:
569: ciabdra = val; break;
570: case 3:
571: ciabdrb = val; break;
572: case 4:
573: CIA_update();
574: ciabla = (ciabla & 0xff00) | val;
575: CIA_calctimers();
576: break;
577: case 5:
578: CIA_update();
579: ciabla = (ciabla & 0xff) | (val << 8);
1.1.1.3 root 580: if ((ciabcra & 1) == 0)
1.1 root 581: ciabta = ciabla;
582: if (ciabcra & 8) {
1.1.1.3 root 583: ciabta = ciabla;
584: ciabcra |= 1;
585: }
1.1 root 586: CIA_calctimers();
587: break;
588: case 6:
589: CIA_update();
590: ciablb = (ciablb & 0xff00) | val;
591: CIA_calctimers();
592: break;
593: case 7:
594: CIA_update();
595: ciablb = (ciablb & 0xff) | (val << 8);
596: if ((ciabcrb & 1) == 0)
597: ciabtb = ciablb;
598: if (ciabcrb & 8) {
599: ciabtb = ciablb;
600: ciabcrb |= 1;
601: }
602: CIA_calctimers();
603: break;
604: case 8:
1.1.1.5 root 605: if (ciabcrb & 0x80) {
1.1 root 606: ciabalarm = (ciabalarm & ~0xff) | val;
607: } else {
608: ciabtod = (ciabtod & ~0xff) | val;
609: ciabtodon = 1;
610: }
611: break;
612: case 9:
1.1.1.5 root 613: if (ciabcrb & 0x80) {
1.1 root 614: ciabalarm = (ciabalarm & ~0xff00) | (val << 8);
615: } else {
616: ciabtod = (ciabtod & ~0xff00) | (val << 8);
617: ciabtodon = 0;
618: }
619: break;
620: case 10:
1.1.1.5 root 621: if (ciabcrb & 0x80) {
1.1 root 622: ciabalarm = (ciabalarm & ~0xff0000) | (val << 16);
623: } else {
624: ciabtod = (ciabtod & ~0xff0000) | (val << 16);
625: ciabtodon = 0;
626: }
627: break;
628: case 12:
1.1.1.3 root 629: ciabsdr = val;
1.1 root 630: break;
631: case 13:
1.1.1.3 root 632: setclr(&ciabimask,val);
1.1 root 633: break;
634: case 14:
635: CIA_update();
636: ciabcra = val;
1.1.1.5 root 637: if (ciabcra & 0x10) {
1.1 root 638: ciabcra &= ~0x10;
639: ciabta = ciabla;
640: }
641: CIA_calctimers();
642: break;
643: case 15:
644: CIA_update();
1.1.1.3 root 645: ciabcrb = val;
1.1.1.5 root 646: if (ciabcrb & 0x10) {
1.1 root 647: ciabcrb &= ~0x10;
648: ciabtb = ciablb;
649: }
650: CIA_calctimers();
651: break;
652: }
653: }
654:
655: void CIA_reset(void)
656: {
657: kback = 1;
658: kbstate = 0;
1.1.1.3 root 659:
1.1 root 660: ciaatlatch = ciabtlatch = 0;
1.1.1.3 root 661: ciaapra = 3;
1.1 root 662: ciaatod = ciabtod = 0; ciaatodon = ciabtodon = 0;
663: ciaaicr = ciabicr = ciaaimask = ciabimask = 0;
664: ciaacra = ciaacrb = ciabcra = ciabcrb = 0x4; /* outmode = toggle; */
665: ciaala = ciaalb = ciabla = ciablb = ciaata = ciaatb = ciabta = ciabtb = 0xFFFF;
666: div10 = 0;
667: lastdiv10 = 0;
668: CIA_calctimers();
1.1.1.2 root 669: ciabpra = 0x8C;
1.1.1.3 root 670: if (! ersatzkickfile)
671: map_banks(&kickmem_bank, 0, 32);
672:
673: if (currprefs.use_serial) serial_dtr_off(); /* Drop DTR at reset */
1.1 root 674: }
675:
676: void dumpcia(void)
677: {
678: printf("A: CRA: %02x, CRB: %02x, IMASK: %02x, TOD: %08lx %7s TA: %04lx, TB: %04lx\n",
1.1.1.3 root 679: (int)ciaacra, (int)ciaacrb, (int)ciaaimask, ciaatod,
1.1 root 680: ciaatlatch ? " latched" : "", ciaata, ciaatb);
681: printf("B: CRA: %02x, CRB: %02x, IMASK: %02x, TOD: %08lx %7s TA: %04lx, TB: %04lx\n",
1.1.1.3 root 682: (int)ciabcra, (int)ciabcrb, (int)ciabimask, ciabtod,
1.1 root 683: ciabtlatch ? " latched" : "", ciabta, ciabtb);
684: }
685:
686: /* CIA memory access */
687:
1.1.1.3 root 688: static uae_u32 cia_lget (uaecptr) REGPARAM;
689: static uae_u32 cia_wget (uaecptr) REGPARAM;
690: static uae_u32 cia_bget (uaecptr) REGPARAM;
691: static void cia_lput (uaecptr, uae_u32) REGPARAM;
692: static void cia_wput (uaecptr, uae_u32) REGPARAM;
693: static void cia_bput (uaecptr, uae_u32) REGPARAM;
1.1 root 694:
695: addrbank cia_bank = {
696: cia_lget, cia_wget, cia_bget,
697: cia_lput, cia_wput, cia_bput,
698: default_xlate, default_check
699: };
700:
1.1.1.3 root 701: uae_u32 REGPARAM2 cia_lget (uaecptr addr)
1.1 root 702: {
703: return cia_bget(addr+3);
704: }
705:
1.1.1.3 root 706: uae_u32 REGPARAM2 cia_wget (uaecptr addr)
1.1 root 707: {
708: return cia_bget(addr+1);
709: }
710:
1.1.1.3 root 711: uae_u32 REGPARAM2 cia_bget (uaecptr addr)
1.1 root 712: {
713: if ((addr & 0x3001) == 0x2001)
1.1.1.3 root 714: return ReadCIAA((addr & 0xF00) >> 8);
1.1 root 715: if ((addr & 0x3001) == 0x1000)
1.1.1.3 root 716: return ReadCIAB((addr & 0xF00) >> 8);
1.1 root 717: return 0;
718: }
719:
1.1.1.3 root 720: void REGPARAM2 cia_lput (uaecptr addr, uae_u32 value)
1.1 root 721: {
722: cia_bput(addr+3,value); /* FIXME ? */
723: }
724:
1.1.1.3 root 725: void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value)
1.1 root 726: {
727: cia_bput(addr+1,value);
728: }
729:
1.1.1.3 root 730: void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value)
1.1 root 731: {
732: if ((addr & 0x3001) == 0x2001)
1.1.1.3 root 733: WriteCIAA((addr & 0xF00) >> 8,value);
1.1 root 734: if ((addr & 0x3001) == 0x1000)
1.1.1.3 root 735: WriteCIAB((addr & 0xF00) >> 8,value);
1.1 root 736: }
737:
738: /* battclock memory access */
739:
1.1.1.3 root 740: static uae_u32 clock_lget (uaecptr) REGPARAM;
741: static uae_u32 clock_wget (uaecptr) REGPARAM;
742: static uae_u32 clock_bget (uaecptr) REGPARAM;
743: static void clock_lput (uaecptr, uae_u32) REGPARAM;
744: static void clock_wput (uaecptr, uae_u32) REGPARAM;
745: static void clock_bput (uaecptr, uae_u32) REGPARAM;
1.1 root 746:
747: addrbank clock_bank = {
748: clock_lget, clock_wget, clock_bget,
749: clock_lput, clock_wput, clock_bput,
750: default_xlate, default_check
751: };
752:
1.1.1.3 root 753: uae_u32 REGPARAM2 clock_lget (uaecptr addr)
1.1 root 754: {
755: return clock_bget(addr+3);
756: }
757:
1.1.1.3 root 758: uae_u32 REGPARAM2 clock_wget (uaecptr addr)
1.1 root 759: {
760: return clock_bget(addr+1);
761: }
762:
1.1.1.3 root 763: uae_u32 REGPARAM2 clock_bget (uaecptr addr)
1.1 root 764: {
765: time_t t=time(0);
766: struct tm *ct;
767: ct=localtime(&t);
768: switch (addr & 0x3f)
769: {
770: case 0x03: return ct->tm_sec % 10;
771: case 0x07: return ct->tm_sec / 10;
772: case 0x0b: return ct->tm_min % 10;
773: case 0x0f: return ct->tm_min / 10;
774: case 0x13: return ct->tm_hour % 10;
775: case 0x17: return ct->tm_hour / 10;
776: case 0x1b: return ct->tm_mday % 10;
777: case 0x1f: return ct->tm_mday / 10;
778: case 0x23: return (ct->tm_mon+1) % 10;
779: case 0x27: return (ct->tm_mon+1) / 10;
780: case 0x2b: return ct->tm_year % 10;
781: case 0x2f: return ct->tm_year / 10;
782:
783: case 0x33: return ct->tm_wday; /*Hack by -=SR=- */
784: case 0x37: return clock_control_d;
785: case 0x3b: return clock_control_e;
786: case 0x3f: return clock_control_f;
787: }
788: return 0;
789: }
790:
1.1.1.3 root 791: void REGPARAM2 clock_lput (uaecptr addr, uae_u32 value)
1.1 root 792: {
793: /* No way */
794: }
795:
1.1.1.3 root 796: void REGPARAM2 clock_wput (uaecptr addr, uae_u32 value)
1.1 root 797: {
798: /* No way */
799: }
800:
1.1.1.3 root 801: void REGPARAM2 clock_bput (uaecptr addr, uae_u32 value)
1.1 root 802: {
803: switch (addr & 0x3f)
804: {
805: case 0x37: clock_control_d=value; break;
806: case 0x3b: clock_control_e=value; break;
807: case 0x3f: clock_control_f=value; break;
808: }
809: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.