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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * CIA chip support
5: *
6: * Copyright 1995 Bernd Schmidt, Alessandro Bissacco
1.1.1.3 root 7: * Copyright 1996, 1997 Stefan Reinauer, Christian Schmitt
1.1 root 8: */
9:
10: #include "sysconfig.h"
11: #include "sysdeps.h"
12: #include <assert.h>
13:
14: #include "config.h"
15: #include "options.h"
1.1.1.3 root 16: #include "threaddep/penguin.h"
1.1 root 17: #include "events.h"
18: #include "memory.h"
19: #include "custom.h"
20: #include "cia.h"
1.1.1.3 root 21: #include "serial.h"
1.1 root 22: #include "disk.h"
23: #include "xwin.h"
24: #include "keybuf.h"
25: #include "gui.h"
26:
27: #define DIV10 5 /* Yes, a bad identifier. */
28:
29: /* battclock stuff */
30: #define RTC_D_ADJ 8
31: #define RTC_D_IRQ 4
32: #define RTC_D_BUSY 2
33: #define RTC_D_HOLD 1
34: #define RTC_E_t1 8
35: #define RTC_E_t0 4
36: #define RTC_E_INTR 2
37: #define RTC_E_MASK 1
38: #define RTC_F_TEST 8
39: #define RTC_F_24_12 4
40: #define RTC_F_STOP 2
41: #define RTC_F_RSET 1
42:
1.1.1.3 root 43: static unsigned int clock_control_d = RTC_D_ADJ + RTC_D_HOLD;
44: static unsigned int clock_control_e = 0;
45: static unsigned int clock_control_f = RTC_F_24_12;
46:
47: unsigned int ciaaicr,ciaaimask,ciabicr,ciabimask;
48: unsigned int ciaacra,ciaacrb,ciabcra,ciabcrb;
49: unsigned long ciaata,ciaatb,ciabta,ciabtb;
50: unsigned long ciaatod,ciabtod,ciaatol,ciabtol,ciaaalarm,ciabalarm;
1.1.1.2 root 51: int ciaatlatch,ciabtlatch;
1.1.1.3 root 52:
53: unsigned int ciabpra;
54:
55: unsigned int gui_ledstate;
56:
57: static unsigned long ciaala,ciaalb,ciabla,ciablb;
58: static int ciaatodon, ciabtodon;
59: static unsigned int ciaapra,ciaaprb,ciaadra,ciaadrb,ciaasdr;
60: static unsigned int ciabprb,ciabdra,ciabdrb,ciabsdr;
1.1 root 61: static int div10;
1.1.1.2 root 62: static int kbstate, kback, ciaasdr_unread = 0;
1.1 root 63:
64: static int prtopen;
65: static FILE *prttmp;
66:
1.1.1.3 root 67: static void setclr(unsigned int *p, unsigned int val)
1.1 root 68: {
69: if (val & 0x80) {
70: *p |= val & 0x7F;
71: } else {
72: *p &= ~val;
73: }
74: }
75:
76: static void RethinkICRA(void)
77: {
78: if (ciaaimask & ciaaicr) {
79: ciaaicr |= 0x80;
80: custom_bank.wput(0xDFF09C,0x8008);
81: } else {
82: ciaaicr &= 0x7F;
83: /* custom_bank.wput(0xDFF09C,0x0008);*/
84: }
85: }
86:
87: static void RethinkICRB(void)
88: {
89: #if 0 /* ??? What's this then? */
90: if (ciabicr & 0x10) {
91: custom_bank.wput(0xDFF09C,0x9000);
92: }
93: #endif
94: if (ciabimask & ciabicr) {
95: ciabicr |= 0x80;
96: custom_bank.wput(0xDFF09C,0xA000);
97: } else {
98: ciabicr &= 0x7F;
99: /* custom_bank.wput(0xDFF09C,0x2000);*/
100: }
101: }
102:
103: static int lastdiv10;
104:
105: static void CIA_update(void)
106: {
107: unsigned long int ccount = cycles - eventtab[ev_cia].oldcycles + lastdiv10;
108: unsigned long int ciaclocks = ccount / DIV10;
109:
110: int aovfla = 0, aovflb = 0, bovfla = 0, bovflb = 0;
111:
112: lastdiv10 = div10;
113: div10 = ccount % DIV10;
1.1.1.3 root 114:
1.1 root 115: /* CIA A timers */
116: if ((ciaacra & 0x21) == 0x01) {
117: assert((ciaata+1) >= ciaclocks);
118: if ((ciaata+1) == ciaclocks) {
119: aovfla = 1;
120: if ((ciaacrb & 0x61) == 0x41) {
1.1.1.3 root 121: if (ciaatb-- == 0) aovflb = 1;
1.1 root 122: }
1.1.1.3 root 123: }
1.1 root 124: ciaata -= ciaclocks;
125: }
126: if ((ciaacrb & 0x61) == 0x01) {
127: assert((ciaatb+1) >= ciaclocks);
128: if ((ciaatb+1) == ciaclocks) aovflb = 1;
129: ciaatb -= ciaclocks;
130: }
1.1.1.3 root 131:
1.1 root 132: /* CIA B timers */
133: if ((ciabcra & 0x21) == 0x01) {
134: assert((ciabta+1) >= ciaclocks);
135: if ((ciabta+1) == ciaclocks) {
136: bovfla = 1;
137: if ((ciabcrb & 0x61) == 0x41) {
138: if (ciabtb-- == 0) bovflb = 1;
139: }
1.1.1.3 root 140: }
1.1 root 141: ciabta -= ciaclocks;
142: }
143: if ((ciabcrb & 0x61) == 0x01) {
144: assert ((ciabtb+1) >= ciaclocks);
145: if ((ciabtb+1) == ciaclocks) bovflb = 1;
146: ciabtb -= ciaclocks;
147: }
148: if (aovfla) {
149: ciaaicr |= 1; RethinkICRA();
150: ciaata = ciaala;
151: if (ciaacra & 0x8) ciaacra &= ~1;
152: }
153: if (aovflb) {
154: ciaaicr |= 2; RethinkICRA();
155: ciaatb = ciaalb;
156: if (ciaacrb & 0x8) ciaacrb &= ~1;
157: }
158: if (bovfla) {
159: ciabicr |= 1; RethinkICRB();
160: ciabta = ciabla;
161: if (ciabcra & 0x8) ciabcra &= ~1;
162: }
163: if (bovflb) {
164: ciabicr |= 2; RethinkICRB();
165: ciabtb = ciablb;
166: if (ciabcrb & 0x8) ciabcrb &= ~1;
167: }
168: }
169:
170: static void CIA_calctimers(void)
171: {
172: int ciaatimea = -1, ciaatimeb = -1, ciabtimea = -1, ciabtimeb = -1;
173:
174: eventtab[ev_cia].oldcycles = cycles;
1.1.1.3 root 175:
1.1 root 176: if ((ciaacra & 0x21) == 0x01) {
1.1.1.3 root 177: ciaatimea = (DIV10-div10) + DIV10*ciaata;
1.1 root 178: }
179: if ((ciaacrb & 0x61) == 0x41) {
180: /* Timer B will not get any pulses if Timer A is off. */
181: if (ciaatimea >= 0) {
182: /* If Timer A is in one-shot mode, and Timer B needs more than
183: * one pulse, it will not underflow. */
184: if (ciaatb == 0 || (ciaacra & 0x8) == 0) {
185: /* Otherwise, we can determine the time of the underflow. */
186: ciaatimeb = ciaatimea + ciaala * DIV10 * ciaatb;
187: }
188: }
189: }
190: if ((ciaacrb & 0x61) == 0x01) {
191: ciaatimeb = (DIV10-div10) + DIV10*ciaatb;
192: }
193:
194: if ((ciabcra & 0x21) == 0x01) {
1.1.1.3 root 195: ciabtimea = (DIV10-div10) + DIV10*ciabta;
1.1 root 196: }
197: if ((ciabcrb & 0x61) == 0x41) {
198: /* Timer B will not get any pulses if Timer A is off. */
199: if (ciabtimea >= 0) {
200: /* If Timer A is in one-shot mode, and Timer B needs more than
201: * one pulse, it will not underflow. */
202: if (ciabtb == 0 || (ciabcra & 0x8) == 0) {
203: /* Otherwise, we can determine the time of the underflow. */
204: ciabtimeb = ciabtimea + ciabla * DIV10 * ciabtb;
205: }
206: }
207: }
208: if ((ciabcrb & 0x61) == 0x01) {
209: ciabtimeb = (DIV10-div10) + DIV10*ciabtb;
210: }
211: eventtab[ev_cia].active = (ciaatimea != -1 || ciaatimeb != -1
212: || ciabtimea != -1 || ciabtimeb != -1);
213: if (eventtab[ev_cia].active) {
214: unsigned long int ciatime = ~0L;
215: if (ciaatimea != -1) ciatime = ciaatimea;
216: if (ciaatimeb != -1 && ciaatimeb < ciatime) ciatime = ciaatimeb;
217: if (ciabtimea != -1 && ciabtimea < ciatime) ciatime = ciabtimea;
218: if (ciabtimeb != -1 && ciabtimeb < ciatime) ciatime = ciabtimeb;
219: eventtab[ev_cia].evtime = ciatime + cycles;
220: }
221: events_schedule();
222: }
223:
224: void CIA_handler(void)
225: {
226: CIA_update();
227: CIA_calctimers();
228: }
229:
230: void diskindex_handler(void)
231: {
232: eventtab[ev_diskindex].evtime += cycles - eventtab[ev_diskindex].oldcycles;
233: eventtab[ev_diskindex].oldcycles = cycles;
234: /* printf(".\n");*/
235: ciabicr |= 0x10;
236: RethinkICRB();
237: }
238:
239: void CIA_hsync_handler(void)
240: {
1.1.1.3 root 241: static unsigned int keytime = 0, sleepyhead = 0;
1.1 root 242:
243: if (ciabtodon)
244: ciabtod++;
245: ciabtod &= 0xFFFFFF;
246:
247: if (ciabtod == ciabalarm) {
248: ciabicr |= 4; RethinkICRB();
249: }
1.1.1.3 root 250:
251: /* check wether the serial port gets some data */
252: if (doreadser)
253: doreadser = SERDATS();
254:
1.1 root 255: if (keys_available() && kback && (++keytime & 15) == 0) {
1.1.1.3 root 256: /*
1.1.1.2 root 257: * This hack lets one possible ciaaicr cycle go by without any key
258: * being read, for every cycle in which a key is pulled out of the
259: * queue. If no hack is used, a lot of key events just get lost
260: * when you type fast. With a simple hack that waits for ciaasdr
261: * to be read before feeding it another, it will keep up until the
262: * queue gets about 14 characters ahead and then lose events, and
263: * the mouse pointer will freeze while typing is being taken in.
264: * With this hack, you can type 30 or 40 characters ahead with little
265: * or no lossage, and the mouse doesn't get stuck. The tradeoff is
266: * that the total slowness of typing appearing on screen is worse.
267: */
1.1.1.3 root 268: if (ciaasdr_unread == 2)
269: ciaasdr_unread = 0;
270: else if (ciaasdr_unread == 0) {
271: switch (kbstate) {
1.1.1.2 root 272: case 0:
1.1.1.3 root 273: ciaasdr = (uae_s8)~0xFB; /* aaarghh... stupid compiler */
274: kbstate++;
275: break;
1.1.1.2 root 276: case 1:
1.1.1.3 root 277: kbstate++;
278: ciaasdr = (uae_s8)~0xFD;
279: break;
1.1.1.2 root 280: case 2:
1.1.1.3 root 281: ciaasdr = ~get_next_key();
282: ciaasdr_unread = 1; /* interlock to prevent lost keystrokes */
283: break;
1.1.1.2 root 284: }
285: ciaaicr |= 8;
286: RethinkICRA();
287: sleepyhead = 0;
1.1.1.3 root 288: } else if (!(++sleepyhead & 15))
289: ciaasdr_unread = 0; /* give up on this key event after unread for a long time */
1.1 root 290: }
291: }
292:
293: void CIA_vsync_handler()
1.1.1.3 root 294: {
295: if (ciaatodon)
1.1 root 296: ciaatod++;
297: ciaatod &= 0xFFFFFF;
298: if (ciaatod == ciaaalarm) {
299: ciaaicr |= 4; RethinkICRA();
300: }
1.1.1.3 root 301:
302: doreadser = 1;
303: serstat = -1;
304: serial_flush_buffer();
1.1 root 305: }
306:
1.1.1.3 root 307: static uae_u8 ReadCIAA(unsigned int addr)
1.1 root 308: {
1.1.1.3 root 309: unsigned int tmp;
310:
1.1.1.5 root 311: switch(addr & 0xf) {
1.1.1.7 ! root 312: case 0:
1.1.1.3 root 313: if (currprefs.use_serial && (serstat < 0)) /* Only read status when needed */
314: serstat=serial_readstatus(); /* and only once per frame */
315:
1.1 root 316: tmp = (DISK_status() & 0x3C);
1.1.1.6 root 317: if ((JSEM_ISMOUSE (0, &currprefs) && !buttonstate[0])
318: || (!JSEM_ISMOUSE (0, &currprefs) && !(joy0button & 1)))
1.1.1.3 root 319: tmp |= 0x40;
320: if (!(joy1button & 1))
321: tmp |= 0x80;
1.1 root 322: return tmp;
1.1.1.7 ! root 323: case 1:
! 324: /* Returning 0xFF is necessary for Tie Break - otherwise its joystick
! 325: code won't work. */
! 326: return prtopen ? ciaaprb : 0xFF;
! 327: case 2:
1.1 root 328: return ciaadra;
1.1.1.7 ! root 329: case 3:
1.1 root 330: return ciaadrb;
1.1.1.7 ! root 331: case 4:
1.1 root 332: return ciaata & 0xff;
1.1.1.7 ! root 333: case 5:
1.1 root 334: return ciaata >> 8;
1.1.1.7 ! root 335: case 6:
1.1 root 336: return ciaatb & 0xff;
1.1.1.7 ! root 337: case 7:
1.1 root 338: return ciaatb >> 8;
1.1.1.7 ! root 339: case 8:
1.1 root 340: if (ciaatlatch) {
341: ciaatlatch = 0;
342: return ciaatol & 0xff;
1.1.1.3 root 343: } else
344: return ciaatod & 0xff;
1.1.1.7 ! root 345: case 9:
1.1.1.3 root 346: if (ciaatlatch)
347: return (ciaatol >> 8) & 0xff;
348: else
349: return (ciaatod >> 8) & 0xff;
1.1.1.7 ! root 350: case 10:
1.1.1.3 root 351: ciaatlatch = 1;
352: ciaatol = ciaatod; /* ??? only if not already latched? */
1.1 root 353: return (ciaatol >> 16) & 0xff;
1.1.1.7 ! root 354: case 12:
1.1.1.3 root 355: if (ciaasdr == 1) ciaasdr_unread = 2;
1.1 root 356: return ciaasdr;
1.1.1.7 ! root 357: case 13:
1.1 root 358: tmp = ciaaicr; ciaaicr = 0; RethinkICRA(); return tmp;
1.1.1.7 ! root 359: case 14:
1.1 root 360: return ciaacra;
1.1.1.7 ! root 361: case 15:
1.1 root 362: return ciaacrb;
363: }
364: return 0;
365: }
366:
1.1.1.3 root 367: static uae_u8 ReadCIAB(unsigned int addr)
1.1 root 368: {
1.1.1.3 root 369: unsigned int tmp;
370:
1.1.1.5 root 371: switch(addr & 0xf) {
1.1.1.7 ! root 372: case 0:
1.1.1.3 root 373: if (currprefs.use_serial && serstat < 0) /* Only read status when needed */
374: serstat=serial_readstatus(); /* and only once per frame */
1.1.1.7 ! root 375: /* Returning some 1 bits is necessary for Tie Break - otherwise its joystick
! 376: code won't work. */
! 377: return ciabpra | (prtopen ? 0 : 3);
! 378: case 1:
1.1 root 379: return ciabprb;
1.1.1.7 ! root 380: case 2:
1.1 root 381: return ciabdra;
1.1.1.7 ! root 382: case 3:
1.1 root 383: return ciabdrb;
1.1.1.7 ! root 384: case 4:
1.1 root 385: return ciabta & 0xff;
1.1.1.7 ! root 386: case 5:
1.1 root 387: return ciabta >> 8;
1.1.1.7 ! root 388: case 6:
1.1 root 389: return ciabtb & 0xff;
1.1.1.7 ! root 390: case 7:
1.1 root 391: return ciabtb >> 8;
1.1.1.7 ! root 392: case 8:
1.1 root 393: if (ciabtlatch) {
394: ciabtlatch = 0;
395: return ciabtol & 0xff;
1.1.1.3 root 396: } else
397: return ciabtod & 0xff;
1.1.1.7 ! root 398: case 9:
1.1.1.3 root 399: if (ciabtlatch)
400: return (ciabtol >> 8) & 0xff;
401: else
402: return (ciabtod >> 8) & 0xff;
1.1.1.7 ! root 403: case 10:
1.1.1.3 root 404: ciabtlatch = 1;
405: ciabtol = ciabtod;
1.1 root 406: return (ciabtol >> 16) & 0xff;
1.1.1.7 ! root 407: case 12:
1.1 root 408: return ciabsdr;
1.1.1.7 ! root 409: case 13:
1.1 root 410: tmp = ciabicr; ciabicr = 0; RethinkICRB();
411: return tmp;
1.1.1.7 ! root 412: case 14:
1.1 root 413: return ciabcra;
1.1.1.7 ! root 414: case 15:
1.1 root 415: return ciabcrb;
416: }
417: return 0;
418: }
419:
1.1.1.3 root 420: static void WriteCIAA(uae_u16 addr,uae_u8 val)
1.1 root 421: {
1.1.1.3 root 422: int oldled, oldovl;
1.1.1.5 root 423: switch(addr & 0xf) {
1.1.1.7 ! root 424: case 0:
1.1.1.3 root 425: oldovl = ciaapra & 1;
1.1 root 426: oldled = ciaapra & 2;
427: ciaapra = (ciaapra & ~0x3) | (val & 0x3); LED(ciaapra & 0x2);
1.1.1.3 root 428: gui_ledstate &= ~1;
429: gui_ledstate |= ((~ciaapra & 2) >> 1);
1.1 root 430: if ((ciaapra & 2) != oldled)
431: gui_led (0, !(ciaapra & 2));
1.1.1.3 root 432: if ((ciaapra & 1) != oldovl) {
433: map_banks(oldovl || ersatzkickfile ? &chipmem_bank : &kickmem_bank, 0, 32);
434: }
1.1 root 435: break;
1.1.1.7 ! root 436: case 1:
1.1 root 437: ciaaprb = val;
438: if (prtopen==1) {
439: #ifndef __DOS__
1.1.1.4 root 440: fprintf (prttmp, "%c",val);
1.1 root 441: #else
442: fputc (val, prttmp);
443: fflush (prttmp);
444: #endif
445: if (val==0x04) {
1.1.1.2 root 446: #if defined(__unix) && !defined(__BEOS__) && !defined(__DOS__)
1.1 root 447: pclose (prttmp);
448: #else
449: fclose (prttmp);
450: #endif
451: prtopen = 0;
452: }
1.1.1.3 root 453: } else {
1.1.1.2 root 454: #if defined(__unix) && !defined(__BEOS__) && !defined(__DOS__)
1.1.1.6 root 455: prttmp = (FILE *)popen ((const char *)currprefs.prtname, "w");
1.1 root 456: #else
1.1.1.6 root 457: prttmp = (FILE *)fopen ((const char *)currprefs.prtname, "wb");
1.1 root 458: #endif
459: if (prttmp != NULL) {
460: prtopen = 1;
461: #ifndef __DOS__
462: fprintf (prttmp,"%c",val);
463: #else
464: fputc (val, prttmp);
465: fflush (prttmp);
466: #endif
467: }
1.1.1.3 root 468: }
1.1 root 469: ciaaicr |= 0x10;
470: break;
1.1.1.7 ! root 471: case 2:
1.1 root 472: ciaadra = val; break;
1.1.1.7 ! root 473: case 3:
1.1 root 474: ciaadrb = val; break;
1.1.1.7 ! root 475: case 4:
1.1 root 476: CIA_update();
477: ciaala = (ciaala & 0xff00) | val;
478: CIA_calctimers();
479: break;
1.1.1.7 ! root 480: case 5:
1.1 root 481: CIA_update();
482: ciaala = (ciaala & 0xff) | (val << 8);
483: if ((ciaacra & 1) == 0)
484: ciaata = ciaala;
1.1.1.3 root 485: if (ciaacra & 8) {
486: ciaata = ciaala;
487: ciaacra |= 1;
1.1 root 488: }
489: CIA_calctimers();
490: break;
1.1.1.7 ! root 491: case 6:
1.1 root 492: CIA_update();
493: ciaalb = (ciaalb & 0xff00) | val;
494: CIA_calctimers();
495: break;
1.1.1.7 ! root 496: case 7:
1.1 root 497: CIA_update();
498: ciaalb = (ciaalb & 0xff) | (val << 8);
499: if ((ciaacrb & 1) == 0)
500: ciaatb = ciaalb;
1.1.1.3 root 501: if (ciaacrb & 8) {
1.1 root 502: ciaatb = ciaalb;
1.1.1.3 root 503: ciaacrb |= 1;
1.1 root 504: }
505: CIA_calctimers();
506: break;
1.1.1.7 ! root 507: case 8:
1.1.1.5 root 508: if (ciaacrb & 0x80) {
1.1 root 509: ciaaalarm = (ciaaalarm & ~0xff) | val;
510: } else {
511: ciaatod = (ciaatod & ~0xff) | val;
512: ciaatodon = 1;
513: }
514: break;
1.1.1.7 ! root 515: case 9:
1.1.1.5 root 516: if (ciaacrb & 0x80) {
1.1 root 517: ciaaalarm = (ciaaalarm & ~0xff00) | (val << 8);
518: } else {
519: ciaatod = (ciaatod & ~0xff00) | (val << 8);
520: ciaatodon = 0;
521: }
522: break;
1.1.1.7 ! root 523: case 10:
1.1.1.5 root 524: if (ciaacrb & 0x80) {
1.1 root 525: ciaaalarm = (ciaaalarm & ~0xff0000) | (val << 16);
526: } else {
527: ciaatod = (ciaatod & ~0xff0000) | (val << 16);
528: ciaatodon = 0;
529: }
530: break;
1.1.1.7 ! root 531: case 12:
1.1 root 532: ciaasdr = val; break;
1.1.1.7 ! root 533: case 13:
1.1 root 534: setclr(&ciaaimask,val); break; /* ??? call RethinkICR() ? */
1.1.1.7 ! root 535: case 14:
1.1 root 536: CIA_update();
537: ciaacra = val;
1.1.1.5 root 538: if (ciaacra & 0x10) {
1.1 root 539: ciaacra &= ~0x10;
540: ciaata = ciaala;
541: }
542: if (ciaacra & 0x40) {
543: kback = 1;
544: }
545: CIA_calctimers();
546: break;
1.1.1.7 ! root 547: case 15:
1.1 root 548: CIA_update();
1.1.1.3 root 549: ciaacrb = val;
1.1.1.5 root 550: if (ciaacrb & 0x10) {
1.1 root 551: ciaacrb &= ~0x10;
552: ciaatb = ciaalb;
553: }
554: CIA_calctimers();
555: break;
556: }
557: }
558:
1.1.1.3 root 559: static void WriteCIAB(uae_u16 addr,uae_u8 val)
1.1 root 560: {
1.1.1.3 root 561: int oldval;
1.1.1.5 root 562: switch(addr & 0xf) {
1.1.1.7 ! root 563: case 0:
1.1.1.3 root 564: if (currprefs.use_serial) {
1.1.1.7 ! root 565: oldval = ciabpra;
! 566: ciabpra = serial_writestatus(oldval,val);
1.1.1.3 root 567: } else
1.1.1.7 ! root 568: ciabpra = val;
1.1.1.3 root 569: break;
1.1.1.7 ! root 570: case 1:
1.1 root 571: ciabprb = val; DISK_select(val); break;
1.1.1.7 ! root 572: case 2:
1.1 root 573: ciabdra = val; break;
1.1.1.7 ! root 574: case 3:
1.1 root 575: ciabdrb = val; break;
1.1.1.7 ! root 576: case 4:
1.1 root 577: CIA_update();
578: ciabla = (ciabla & 0xff00) | val;
579: CIA_calctimers();
580: break;
1.1.1.7 ! root 581: case 5:
1.1 root 582: CIA_update();
583: ciabla = (ciabla & 0xff) | (val << 8);
1.1.1.3 root 584: if ((ciabcra & 1) == 0)
1.1 root 585: ciabta = ciabla;
586: if (ciabcra & 8) {
1.1.1.3 root 587: ciabta = ciabla;
588: ciabcra |= 1;
589: }
1.1 root 590: CIA_calctimers();
591: break;
1.1.1.7 ! root 592: case 6:
1.1 root 593: CIA_update();
594: ciablb = (ciablb & 0xff00) | val;
595: CIA_calctimers();
596: break;
1.1.1.7 ! root 597: case 7:
1.1 root 598: CIA_update();
599: ciablb = (ciablb & 0xff) | (val << 8);
600: if ((ciabcrb & 1) == 0)
601: ciabtb = ciablb;
602: if (ciabcrb & 8) {
603: ciabtb = ciablb;
604: ciabcrb |= 1;
605: }
606: CIA_calctimers();
607: break;
1.1.1.7 ! root 608: case 8:
1.1.1.5 root 609: if (ciabcrb & 0x80) {
1.1 root 610: ciabalarm = (ciabalarm & ~0xff) | val;
611: } else {
612: ciabtod = (ciabtod & ~0xff) | val;
613: ciabtodon = 1;
614: }
615: break;
1.1.1.7 ! root 616: case 9:
1.1.1.5 root 617: if (ciabcrb & 0x80) {
1.1 root 618: ciabalarm = (ciabalarm & ~0xff00) | (val << 8);
619: } else {
620: ciabtod = (ciabtod & ~0xff00) | (val << 8);
621: ciabtodon = 0;
622: }
623: break;
1.1.1.7 ! root 624: case 10:
1.1.1.5 root 625: if (ciabcrb & 0x80) {
1.1 root 626: ciabalarm = (ciabalarm & ~0xff0000) | (val << 16);
627: } else {
628: ciabtod = (ciabtod & ~0xff0000) | (val << 16);
629: ciabtodon = 0;
630: }
631: break;
1.1.1.7 ! root 632: case 12:
1.1.1.3 root 633: ciabsdr = val;
1.1 root 634: break;
1.1.1.7 ! root 635: case 13:
1.1.1.3 root 636: setclr(&ciabimask,val);
1.1 root 637: break;
1.1.1.7 ! root 638: case 14:
1.1 root 639: CIA_update();
640: ciabcra = val;
1.1.1.5 root 641: if (ciabcra & 0x10) {
1.1 root 642: ciabcra &= ~0x10;
643: ciabta = ciabla;
644: }
645: CIA_calctimers();
646: break;
1.1.1.7 ! root 647: case 15:
1.1 root 648: CIA_update();
1.1.1.3 root 649: ciabcrb = val;
1.1.1.5 root 650: if (ciabcrb & 0x10) {
1.1 root 651: ciabcrb &= ~0x10;
652: ciabtb = ciablb;
653: }
654: CIA_calctimers();
655: break;
656: }
657: }
658:
659: void CIA_reset(void)
660: {
661: kback = 1;
662: kbstate = 0;
1.1.1.3 root 663:
1.1 root 664: ciaatlatch = ciabtlatch = 0;
1.1.1.3 root 665: ciaapra = 3;
1.1 root 666: ciaatod = ciabtod = 0; ciaatodon = ciabtodon = 0;
667: ciaaicr = ciabicr = ciaaimask = ciabimask = 0;
668: ciaacra = ciaacrb = ciabcra = ciabcrb = 0x4; /* outmode = toggle; */
669: ciaala = ciaalb = ciabla = ciablb = ciaata = ciaatb = ciabta = ciabtb = 0xFFFF;
670: div10 = 0;
671: lastdiv10 = 0;
672: CIA_calctimers();
1.1.1.2 root 673: ciabpra = 0x8C;
1.1.1.3 root 674: if (! ersatzkickfile)
675: map_banks(&kickmem_bank, 0, 32);
676:
677: if (currprefs.use_serial) serial_dtr_off(); /* Drop DTR at reset */
1.1 root 678: }
679:
680: void dumpcia(void)
681: {
682: printf("A: CRA: %02x, CRB: %02x, IMASK: %02x, TOD: %08lx %7s TA: %04lx, TB: %04lx\n",
1.1.1.3 root 683: (int)ciaacra, (int)ciaacrb, (int)ciaaimask, ciaatod,
1.1 root 684: ciaatlatch ? " latched" : "", ciaata, ciaatb);
685: printf("B: CRA: %02x, CRB: %02x, IMASK: %02x, TOD: %08lx %7s TA: %04lx, TB: %04lx\n",
1.1.1.3 root 686: (int)ciabcra, (int)ciabcrb, (int)ciabimask, ciabtod,
1.1 root 687: ciabtlatch ? " latched" : "", ciabta, ciabtb);
688: }
689:
690: /* CIA memory access */
691:
1.1.1.3 root 692: static uae_u32 cia_lget (uaecptr) REGPARAM;
693: static uae_u32 cia_wget (uaecptr) REGPARAM;
694: static uae_u32 cia_bget (uaecptr) REGPARAM;
695: static void cia_lput (uaecptr, uae_u32) REGPARAM;
696: static void cia_wput (uaecptr, uae_u32) REGPARAM;
697: static void cia_bput (uaecptr, uae_u32) REGPARAM;
1.1 root 698:
699: addrbank cia_bank = {
700: cia_lget, cia_wget, cia_bget,
701: cia_lput, cia_wput, cia_bput,
702: default_xlate, default_check
703: };
704:
1.1.1.3 root 705: uae_u32 REGPARAM2 cia_lget (uaecptr addr)
1.1 root 706: {
707: return cia_bget(addr+3);
708: }
709:
1.1.1.3 root 710: uae_u32 REGPARAM2 cia_wget (uaecptr addr)
1.1 root 711: {
712: return cia_bget(addr+1);
713: }
714:
1.1.1.3 root 715: uae_u32 REGPARAM2 cia_bget (uaecptr addr)
1.1 root 716: {
717: if ((addr & 0x3001) == 0x2001)
1.1.1.3 root 718: return ReadCIAA((addr & 0xF00) >> 8);
1.1 root 719: if ((addr & 0x3001) == 0x1000)
1.1.1.3 root 720: return ReadCIAB((addr & 0xF00) >> 8);
1.1 root 721: return 0;
722: }
723:
1.1.1.3 root 724: void REGPARAM2 cia_lput (uaecptr addr, uae_u32 value)
1.1 root 725: {
726: cia_bput(addr+3,value); /* FIXME ? */
727: }
728:
1.1.1.3 root 729: void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value)
1.1 root 730: {
731: cia_bput(addr+1,value);
732: }
733:
1.1.1.3 root 734: void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value)
1.1 root 735: {
736: if ((addr & 0x3001) == 0x2001)
1.1.1.3 root 737: WriteCIAA((addr & 0xF00) >> 8,value);
1.1 root 738: if ((addr & 0x3001) == 0x1000)
1.1.1.3 root 739: WriteCIAB((addr & 0xF00) >> 8,value);
1.1 root 740: }
741:
742: /* battclock memory access */
743:
1.1.1.3 root 744: static uae_u32 clock_lget (uaecptr) REGPARAM;
745: static uae_u32 clock_wget (uaecptr) REGPARAM;
746: static uae_u32 clock_bget (uaecptr) REGPARAM;
747: static void clock_lput (uaecptr, uae_u32) REGPARAM;
748: static void clock_wput (uaecptr, uae_u32) REGPARAM;
749: static void clock_bput (uaecptr, uae_u32) REGPARAM;
1.1 root 750:
751: addrbank clock_bank = {
752: clock_lget, clock_wget, clock_bget,
753: clock_lput, clock_wput, clock_bput,
754: default_xlate, default_check
755: };
756:
1.1.1.3 root 757: uae_u32 REGPARAM2 clock_lget (uaecptr addr)
1.1 root 758: {
759: return clock_bget(addr+3);
760: }
761:
1.1.1.3 root 762: uae_u32 REGPARAM2 clock_wget (uaecptr addr)
1.1 root 763: {
764: return clock_bget(addr+1);
765: }
766:
1.1.1.3 root 767: uae_u32 REGPARAM2 clock_bget (uaecptr addr)
1.1 root 768: {
769: time_t t=time(0);
770: struct tm *ct;
771: ct=localtime(&t);
1.1.1.7 ! root 772: switch (addr & 0x3f) {
! 773: case 0x03: return ct->tm_sec % 10;
! 774: case 0x07: return ct->tm_sec / 10;
! 775: case 0x0b: return ct->tm_min % 10;
! 776: case 0x0f: return ct->tm_min / 10;
! 777: case 0x13: return ct->tm_hour % 10;
! 778: case 0x17: return ct->tm_hour / 10;
! 779: case 0x1b: return ct->tm_mday % 10;
! 780: case 0x1f: return ct->tm_mday / 10;
! 781: case 0x23: return (ct->tm_mon+1) % 10;
! 782: case 0x27: return (ct->tm_mon+1) / 10;
! 783: case 0x2b: return ct->tm_year % 10;
! 784: case 0x2f: return ct->tm_year / 10;
! 785:
! 786: case 0x33: return ct->tm_wday; /*Hack by -=SR=- */
! 787: case 0x37: return clock_control_d;
! 788: case 0x3b: return clock_control_e;
! 789: case 0x3f: return clock_control_f;
1.1 root 790: }
791: return 0;
792: }
793:
1.1.1.3 root 794: void REGPARAM2 clock_lput (uaecptr addr, uae_u32 value)
1.1 root 795: {
796: /* No way */
797: }
798:
1.1.1.3 root 799: void REGPARAM2 clock_wput (uaecptr addr, uae_u32 value)
1.1 root 800: {
801: /* No way */
802: }
803:
1.1.1.3 root 804: void REGPARAM2 clock_bput (uaecptr addr, uae_u32 value)
1.1 root 805: {
1.1.1.7 ! root 806: switch (addr & 0x3f) {
! 807: case 0x37: clock_control_d=value; break;
! 808: case 0x3b: clock_control_e=value; break;
! 809: case 0x3f: clock_control_f=value; break;
1.1 root 810: }
811: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.