--- uae/src/fpp.c	2018/04/24 17:00:13	1.1.1.8
+++ uae/src/fpp.c	2018/04/24 17:14:25	1.1.1.10
@@ -27,7 +27,7 @@
 
 #define FFLAG_Z   0x4000
 #define FFLAG_N   0x0100
-#define FFLAG_NAN 0x0400 
+#define FFLAG_NAN 0x0400
 
 #define MAKE_FPSR(r)  regs.fp_result=(r)
 
@@ -54,22 +54,28 @@ static __inline__ uae_s32 toint(fptype s
     return src; /* Should never be reached */
 }
 
-static uae_u32 get_fpsr (void) 
+static uae_u32 get_fpsr (void)
 {
     uae_u32 answer = regs.fpsr & 0x00ffffff;
+#ifdef HAVE_ISNAN
     if (isnan (regs.fp_result))
 	answer |= 0x01000000;
-    else if (regs.fp_result == 0)
-	answer |= 0x04000000;
-    else if (regs.fp_result < 0)
-	answer |= 0x08000000;
-    if (isinf (regs.fp_result))
-	answer |= 0x02000000;
-	
+    else
+#endif
+    {
+	if (regs.fp_result == 0)
+	    answer |= 0x04000000;
+	else if (regs.fp_result < 0)
+	    answer |= 0x08000000;
+#ifdef HAVE_ISINF
+	if (isinf (regs.fp_result))
+	    answer |= 0x02000000;
+#endif
+    }
     return answer;
 }
 
-STATIC_INLINE void set_fpsr (uae_u32 x) 
+STATIC_INLINE void set_fpsr (uae_u32 x)
 {
     regs.fpsr = x;
 
@@ -328,7 +334,7 @@ STATIC_INLINE int put_fp_value (fptype v
     reg = opcode & 7;
     size = (extra >> 10) & 7;
     ad = -1;
-    
+
     switch (mode) {
     case 0:
 	switch (size) {
@@ -500,8 +506,12 @@ STATIC_INLINE int fpp_cond (uae_u32 opco
     int N = (regs.fp_result<0);
     int Z = (regs.fp_result==0);
     /* int I = (regs.fpsr & 0x2000000) != 0; */
-    int NotANumber = isnan(regs.fp_result);
-    
+    int NotANumber = 0;
+
+#ifdef HAVE_ISNAN
+    NotANumber = isnan (regs.fp_result);
+#endif
+
     if (NotANumber)
 	N=Z=0;
 
@@ -564,9 +574,9 @@ STATIC_INLINE int fpp_cond (uae_u32 opco
 	return NotANumber || Z || !N;
     case 0x1c:
 #if 0
-        return NotANumber || (Z && N); /* This is wrong, compare 0x0c */
+	return NotANumber || (Z && N); /* This is wrong, compare 0x0c */
 #else
-        return NotANumber || (N && !Z);  
+	return NotANumber || (N && !Z);
 #endif
     case 0x1d:
 	return NotANumber || Z || N;
@@ -1113,7 +1123,7 @@ void fpp_opp (uae_u32 opcode, uae_u16 ex
 	case 0x00:		/* FMOVE */
 	case 0x40:  /* Explicit rounding. This is just a quick fix. Same
 		     * for all other cases that have three choices */
-	case 0x44:   
+	case 0x44:
 	    regs.fp[reg] = src;
 	    /* Brian King was here.  <ea> to register needs FPSR updated.
 	     * See page 3-73 in Motorola 68K programmers reference manual.
@@ -1124,7 +1134,7 @@ void fpp_opp (uae_u32 opcode, uae_u16 ex
 	    break;
 	case 0x01:		/* FINT */
 	    /* need to take the current rounding mode into account */
- 	    regs.fp[reg] = toint(src);
+	    regs.fp[reg] = toint(src);
 	    break;
 	case 0x02:		/* FSINH */
 	    regs.fp[reg] = sinh (src);