--- uae/src/gencpu.c 2018/04/24 16:54:33 1.1.1.11 +++ uae/src/gencpu.c 2018/04/24 17:21:37 1.1.1.22 @@ -22,8 +22,6 @@ #include "sysdeps.h" #include -#include "config.h" -#include "options.h" #include "readcpu.h" #define BOOL_TYPE "int" @@ -33,23 +31,29 @@ static FILE *stblfile; static int using_prefetch; static int using_exception_3; +static int using_ce = 0; static int cpu_level; +/* Flags for genamode. */ +#define GF_APDI 1 +#define GF_AD8R 2 +#define GF_PC8R 4 +#define GF_AA 7 +#define GF_NOREFILL 8 +#define GF_PREFETCH 16 + /* For the current opcode, the next lower level that will have different code. * Initialized to -1 for each opcode. If it remains unchanged, indicates we * are done with that opcode. */ static int next_cpu_level; -void write_log (const char *s, ...) -{ - fprintf (stderr, "%s", s); -} - static int *opcode_map; static int *opcode_next_clev; static int *opcode_last_postfix; static unsigned long *counts; +static int generate_stbl; + static void read_counts (void) { FILE *file; @@ -62,7 +66,7 @@ static void read_counts (void) if (file) { fscanf (file, "Total: %lu\n", &total); while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { - opcode_next_clev[nr] = 3; + opcode_next_clev[nr] = 6; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -75,7 +79,7 @@ static void read_counts (void) if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG && counts[opcode] == 0) { - opcode_next_clev[nr] = 3; + opcode_next_clev[nr] = 6; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -93,6 +97,40 @@ static int n_braces = 0; static int m68k_pc_offset = 0; static int insn_n_cycles; +static void returncycles (char *s, int cycles) +{ + if (using_ce) + return; + printf ("%sreturn CYCLE_UNIT / 2 * %d;\n", s, cycles); +} + +static void addcycles (int cycles) +{ + if (using_ce) + printf ("\tdo_cycles_ce (%d * CYCLE_UNIT / 2);\n", cycles); + else + insn_n_cycles += cycles; +} +static void addcycles2 (char *s, int cycles) +{ + if (using_ce) + printf ("%sdo_cycles_ce (%d * CYCLE_UNIT / 2);\n", s, cycles); + else + insn_n_cycles += cycles; +} +static void addcycles3 (char *s) +{ + if (!using_ce) return; + printf ("%sif (cycles > 0) do_cycles_ce (cycles);\n", s); +} + +static int isreg (amodes mode) +{ + if (mode == Dreg || mode == Areg) + return 1; + return 0; +} + static void start_brace (void) { n_braces++; @@ -140,86 +178,182 @@ static const char *bit_mask (int size) return 0; } -static const char *gen_nextilong (void) +static void gen_nextilong (char *type, char *name, int norefill) { - static char buffer[80]; int r = m68k_pc_offset; m68k_pc_offset += 4; - insn_n_cycles += 8; - - if (using_prefetch) - sprintf (buffer, "get_ilong_prefetch(%d)", r); - else - sprintf (buffer, "get_ilong(%d)", r); - return buffer; + if (using_ce) { + printf ("\t%s %s;\n", type, name); + /* we must do this because execution order of (something | something2) is not defined */ + if (norefill) { + printf ("\t%s = get_word_ce_prefetch (%d) << 16;\n", name, r + 2); + printf ("\t%s |= regs.irc;\n", name); + } else { + printf ("\t%s = get_word_ce_prefetch (%d) << 16;\n", name, r + 2); + printf ("\t%s |= get_word_ce_prefetch (%d);\n", name, r + 4); + } + } else { + if (using_prefetch) { + if (norefill) { + printf ("\t%s %s;\n", type, name); + printf ("\t%s = get_word_prefetch (%d) << 16;\n", name, r + 2); + printf ("\t%s |= regs.irc;\n", name); + insn_n_cycles += 4; + } else + printf ("\t%s %s = get_long_prefetch (%d);\n", type, name, r + 2); + insn_n_cycles += 8; + } else { + insn_n_cycles += 8; + printf ("\t%s %s = get_ilong (%d);\n", type, name, r); + } + } } -static const char *gen_nextiword (void) +static const char *gen_nextiword (int norefill) { static char buffer[80]; int r = m68k_pc_offset; m68k_pc_offset += 2; - insn_n_cycles += 4; - - if (using_prefetch) - sprintf (buffer, "get_iword_prefetch(%d)", r); - else - sprintf (buffer, "get_iword(%d)", r); + if (using_ce) { + if (norefill) + strcpy (buffer, "regs.irc"); + else + sprintf (buffer, "get_word_ce_prefetch (%d)", r + 2); + } else { + if (using_prefetch) { + if (norefill) { + sprintf (buffer, "regs.irc", r); + } else { + sprintf (buffer, "get_word_prefetch (%d)", r + 2); + insn_n_cycles += 4; + } + } else { + sprintf (buffer, "get_iword (%d)", r); + insn_n_cycles += 4; + } + } return buffer; } -static const char *gen_nextibyte (void) +static const char *gen_nextibyte (int norefill) { static char buffer[80]; int r = m68k_pc_offset; m68k_pc_offset += 2; - insn_n_cycles += 4; + if (using_ce) { + if (norefill) + strcpy (buffer, "(uae_u8)regs.irc"); + else + sprintf (buffer, "(uae_u8)get_word_ce_prefetch (%d)", r + 2); + } else { + insn_n_cycles += 4; + if (using_prefetch) { + if (norefill) { + sprintf (buffer, "(uae_u8)regs.irc", r); + } else { + sprintf (buffer, "(uae_u8)get_word_prefetch (%d)", r + 2); + insn_n_cycles += 4; + } + } else { + sprintf (buffer, "get_ibyte (%d)", r); + insn_n_cycles += 4; + } + } + return buffer; +} - if (using_prefetch) - sprintf (buffer, "get_ibyte_prefetch(%d)", r); +static void irc2ir (void) +{ + if (!using_prefetch) + return; + printf ("\tregs.ir = regs.irc;\n"); +} + +static int did_prefetch; + +static void fill_prefetch_2 (void) +{ + if (!using_prefetch) + return; + if (using_ce) + printf ("\tget_word_ce_prefetch (%d);\n", m68k_pc_offset + 2); else - sprintf (buffer, "get_ibyte(%d)", r); - return buffer; + printf ("\tget_word_prefetch (%d);\n", m68k_pc_offset + 2); + did_prefetch = 1; + insn_n_cycles += 4; +} + +static void fill_prefetch_1 (int o) +{ + if (!using_prefetch) + return; + if (using_ce) { + printf ("\tget_word_ce_prefetch (%d);\n", o); + } else { + printf ("\tget_word_prefetch (%d);\n", o); + } + did_prefetch = 1; + insn_n_cycles += 4; +} + +static void fill_prefetch_full (void) +{ + fill_prefetch_1 (0); + irc2ir (); + fill_prefetch_1 (2); } static void fill_prefetch_0 (void) { - if (using_prefetch) - printf ("fill_prefetch_0 ();\n"); + if (!using_prefetch) + return; + if (using_ce) + printf ("\tget_word_ce_prefetch (0);\n"); + else + printf ("\tget_word_prefetch (0);\n"); + did_prefetch = 1; + insn_n_cycles += 4; } -static void fill_prefetch_2 (void) +static void fill_prefetch_next_1 (void) { - if (using_prefetch) - printf ("fill_prefetch_2 ();\n"); + irc2ir (); + fill_prefetch_1 (m68k_pc_offset + 2); +} + +static void fill_prefetch_next (void) +{ + fill_prefetch_next_1 (); +} + +static void fill_prefetch_finish (void) +{ + if (did_prefetch || !using_prefetch) + return; + fill_prefetch_1 (m68k_pc_offset); } static void sync_m68k_pc (void) { if (m68k_pc_offset == 0) return; - printf ("m68k_incpc(%d);\n", m68k_pc_offset); - switch (m68k_pc_offset) { - case 0: - /*fprintf (stderr, "refilling prefetch at 0\n"); */ - break; - case 2: - fill_prefetch_2 (); - break; - default: - fill_prefetch_0 (); - break; - } + printf ("\tm68k_incpc (%d);\n", m68k_pc_offset); m68k_pc_offset = 0; } /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, - * the calling routine handles Apdi and Aipi modes. */ -static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem) + * the calling routine handles Apdi and Aipi modes. + * gb-- movem == 2 means the same thing but for a MOVE16 instruction */ +static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem, int flags) { + char namea[100]; + int m68k_pc_offset_last = m68k_pc_offset; + + sprintf (namea, "%sa", name); + start_brace (); switch (mode) { case Dreg: @@ -231,20 +365,20 @@ static void genamode (amodes mode, char #if defined(AMIGA) && !defined(WARPUP) /* sam: I don't know why gcc.2.7.2.1 produces a code worse */ /* if it is not done like that: */ - printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg(regs, %s))[3];\n", name, reg); + printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg (regs, %s))[3];\n", name, reg); #else - printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg); + printf ("\tuae_s8 %s = m68k_dreg (regs, %s);\n", name, reg); #endif break; case sz_word: #if defined(AMIGA) && !defined(WARPUP) - printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg(regs, %s))[1];\n", name, reg); + printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg (regs, %s))[1];\n", name, reg); #else - printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg); + printf ("\tuae_s16 %s = m68k_dreg (regs, %s);\n", name, reg); #endif break; case sz_long: - printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg); + printf ("\tuae_s32 %s = m68k_dreg (regs, %s);\n", name, reg); break; default: abort (); @@ -256,45 +390,46 @@ static void genamode (amodes mode, char if (getv == 1) switch (size) { case sz_word: - printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg); + printf ("\tuae_s16 %s = m68k_areg (regs, %s);\n", name, reg); break; case sz_long: - printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg); + printf ("\tuae_s32 %s = m68k_areg (regs, %s);\n", name, reg); break; default: abort (); } return; case Aind: - printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); + printf ("\tuaecptr %sa = m68k_areg (regs, %s);\n", name, reg); break; case Aipi: - printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); + printf ("\tuaecptr %sa = m68k_areg (regs, %s);\n", name, reg); break; case Apdi: - insn_n_cycles += 2; switch (size) { case sz_byte: if (movem) - printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg); + printf ("\tuaecptr %sa = m68k_areg (regs, %s);\n", name, reg); else - printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg); + printf ("\tuaecptr %sa = m68k_areg (regs, %s) - areg_byteinc[%s];\n", name, reg, reg); break; case sz_word: - printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2); + printf ("\tuaecptr %sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 2); break; case sz_long: - printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4); + printf ("\tuaecptr %sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 4); break; default: abort (); } break; + if (!(flags & GF_APDI)) { + addcycles (2); + } case Ad16: - printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ()); + printf ("\tuaecptr %sa = m68k_areg (regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword (flags & GF_NOREFILL)); break; case Ad8r: - insn_n_cycles += 2; if (cpu_level > 1) { if (next_cpu_level < 1) next_cpu_level = 1; @@ -302,17 +437,19 @@ static void genamode (amodes mode, char start_brace (); /* This would ordinarily be done in gen_nextiword, which we bypass. */ insn_n_cycles += 4; - printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg); + printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg (regs, %s), next_iword());\n", name, reg); } else - printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ()); + printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg (regs, %s), %s);\n", name, reg, gen_nextiword (flags & GF_NOREFILL)); + if (!(flags & GF_AD8R)) { + addcycles (2); + } break; case PC16: printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset); - printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ()); + printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags & GF_NOREFILL)); break; case PC8r: - insn_n_cycles += 2; if (cpu_level > 1) { if (next_cpu_level < 1) next_cpu_level = 1; @@ -320,32 +457,35 @@ static void genamode (amodes mode, char start_brace (); /* This would ordinarily be done in gen_nextiword, which we bypass. */ insn_n_cycles += 4; - printf ("\tuaecptr tmppc = m68k_getpc();\n"); + printf ("\tuaecptr tmppc = m68k_getpc ();\n"); printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name); } else { - printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset); - printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ()); + printf ("\tuaecptr tmppc = m68k_getpc () + %d;\n", m68k_pc_offset); + printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword (flags & GF_NOREFILL)); } + if (!(flags & GF_PC8R)) { + addcycles (2); + } break; case absw: - printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ()); + printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags & GF_NOREFILL)); break; case absl: - printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ()); + gen_nextilong ("uaecptr", namea, flags & GF_NOREFILL); break; case imm: if (getv != 1) abort (); switch (size) { case sz_byte: - printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ()); + printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags & GF_NOREFILL)); break; case sz_word: - printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ()); + printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags & GF_NOREFILL)); break; case sz_long: - printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ()); + gen_nextilong ("uae_s32", name, flags & GF_NOREFILL); break; default: abort (); @@ -354,17 +494,17 @@ static void genamode (amodes mode, char case imm0: if (getv != 1) abort (); - printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ()); + printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags & GF_NOREFILL)); return; case imm1: if (getv != 1) abort (); - printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ()); + printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags & GF_NOREFILL)); return; case imm2: if (getv != 1) abort (); - printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ()); + gen_nextilong ("uae_s32", name, flags & GF_NOREFILL); return; case immi: if (getv != 1) @@ -378,18 +518,21 @@ static void genamode (amodes mode, char /* We get here for all non-reg non-immediate addressing modes to * actually fetch the value. */ - if (using_exception_3 && getv != 0 && size != sz_byte) { - printf ("\tif ((%sa & 1) != 0) {\n", name); - printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name); - printf ("\t\tlast_op_for_exception_3 = opcode;\n"); - printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset); - printf ("\t\tException(3, 0);\n"); + if (using_prefetch && using_exception_3 && getv != 0 && size != sz_byte) { + printf ("\tif (%sa & 1) {\n", name); + if (using_prefetch) + printf ("\t\texception3 (opcode, m68k_getpc () + %d, %sa);\n", m68k_pc_offset + 2, name); + else + printf ("\t\texception3 (opcode, m68k_getpc () + %d, %sa);\n", m68k_pc_offset_last, name); printf ("\t\tgoto %s;\n", endlabelstr); printf ("\t}\n"); need_endlabel = 1; start_brace (); } + if (flags & GF_PREFETCH) + fill_prefetch_next (); + if (getv == 1) { switch (size) { case sz_byte: insn_n_cycles += 4; break; @@ -399,9 +542,9 @@ static void genamode (amodes mode, char } start_brace (); switch (size) { - case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break; - case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break; - case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break; + case sz_byte: printf ("\tuae_s8 %s = get_byte (%sa);\n", name, name); break; + case sz_word: printf ("\tuae_s16 %s = get_word (%sa);\n", name, name); break; + case sz_long: printf ("\tuae_s32 %s = get_long (%sa);\n", name, name); break; default: abort (); } } @@ -413,13 +556,13 @@ static void genamode (amodes mode, char case Aipi: switch (size) { case sz_byte: - printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg); + printf ("\tm68k_areg (regs, %s) += areg_byteinc[%s];\n", reg, reg); break; case sz_word: - printf ("\tm68k_areg(regs, %s) += 2;\n", reg); + printf ("\tm68k_areg (regs, %s) += 2;\n", reg); break; case sz_long: - printf ("\tm68k_areg(regs, %s) += 4;\n", reg); + printf ("\tm68k_areg (regs, %s) += 4;\n", reg); break; default: abort (); @@ -439,13 +582,13 @@ static void genastore (char *from, amode case Dreg: switch (size) { case sz_byte: - printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from); + printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from); break; case sz_word: - printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from); + printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from); break; case sz_long: - printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from); + printf ("\tm68k_dreg (regs, %s) = (%s);\n", reg, from); break; default: abort (); @@ -454,11 +597,11 @@ static void genastore (char *from, amode case Areg: switch (size) { case sz_word: - fprintf (stderr, "Foo\n"); - printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from); + write_log ("Foo\n"); + printf ("\tm68k_areg (regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from); break; case sz_long: - printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from); + printf ("\tm68k_areg (regs, %s) = (%s);\n", reg, from); break; default: abort (); @@ -478,19 +621,19 @@ static void genastore (char *from, amode switch (size) { case sz_byte: insn_n_cycles += 4; - printf ("\tput_byte(%sa,%s);\n", to, from); + printf ("\tput_byte (%sa,%s);\n", to, from); break; case sz_word: insn_n_cycles += 4; if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) abort (); - printf ("\tput_word(%sa,%s);\n", to, from); + printf ("\tput_word (%sa,%s);\n", to, from); break; case sz_long: insn_n_cycles += 8; if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) abort (); - printf ("\tput_long(%sa,%s);\n", to, from); + printf ("\tput_long (%sa,%s);\n", to, from); break; default: abort (); @@ -514,22 +657,22 @@ static void genmovemel (uae_u16 opcode) int size = table68k[opcode].size == sz_long ? 4 : 2; if (table68k[opcode].size == sz_long) { - strcpy (getcode, "get_long(srca)"); + strcpy (getcode, "get_long (srca)"); } else { - strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)"); + strcpy (getcode, "(uae_s32)(uae_s16)get_word (srca)"); } - printf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); + printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); - genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); + genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, 0); start_brace (); - printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n", + printf ("\twhile (dmask) { m68k_dreg (regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n", getcode, size); - printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n", + printf ("\twhile (amask) { m68k_areg (regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n", getcode, size); if (table68k[opcode].dmode == Aipi) - printf ("\tm68k_areg(regs, dstreg) = srca;\n"); + printf ("\tm68k_areg (regs, dstreg) = srca;\n"); } static void genmovemle (uae_u16 opcode) @@ -537,42 +680,46 @@ static void genmovemle (uae_u16 opcode) char putcode[100]; int size = table68k[opcode].size == sz_long ? 4 : 2; if (table68k[opcode].size == sz_long) { - strcpy (putcode, "put_long(srca,"); + strcpy (putcode, "put_long (srca,"); } else { - strcpy (putcode, "put_word(srca,"); + strcpy (putcode, "put_word (srca,"); } - printf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); - genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); + printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); + genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, 0); if (using_prefetch) sync_m68k_pc (); start_brace (); if (table68k[opcode].dmode == Apdi) { printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); - printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n", + printf ("\twhile (amask) { srca -= %d; %s m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; }\n", size, putcode); - printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", + printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", size, putcode); - printf ("\tm68k_areg(regs, dstreg) = srca;\n"); + printf ("\tm68k_areg (regs, dstreg) = srca;\n"); } else { printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); - printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", + printf ("\twhile (dmask) { %s m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", putcode, size); - printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", + printf ("\twhile (amask) { %s m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", putcode, size); } } -static void duplicate_carry (void) +static void duplicate_carry (int n) { - printf ("\tCOPY_CARRY;\n"); + while (n-- != 0) + printf ("\t"); + printf ("COPY_CARRY;\n"); } -typedef enum { - flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn, - flag_av, flag_sv -} flagtypes; +typedef enum +{ + flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn, + flag_av, flag_sv +} +flagtypes; static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst) { @@ -686,25 +833,25 @@ static void genflags_normal (flagtypes t printf ("\tSET_ZFLG (%s == 0);\n", vstr); printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr); - duplicate_carry (); + duplicate_carry (0); printf ("\tSET_NFLG (flgn != 0);\n"); break; case flag_sub: printf ("\tSET_ZFLG (%s == 0);\n", vstr); printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n"); printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr); - duplicate_carry (); + duplicate_carry (0); printf ("\tSET_NFLG (flgn != 0);\n"); break; case flag_addx: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */ printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */ - duplicate_carry (); + duplicate_carry (0); break; case flag_subx: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */ printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */ - duplicate_carry (); + duplicate_carry (0); break; case flag_cmp: printf ("\tSET_ZFLG (%s == 0);\n", vstr); @@ -783,7 +930,7 @@ static void genflags (flagtypes type, wo case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break; } return; - + default: break; } @@ -829,7 +976,7 @@ static int source_is_imm1_8 (struct inst static void gen_opcode (unsigned long int opcode) { struct instr *curi = table68k + opcode; - insn_n_cycles = 4; + insn_n_cycles = using_prefetch ? 0 : 4; start_brace (); #if 0 @@ -863,48 +1010,70 @@ static void gen_opcode (unsigned long in case i_OR: case i_AND: case i_EOR: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^'); genflags (flag_logical, curi->size, "src", "", ""); + if (curi->size == sz_long && isreg (curi->dmode)) + addcycles (curi->mnemo == i_AND ? 2 : 4); + fill_prefetch_next (); genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); break; case i_ORSR: case i_EORSR: printf ("\tMakeSR();\n"); - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); if (curi->size == sz_byte) { printf ("\tsrc &= 0xFF;\n"); } + addcycles (4); + fill_prefetch_next (); printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|'); printf ("\tMakeFromSR();\n"); break; case i_ANDSR: printf ("\tMakeSR();\n"); - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); if (curi->size == sz_byte) { printf ("\tsrc |= 0xFF00;\n"); } + addcycles (4); + fill_prefetch_next (); printf ("\tregs.sr &= src;\n"); printf ("\tMakeFromSR();\n"); break; case i_SUB: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) { + if (curi->dmode == Dreg && curi->size == sz_long) + addcycles ((curi->smode == imm || curi->smode == immi) ? 4 : 2); + } + fill_prefetch_next (); start_brace (); genflags (flag_sub, curi->size, "newv", "src", "dst"); genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_SUBA: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); + if (isreg (curi->dmode) && curi->dmode == Areg) { + int tmpc = curi->size == sz_long ? 2 : 4; + if (curi->size == sz_long) + tmpc += (isreg (curi->smode) || curi->smode == imm) ? 2 : 0; + addcycles (tmpc); + } + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = dst - src;\n"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); break; case i_SUBX: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); + if ((isreg (curi->smode) && curi->size == sz_long) || !isreg (curi->smode)) + addcycles (2); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n"); genflags (flag_subx, curi->size, "newv", "src", "dst"); @@ -912,40 +1081,55 @@ static void gen_opcode (unsigned long in genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_SBCD: - /* Let's hope this works... */ - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); + fill_prefetch_next (); start_brace (); printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n"); printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n"); - printf ("\tuae_u16 newv;\n"); - printf ("\tint cflg;\n"); - printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n"); - printf ("\tnewv = newv_hi + (newv_lo & 0xF);"); - printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n"); - duplicate_carry (); - printf ("\tif (cflg) newv -= 0x60;\n"); + printf ("\tuae_u16 newv, tmp_newv;\n"); + printf ("\tint bcd = 0;\n"); + printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n"); + printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n"); + printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n"); + printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n"); + duplicate_carry (0); genflags (flag_zn, curi->size, "newv", "", ""); - genflags (flag_sv, curi->size, "newv", "src", "dst"); + printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_ADD: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) { + if (curi->dmode == Dreg && curi->size == sz_long) + addcycles ((curi->smode == imm || curi->smode == immi) ? 4 : 2); + } + fill_prefetch_next (); start_brace (); genflags (flag_add, curi->size, "newv", "src", "dst"); genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_ADDA: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); + if (isreg (curi->dmode) && curi->dmode == Areg) { + int tmpc = curi->size == sz_long ? 2 : 4; + if (curi->size == sz_long) + tmpc += (isreg (curi->smode) || curi->smode == imm) ? 2 : 0; + addcycles (tmpc); + } + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = dst + src;\n"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); break; case i_ADDX: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); + if ((isreg (curi->smode) && curi->size == sz_long) || !isreg (curi->smode)) + addcycles (2); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n"); genflags (flag_addx, curi->size, "newv", "src", "dst"); @@ -953,30 +1137,38 @@ static void gen_opcode (unsigned long in genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_ABCD: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); + fill_prefetch_next (); start_brace (); printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n"); printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n"); - printf ("\tuae_u16 newv;\n"); + printf ("\tuae_u16 newv, tmp_newv;\n"); printf ("\tint cflg;\n"); - printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n"); - printf ("\tnewv = newv_hi + newv_lo;"); - printf ("\tSET_CFLG (cflg = (newv & 0x1F0) > 0x90);\n"); - duplicate_carry (); + printf ("\tnewv = tmp_newv = newv_hi + newv_lo;"); + printf ("\tif (newv_lo > 9) { newv += 6; }\n"); + printf ("\tcflg = (newv & 0x3F0) > 0x90;\n"); printf ("\tif (cflg) newv += 0x60;\n"); + printf ("\tSET_CFLG (cflg);\n"); + duplicate_carry (0); genflags (flag_zn, curi->size, "newv", "", ""); - genflags (flag_sv, curi->size, "newv", "src", "dst"); + printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n"); genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_NEG: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + if (isreg (curi->smode) && curi->size == sz_long) + addcycles (2); + fill_prefetch_next (); start_brace (); genflags (flag_sub, curi->size, "dst", "src", "0"); genastore ("dst", curi->smode, "srcreg", curi->size, "src"); break; case i_NEGX: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + if (isreg (curi->smode) && curi->size == sz_long) + addcycles (2); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n"); genflags (flag_subx, curi->size, "newv", "src", "0"); @@ -984,39 +1176,53 @@ static void gen_opcode (unsigned long in genastore ("newv", curi->smode, "srcreg", curi->size, "src"); break; case i_NBCD: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + if (isreg (curi->smode)) + addcycles (2); + fill_prefetch_next (); start_brace (); printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n"); printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n"); printf ("\tuae_u16 newv;\n"); printf ("\tint cflg;\n"); - printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n"); - printf ("\tnewv = newv_hi + (newv_lo & 0xF);"); - printf ("\tSET_CFLG (cflg = (newv_hi & 0x1F0) > 0x90);\n"); - duplicate_carry(); + printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n"); + printf ("\tnewv = newv_hi + newv_lo;"); + printf ("\tcflg = (newv & 0x1F0) > 0x90;\n"); printf ("\tif (cflg) newv -= 0x60;\n"); + printf ("\tSET_CFLG (cflg);\n"); + duplicate_carry (0); genflags (flag_zn, curi->size, "newv", "", ""); genastore ("newv", curi->smode, "srcreg", curi->size, "src"); break; case i_CLR: - genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0); + if (isreg (curi->smode) && curi->size == sz_long) + addcycles (2); + fill_prefetch_next (); genflags (flag_logical, curi->size, "0", "", ""); genastore ("0", curi->smode, "srcreg", curi->size, "src"); break; case i_NOT: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + if (isreg (curi->smode) && curi->size == sz_long) + addcycles (2); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 dst = ~src;\n"); genflags (flag_logical, curi->size, "dst", "", ""); genastore ("dst", curi->smode, "srcreg", curi->size, "src"); break; case i_TST: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + fill_prefetch_next (); genflags (flag_logical, curi->size, "src", "", ""); break; case i_BTST: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) + addcycles (2); + fill_prefetch_next (); if (curi->size == sz_byte) printf ("\tsrc &= 7;\n"); else @@ -1024,8 +1230,11 @@ static void gen_opcode (unsigned long in printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); break; case i_BCHG: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) + addcycles (4); + fill_prefetch_next (); if (curi->size == sz_byte) printf ("\tsrc &= 7;\n"); else @@ -1035,8 +1244,11 @@ static void gen_opcode (unsigned long in genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); break; case i_BCLR: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) + addcycles (4); + fill_prefetch_next (); if (curi->size == sz_byte) printf ("\tsrc &= 7;\n"); else @@ -1046,8 +1258,11 @@ static void gen_opcode (unsigned long in genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); break; case i_BSET: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) + addcycles (4); + fill_prefetch_next (); if (curi->size == sz_byte) printf ("\tsrc &= 7;\n"); else @@ -1057,60 +1272,83 @@ static void gen_opcode (unsigned long in genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); break; case i_CMPM: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); + fill_prefetch_next (); + start_brace (); + genflags (flag_cmp, curi->size, "newv", "src", "dst"); + break; case i_CMP: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + if (isreg (curi->dmode)) { + if (curi->dmode == Areg || (curi->dmode == Dreg && curi->size == sz_long)) + addcycles (2); + } + fill_prefetch_next (); start_brace (); genflags (flag_cmp, curi->size, "newv", "src", "dst"); break; case i_CMPA: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); + if (isreg (curi->dmode)) { + if (curi->dmode == Areg || (curi->dmode == Dreg && curi->size == sz_long)) + addcycles (2); + } + fill_prefetch_next (); start_brace (); genflags (flag_cmp, sz_long, "newv", "src", "dst"); break; /* The next two are coded a little unconventional, but they are doing * weird things... */ case i_MVPRM: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - - printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ()); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + printf ("\tuaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0)); + fill_prefetch_next (); if (curi->size == sz_word) { - printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n"); + printf ("\tput_byte (memp, src >> 8); put_byte (memp + 2, src);\n"); } else { - printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n"); - printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n"); + printf ("\tput_byte (memp, src >> 24); put_byte (memp + 2, src >> 16);\n"); + printf ("\tput_byte (memp + 4, src >> 8); put_byte (memp + 6, src);\n"); } break; case i_MVPMR: - printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ()); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + printf ("\tuaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0)); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); if (curi->size == sz_word) { - printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n"); + printf ("\tuae_u16 val = (get_byte (memp) << 8) + get_byte (memp + 2);\n"); } else { - printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n"); - printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n"); + printf ("\tuae_u32 val = (get_byte (memp) << 24) + (get_byte (memp + 2) << 16)\n"); + printf (" + (get_byte (memp + 4) << 8) + get_byte (memp + 6);\n"); } + fill_prefetch_next (); genastore ("val", curi->dmode, "dstreg", curi->size, "dst"); break; case i_MOVE: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); - genflags (flag_logical, curi->size, "src", "", ""); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_APDI); genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); + genflags (flag_logical, curi->size, "src", "", ""); + sync_m68k_pc (); + fill_prefetch_next (); break; case i_MOVEA: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_APDI); if (curi->size == sz_word) { printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n"); } else { printf ("\tuae_u32 val = src;\n"); } + fill_prefetch_next (); genastore ("val", curi->dmode, "dstreg", sz_long, "dst"); break; case i_MVSR2: - genamode (curi->smode, "srcreg", sz_word, "src", 2, 0); + genamode (curi->smode, "srcreg", sz_word, "src", 2, 0, 0); + if (isreg (curi->smode)) + addcycles (2); + fill_prefetch_next (); printf ("\tMakeSR();\n"); if (curi->size == sz_byte) genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src"); @@ -1118,29 +1356,36 @@ static void gen_opcode (unsigned long in genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src"); break; case i_MV2SR: - genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); - if (curi->size == sz_byte) - printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n"); - else { + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0); + if (curi->size == sz_byte) { + addcycles (8); + printf ("\tMakeSR ();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n"); + } else { + addcycles (4); printf ("\tregs.sr = src;\n"); } - printf ("\tMakeFromSR();\n"); + fill_prefetch_next (); + printf ("\tMakeFromSR ();\n"); break; case i_SWAP: - genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n"); genflags (flag_logical, sz_long, "dst", "", ""); genastore ("dst", curi->smode, "srcreg", sz_long, "src"); break; case i_EXG: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + addcycles (2); + fill_prefetch_next (); genastore ("dst", curi->smode, "srcreg", curi->size, "src"); genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); break; case i_EXT: - genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break; @@ -1155,272 +1400,393 @@ static void gen_opcode (unsigned long in break; case i_MVMEL: genmovemel (opcode); + fill_prefetch_next (); break; case i_MVMLE: genmovemle (opcode); + fill_prefetch_next (); break; case i_TRAP: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); sync_m68k_pc (); printf ("\tException(src+32,0);\n"); + did_prefetch = 1; m68k_pc_offset = 0; break; case i_MVR2USP: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + fill_prefetch_next (); printf ("\tregs.usp = src;\n"); break; case i_MVUSP2R: - genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 2, 0, 0); + fill_prefetch_next (); genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src"); break; case i_RESET: - printf ("\tcustomreset();\n"); + fill_prefetch_next (); + printf ("\tcpureset();\n"); break; case i_NOP: + fill_prefetch_next (); break; case i_STOP: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); printf ("\tregs.sr = src;\n"); printf ("\tMakeFromSR();\n"); printf ("\tm68k_setstopped(1);\n"); + sync_m68k_pc (); + fill_prefetch_full (); break; case i_RTE: if (cpu_level == 0) { - genamode (Aipi, "7", sz_word, "sr", 1, 0); - genamode (Aipi, "7", sz_long, "pc", 1, 0); - printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n"); - fill_prefetch_0 (); + genamode (Aipi, "7", sz_word, "sr", 1, 0, GF_NOREFILL); + genamode (Aipi, "7", sz_long, "pc", 1, 0, GF_NOREFILL); + printf ("\tregs.sr = sr; m68k_setpc (pc);\n"); printf ("\tMakeFromSR();\n"); } else { int old_brace_level = n_braces; if (next_cpu_level < 0) next_cpu_level = 0; printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n"); - genamode (Aipi, "7", sz_word, "sr", 1, 0); - genamode (Aipi, "7", sz_long, "pc", 1, 0); - genamode (Aipi, "7", sz_word, "format", 1, 0); + genamode (Aipi, "7", sz_word, "sr", 1, 0, 0); + genamode (Aipi, "7", sz_long, "pc", 1, 0, 0); + genamode (Aipi, "7", sz_word, "format", 1, 0, 0); printf ("\tnewsr = sr; newpc = pc;\n"); printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n"); printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n"); - printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n"); - printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n"); - printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n"); - printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n"); - printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg (regs, 7) += 4; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg (regs, 7) += 52; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg (regs, 7) += 50; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg (regs, 7) += 12; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg (regs, 7) += 24; break; }\n"); + printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg (regs, 7) += 84; break; }\n"); printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr); printf ("\tregs.sr = newsr; MakeFromSR();\n}\n"); pop_braces (old_brace_level); printf ("\tregs.sr = newsr; MakeFromSR();\n"); - printf ("\tm68k_setpc_rte(newpc);\n"); - fill_prefetch_0 (); + printf ("\tif (newpc & 1)\n"); + printf ("\t\texception3 (0x%04.4X, m68k_getpc (), newpc);\n", opcode); + printf ("\telse\n"); + printf ("\t\tm68k_setpc (newpc);\n"); need_endlabel = 1; } /* PC is set and prefetch filled. */ m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_RTD: - printf ("\tcompiler_flush_jsr_stack();\n"); - genamode (Aipi, "7", sz_long, "pc", 1, 0); - genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0); - printf ("\tm68k_areg(regs, 7) += offs;\n"); - printf ("\tm68k_setpc_rte(pc);\n"); - fill_prefetch_0 (); + genamode (Aipi, "7", sz_long, "pc", 1, 0, 0); + genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0, 0); + printf ("\tm68k_areg (regs, 7) += offs;\n"); + printf ("\tif (pc & 1)\n"); + printf ("\t\texception3 (0x%04.4X, m68k_getpc (), pc);\n", opcode); + printf ("\telse\n"); + printf ("\t\tm68k_setpc (pc);\n"); /* PC is set and prefetch filled. */ m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_LINK: - genamode (Apdi, "7", sz_long, "old", 2, 0); - genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + genamode (Apdi, "7", sz_long, "old", 2, 0, 0); + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0); genastore ("src", Apdi, "7", sz_long, "old"); - genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src"); - genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); - printf ("\tm68k_areg(regs, 7) += offs;\n"); + genastore ("m68k_areg (regs, 7)", curi->smode, "srcreg", sz_long, "src"); + genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0, 0); + printf ("\tm68k_areg (regs, 7) += offs;\n"); + fill_prefetch_next (); break; case i_UNLK: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - printf ("\tm68k_areg(regs, 7) = src;\n"); - genamode (Aipi, "7", sz_long, "old", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + printf ("\tm68k_areg (regs, 7) = src;\n"); + genamode (Aipi, "7", sz_long, "old", 1, 0, 0); + fill_prefetch_next (); genastore ("old", curi->smode, "srcreg", curi->size, "src"); break; case i_RTS: printf ("\tm68k_do_rts();\n"); - fill_prefetch_0 (); m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_TRAPV: sync_m68k_pc (); - printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr); + printf ("\tif (GET_VFLG) {\n"); + printf ("\t\tException (7, m68k_getpc ());\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t}\n"); + fill_prefetch_next (); need_endlabel = 1; break; case i_RTR: - printf ("\tcompiler_flush_jsr_stack();\n"); printf ("\tMakeSR();\n"); - genamode (Aipi, "7", sz_word, "sr", 1, 0); - genamode (Aipi, "7", sz_long, "pc", 1, 0); + genamode (Aipi, "7", sz_word, "sr", 1, 0, 0); + genamode (Aipi, "7", sz_long, "pc", 1, 0, 0); printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n"); - printf ("\tregs.sr |= sr; m68k_setpc(pc);\n"); - fill_prefetch_0 (); + printf ("\tregs.sr |= sr; m68k_setpc (pc);\n"); printf ("\tMakeFromSR();\n"); m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_JSR: - genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); - printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset); - fill_prefetch_0 (); + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL); + start_brace (); + printf ("\tuaecptr oldpc = m68k_getpc () + %d;\n", m68k_pc_offset); + if (using_exception_3) { + printf ("\tif (srca & 1) {\n"); + printf ("\t\texception3i (opcode, oldpc, srca);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t}\n"); + need_endlabel = 1; + } + printf ("\tm68k_setpc (srca);\n"); m68k_pc_offset = 0; + fill_prefetch_1 (0); + printf("\tm68k_areg (regs, 7) -= 4;\n"); + printf("\tput_long (m68k_areg (regs, 7), oldpc);\n"); + fill_prefetch_next (); break; case i_JMP: - genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); - printf ("\tm68k_setpc(srca);\n"); - fill_prefetch_0 (); + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL); + if (using_exception_3) { + printf ("\tif (srca & 1) {\n"); + printf ("\t\texception3i (opcode, m68k_getpc () + 6, srca);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t}\n"); + need_endlabel = 1; + } + if (curi->smode == Ad16 || curi->smode == Ad8r || curi->smode == absw || curi->smode == PC16 || curi->smode == PC8r) + addcycles (2); + printf ("\tm68k_setpc (srca);\n"); m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_BSR: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA|GF_NOREFILL); printf ("\tuae_s32 s = (uae_s32)src + 2;\n"); if (using_exception_3) { printf ("\tif (src & 1) {\n"); - printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); - printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n"); - printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); + printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + s);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); printf ("\t}\n"); need_endlabel = 1; } - printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset); - fill_prefetch_0 (); + addcycles (2); + printf ("\tm68k_do_bsr(m68k_getpc () + %d, s);\n", m68k_pc_offset); m68k_pc_offset = 0; + fill_prefetch_full (); break; case i_Bcc: if (curi->size == sz_long) { if (cpu_level < 2) { - printf ("\tm68k_incpc(2);\n"); - printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr); - printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); - printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n"); - printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); + addcycles (2); + printf ("\tif (cctrue(%d)) {\n", curi->cc, endlabelstr); + printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 1);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t}\n"); + sync_m68k_pc (); + irc2ir (); + fill_prefetch_2 (); + printf ("\tgoto %s;\n", endlabelstr); need_endlabel = 1; } else { if (next_cpu_level < 1) next_cpu_level = 1; } } - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | GF_NOREFILL); + addcycles (2); printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc); if (using_exception_3) { printf ("\tif (src & 1) {\n"); - printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); - printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n"); - printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); + printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 2 + (uae_s32)src);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); printf ("\t}\n"); need_endlabel = 1; } -#ifdef USE_COMPILER - printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n"); -#else - printf ("\tm68k_incpc ((uae_s32)src + 2);\n"); -#endif - fill_prefetch_0 (); - printf ("\treturn 5;\n"); + if (using_prefetch) { + if (curi->size == sz_byte) { + printf ("\tm68k_incpc ((uae_s32)src + 2);\n"); + } else { + printf ("\tm68k_incpc ((uae_s32)src + 2);\n"); + } + fill_prefetch_full (); + if (using_ce) + printf ("\treturn;\n"); + else + printf ("\treturn 10 * CYCLE_UNIT / 2;\n"); + } else { + printf ("\tm68k_incpc ((uae_s32)src + 2);\n"); + returncycles ("\t", 10); + } printf ("didnt_jump:;\n"); need_endlabel = 1; + sync_m68k_pc (); + if (curi->size == sz_byte) { + addcycles (2); + irc2ir (); + fill_prefetch_2 (); + } else + fill_prefetch_full (); insn_n_cycles = curi->size == sz_byte ? 8 : 12; break; case i_LEA: - genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_AA); + if (curi->smode == Ad8r || curi->smode == PC8r) + addcycles (4); + fill_prefetch_next (); genastore ("srca", curi->dmode, "dstreg", curi->size, "dst"); break; case i_PEA: - genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); - genamode (Apdi, "7", sz_long, "dst", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA); + genamode (Apdi, "7", sz_long, "dst", 2, 0, GF_AA); + if (curi->smode == Ad8r || curi->smode == PC8r) + addcycles (4); + if (!(curi->smode == absw || curi->smode == absl)) + fill_prefetch_next (); genastore ("srca", Apdi, "7", sz_long, "dst"); + if ((curi->smode == absw || curi->smode == absl)) + fill_prefetch_next (); break; case i_DBcc: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA|GF_NOREFILL); + genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0, GF_AA|GF_NOREFILL); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + addcycles (2); printf ("\tif (!cctrue(%d)) {\n", curi->cc); - genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src"); + printf ("\t\tm68k_incpc ((uae_s32)offs + 2);\n"); + printf ("\t"); fill_prefetch_1 (0); + printf ("\t"); genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src"); printf ("\t\tif (src) {\n"); if (using_exception_3) { printf ("\t\t\tif (offs & 1) {\n"); - printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n"); - printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n"); - printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr); - printf ("\t\t}\n"); + printf ("\t\t\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 2 + (uae_s32)offs + 2);\n"); + printf ("\t\t\t\tgoto %s;\n", endlabelstr); + printf ("\t\t\t}\n"); need_endlabel = 1; } -#ifdef USE_COMPILER - printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n"); -#else - printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n"); -#endif - fill_prefetch_0 (); - /* ??? Cycle count is a guess. */ - printf ("\t\treturn 6;\n"); + irc2ir (); + fill_prefetch_1 (2); + returncycles ("\t\t\t", 12); printf ("\t\t}\n"); + printf ("\t} else {\n"); + addcycles2 ("\t\t", 2); printf ("\t}\n"); + printf ("\tm68k_setpc (oldpc + %d);\n", m68k_pc_offset); + m68k_pc_offset = 0; + fill_prefetch_full (); insn_n_cycles = 12; need_endlabel = 1; break; case i_Scc: - genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0); start_brace (); + fill_prefetch_next (); printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc); genastore ("val", curi->smode, "srcreg", curi->size, "src"); break; case i_DIVU: - printf ("\tuaecptr oldpc = m68k_getpc();\n"); - genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); - sync_m68k_pc (); - /* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends - * on this (actually, it's doing a DIVS). */ - printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr); - printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n"); - printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n"); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); + printf ("\tCLEAR_CZNV;\n"); + printf ("\tif (src == 0) {\n"); + if (cpu_level > 0) { + /* 68020 sets V when dividing by zero and N if dst is negative + * 68000 clears both + */ + printf("\t\tSET_VFLG (1);\n"); + printf("\t\tif (dst < 0) SET_NFLG (1);\n"); + } + printf ("\t\tm68k_incpc (%d);\n", m68k_pc_offset); + printf ("\t\tException (5, oldpc);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t} else {\n"); + printf ("\t\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n"); + printf ("\t\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n"); + if (using_ce) { + printf ("\t\tint cycles = 138 * CYCLE_UNIT / 2 - lostcycles;\n"); + } /* The N flag appears to be set each time there is an overflow. - * Weird. */ - printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n"); - genflags (flag_logical, sz_word, "newv", "", ""); - printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); - genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); - printf ("\t}\n"); + * Weird. but 68020 only sets N when dst is negative.. */ + printf ("\t\tif (newv > 0xffff) {\n"); + printf ("\t\t\tSET_VFLG (1);\n"); +#ifdef UNDEF68020 + if (cpu_level >= 2) + printf ("\t\t\tif (currprefs.cpu_level == 0 || dst < 0) SET_NFLG (1);\n"); + else /* ??? some 68000 revisions may not set NFLG when overflow happens.. */ +#endif + printf ("\t\t\tSET_NFLG (1);\n"); + printf ("\t\t} else {\n"); + printf ("\t\t"); genflags (flag_logical, sz_word, "newv", "", ""); + printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); + printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); + printf ("\t\t}\n"); + fill_prefetch_next (); + sync_m68k_pc (); printf ("\t}\n"); insn_n_cycles += 136; need_endlabel = 1; break; case i_DIVS: - printf ("\tuaecptr oldpc = m68k_getpc();\n"); - genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); - sync_m68k_pc (); - printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr); - printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n"); - printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n"); - printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n"); - printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n"); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); + printf ("\tCLEAR_CZNV;\n"); + printf ("\tif (src == 0) {\n"); + if (cpu_level > 0) { + /* 68020 sets V when dividing by zero. Z is also set. + * 68000 clears both + */ + printf("\t\tSET_VFLG (1);\n"); + printf("\t\tSET_ZFLG (1);\n"); + } + printf ("\t\tm68k_incpc (%d);\n", m68k_pc_offset); + printf ("\t\tException (5, oldpc);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t} else {\n"); + printf ("\t\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n"); + printf ("\t\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n"); + if (using_ce) { + printf ("\t\tint cycles = 156 * CYCLE_UNIT / 2 - lostcycles;\n"); + } + printf ("\t\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {\n"); + printf ("\t\t\tSET_VFLG (1);\n"); +#ifdef UNDEF68020 + if (cpu_level > 0) + printf ("\t\t\tif (currprefs.cpu_level == 0) SET_NFLG (1);\n"); + else +#endif + printf ("\t\t\tSET_NFLG (1);\n"); + printf ("\t\t} else {\n"); + printf ("\t\t\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n"); genflags (flag_logical, sz_word, "newv", "", ""); - printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); - genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); - printf ("\t}\n"); + printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); + printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); + printf ("\t\t}\n"); + fill_prefetch_next (); + sync_m68k_pc (); printf ("\t}\n"); insn_n_cycles += 154; need_endlabel = 1; break; case i_MULU: - genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0, 0); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n"); genflags (flag_logical, sz_long, "newv", "", ""); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); + sync_m68k_pc (); insn_n_cycles += 66; break; case i_MULS: - genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); - genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0, 0); + fill_prefetch_next (); start_brace (); printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n"); genflags (flag_logical, sz_long, "newv", "", ""); @@ -1428,30 +1794,41 @@ static void gen_opcode (unsigned long in insn_n_cycles += 66; break; case i_CHK: - printf ("\tuaecptr oldpc = m68k_getpc();\n"); - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); - printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr); - printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + sync_m68k_pc (); + addcycles (6); + fill_prefetch_next (); + printf ("\tif ((uae_s32)dst < 0) {\n"); + printf ("\t\tSET_NFLG (1);\n"); + printf ("\t\tException (6, oldpc);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t} else if (dst > src) {\n"); + printf ("\t\tSET_NFLG (0);\n"); + printf ("\t\tException (6, oldpc);\n"); + printf ("\t\tgoto %s;\n", endlabelstr); + printf ("\t}\n"); need_endlabel = 1; break; case i_CHK2: - printf ("\tuaecptr oldpc = m68k_getpc();\n"); - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); + fill_prefetch_0 (); printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n"); switch (curi->size) { case sz_byte: - printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n"); + printf ("\tlower=(uae_s32)(uae_s8)get_byte (dsta); upper = (uae_s32)(uae_s8)get_byte (dsta+1);\n"); printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n"); break; case sz_word: - printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n"); + printf ("\tlower=(uae_s32)(uae_s16)get_word (dsta); upper = (uae_s32)(uae_s16)get_word (dsta+2);\n"); printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n"); break; case sz_long: - printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n"); + printf ("\tlower=get_long (dsta); upper = get_long (dsta+4);\n"); break; default: abort (); @@ -1463,8 +1840,9 @@ static void gen_opcode (unsigned long in break; case i_ASR: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1478,14 +1856,14 @@ static void gen_opcode (unsigned long in printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size)); printf ("\t\tSET_CFLG (sign);\n"); - duplicate_carry (); + duplicate_carry (0); if (source_is_imm1_8 (curi)) printf ("\t} else {\n"); else printf ("\t} else if (cnt > 0) {\n"); printf ("\t\tval >>= cnt - 1;\n"); printf ("\t\tSET_CFLG (val & 1);\n"); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval >>= 1;\n"); printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n", bit_mask (curi->size), @@ -1496,8 +1874,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ASL: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1511,7 +1890,7 @@ static void gen_opcode (unsigned long in printf ("\t\tSET_VFLG (val != 0);\n"); printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", bit_size (curi->size)); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval = 0;\n"); if (source_is_imm1_8 (curi)) printf ("\t} else {\n"); @@ -1524,7 +1903,7 @@ static void gen_opcode (unsigned long in printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n"); printf ("\t\tval <<= cnt - 1;\n"); printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval <<= 1;\n"); printf ("\t\tval &= %s;\n", bit_mask (curi->size)); printf ("\t}\n"); @@ -1532,8 +1911,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_LSR: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1546,7 +1926,7 @@ static void gen_opcode (unsigned long in printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n", bit_size (curi->size), bit_size (curi->size) - 1); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval = 0;\n"); if (source_is_imm1_8 (curi)) printf ("\t} else {\n"); @@ -1554,15 +1934,16 @@ static void gen_opcode (unsigned long in printf ("\t} else if (cnt > 0) {\n"); printf ("\t\tval >>= cnt - 1;\n"); printf ("\t\tSET_CFLG (val & 1);\n"); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval >>= 1;\n"); printf ("\t}\n"); genflags (flag_logical_noclobber, curi->size, "val", "", ""); genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_LSL: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1575,7 +1956,7 @@ static void gen_opcode (unsigned long in printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", bit_size (curi->size)); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval = 0;\n"); if (source_is_imm1_8 (curi)) printf ("\t} else {\n"); @@ -1583,7 +1964,7 @@ static void gen_opcode (unsigned long in printf ("\t} else if (cnt > 0) {\n"); printf ("\t\tval <<= (cnt - 1);\n"); printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); - duplicate_carry (); + duplicate_carry (0); printf ("\t\tval <<= 1;\n"); printf ("\tval &= %s;\n", bit_mask (curi->size)); printf ("\t}\n"); @@ -1591,8 +1972,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ROL: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1618,8 +2000,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ROR: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1645,8 +2028,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ROXL: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1656,12 +2040,12 @@ static void gen_opcode (unsigned long in } printf ("\tcnt &= 63;\n"); printf ("\tCLEAR_CZNV;\n"); - if (! source_is_imm1_8 (curi)) - force_range_for_rox ("cnt", curi->size); if (source_is_imm1_8 (curi)) printf ("{"); - else + else { + force_range_for_rox ("cnt", curi->size); printf ("\tif (cnt > 0) {\n"); + } printf ("\tcnt--;\n"); printf ("\t{\n\tuae_u32 carry;\n"); printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1); @@ -1675,8 +2059,9 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ROXR: - genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1686,12 +2071,12 @@ static void gen_opcode (unsigned long in } printf ("\tcnt &= 63;\n"); printf ("\tCLEAR_CZNV;\n"); - if (! source_is_imm1_8 (curi)) - force_range_for_rox ("cnt", curi->size); if (source_is_imm1_8 (curi)) printf ("{"); - else + else { + force_range_for_rox ("cnt", curi->size); printf ("\tif (cnt > 0) {\n"); + } printf ("\tcnt--;\n"); printf ("\t{\n\tuae_u32 carry;\n"); printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n"); @@ -1708,7 +2093,8 @@ static void gen_opcode (unsigned long in genastore ("val", curi->dmode, "dstreg", curi->size, "data"); break; case i_ASRW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1721,11 +2107,12 @@ static void gen_opcode (unsigned long in printf ("\tval = (val >> 1) | sign;\n"); genflags (flag_logical, curi->size, "val", "", ""); printf ("\tSET_CFLG (cflg);\n"); - duplicate_carry (); + duplicate_carry (0); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_ASLW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1739,13 +2126,14 @@ static void gen_opcode (unsigned long in genflags (flag_logical, curi->size, "val", "", ""); printf ("\tsign2 = %s & val;\n", cmask (curi->size)); printf ("\tSET_CFLG (sign != 0);\n"); - duplicate_carry (); + duplicate_carry (0); printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n"); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_LSRW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; @@ -1757,11 +2145,12 @@ static void gen_opcode (unsigned long in printf ("\tval >>= 1;\n"); genflags (flag_logical, curi->size, "val", "", ""); printf ("SET_CFLG (carry);\n"); - duplicate_carry (); + duplicate_carry (0); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_LSLW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u8 val = data;\n"); break; @@ -1773,11 +2162,12 @@ static void gen_opcode (unsigned long in printf ("\tval <<= 1;\n"); genflags (flag_logical, curi->size, "val", "", ""); printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); - duplicate_carry (); + duplicate_carry (0); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_ROLW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u8 val = data;\n"); break; @@ -1793,7 +2183,8 @@ static void gen_opcode (unsigned long in genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_RORW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u8 val = data;\n"); break; @@ -1809,7 +2200,8 @@ static void gen_opcode (unsigned long in genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_ROXLW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u8 val = data;\n"); break; @@ -1822,11 +2214,12 @@ static void gen_opcode (unsigned long in printf ("\tif (GET_XFLG) val |= 1;\n"); genflags (flag_logical, curi->size, "val", "", ""); printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); - duplicate_carry (); + duplicate_carry (0); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_ROXRW: - genamode (curi->smode, "srcreg", curi->size, "data", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0); + fill_prefetch_next (); start_brace (); switch (curi->size) { case sz_byte: printf ("\tuae_u8 val = data;\n"); break; @@ -1839,18 +2232,20 @@ static void gen_opcode (unsigned long in printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size)); genflags (flag_logical, curi->size, "val", "", ""); printf ("SET_CFLG (carry);\n"); - duplicate_carry (); + duplicate_carry (0); genastore ("val", curi->smode, "srcreg", curi->size, "data"); break; case i_MOVEC2: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + fill_prefetch_next (); start_brace (); printf ("\tint regno = (src >> 12) & 15;\n"); printf ("\tuae_u32 *regp = regs.regs + regno;\n"); printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr); break; case i_MOVE2C: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + fill_prefetch_next (); start_brace (); printf ("\tint regno = (src >> 12) & 15;\n"); printf ("\tuae_u32 *regp = regs.regs + regno;\n"); @@ -1859,78 +2254,79 @@ static void gen_opcode (unsigned long in case i_CAS: { int old_brace_level; - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); + fill_prefetch_0 (); start_brace (); printf ("\tint ru = (src >> 6) & 7;\n"); printf ("\tint rc = src & 7;\n"); - genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst"); + genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, rc)", "dst"); printf ("\tif (GET_ZFLG)"); old_brace_level = n_braces; start_brace (); - genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst"); + genastore ("(m68k_dreg (regs, ru))", curi->dmode, "dstreg", curi->size, "dst"); pop_braces (old_brace_level); printf ("else"); start_brace (); - printf ("m68k_dreg(regs, rc) = dst;\n"); + printf ("m68k_dreg (regs, rc) = dst;\n"); pop_braces (old_brace_level); } break; case i_CAS2: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n"); printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n"); if (curi->size == sz_word) { int old_brace_level = n_braces; - printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n"); - genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1"); + printf ("\tuae_u16 dst1 = get_word (rn1), dst2 = get_word (rn2);\n"); + genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1"); printf ("\tif (GET_ZFLG) {\n"); - genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2"); + genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2"); printf ("\tif (GET_ZFLG) {\n"); - printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n"); - printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n"); + printf ("\tput_word (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n"); + printf ("\tput_word (rn1, m68k_dreg (regs, (extra >> 6) & 7));\n"); printf ("\t}}\n"); pop_braces (old_brace_level); printf ("\tif (! GET_ZFLG) {\n"); - printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n"); - printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n"); + printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = (m68k_dreg (regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n"); + printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = (m68k_dreg (regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n"); printf ("\t}\n"); } else { int old_brace_level = n_braces; - printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n"); - genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1"); + printf ("\tuae_u32 dst1 = get_long (rn1), dst2 = get_long (rn2);\n"); + genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1"); printf ("\tif (GET_ZFLG) {\n"); - genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2"); + genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2"); printf ("\tif (GET_ZFLG) {\n"); - printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n"); - printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n"); + printf ("\tput_long (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n"); + printf ("\tput_long (rn1, m68k_dreg (regs, (extra >> 6) & 7));\n"); printf ("\t}}\n"); pop_braces (old_brace_level); printf ("\tif (! GET_ZFLG) {\n"); - printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n"); - printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n"); + printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = dst1;\n"); + printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = dst2;\n"); printf ("\t}\n"); } break; case i_MOVES: /* ignore DFC and SFC because we have no MMU */ { int old_brace_level; - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); printf ("\tif (extra & 0x800)\n"); old_brace_level = n_braces; start_brace (); printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n"); - genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); pop_braces (old_brace_level); printf ("else"); start_brace (); - genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0, 0); printf ("\tif (extra & 0x8000) {\n"); switch (curi->size) { - case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break; - case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break; - case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break; + case sz_byte: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break; + case sz_word: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break; + case sz_long: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = src;\n"); break; default: abort (); } printf ("\t} else {\n"); @@ -1953,22 +2349,23 @@ static void gen_opcode (unsigned long in break; case i_TRAPcc: if (curi->smode != am_unknown && curi->smode != am_illg) - genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0); - printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr); + genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0); + fill_prefetch_0 (); + printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc ()); goto %s; }\n", curi->cc, endlabelstr); need_endlabel = 1; break; case i_DIVL: sync_m68k_pc (); start_brace (); - printf ("\tuaecptr oldpc = m68k_getpc();\n"); - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); sync_m68k_pc (); printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n"); break; case i_MULL: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); - genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); sync_m68k_pc (); printf ("\tm68k_mull(opcode, dst, extra);\n"); break; @@ -1980,17 +2377,17 @@ static void gen_opcode (unsigned long in case i_BFFFO: case i_BFSET: case i_BFINS: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); - genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0, 0); start_brace (); - printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n"); - printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n"); + printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg (regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n"); + printf ("\tint width = (((extra & 0x20 ? m68k_dreg (regs, extra & 7) : (uae_u32)extra) - 1) & 0x1f) + 1;\n"); if (curi->dmode == Dreg) { - printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n"); + printf ("\tuae_u32 tmp = m68k_dreg (regs, dstreg) << (offset & 0x1f);\n"); } else { printf ("\tuae_u32 tmp,bf0,bf1;\n"); printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n"); - printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n"); + printf ("\tbf0 = get_long (dsta);bf1 = get_byte (dsta+4) & 0xff;\n"); printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n"); } printf ("\ttmp >>= (32 - width);\n"); @@ -2000,14 +2397,14 @@ static void gen_opcode (unsigned long in case i_BFTST: break; case i_BFEXTU: - printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n"); + printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = tmp;\n"); break; case i_BFCHG: printf ("\ttmp = ~tmp;\n"); break; case i_BFEXTS: printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n"); - printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n"); + printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = tmp;\n"); break; case i_BFCLR: printf ("\ttmp = 0;\n"); @@ -2015,13 +2412,15 @@ static void gen_opcode (unsigned long in case i_BFFFO: printf ("\t{ uae_u32 mask = 1 << (width-1);\n"); printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n"); - printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n"); + printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = offset;\n"); break; case i_BFSET: printf ("\ttmp = 0xffffffff;\n"); break; case i_BFINS: - printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n"); + printf ("\ttmp = m68k_dreg (regs, (extra >> 12) & 7);\n"); + printf ("\tSET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0);\n"); + printf ("\tSET_ZFLG (tmp == 0);\n"); break; default: break; @@ -2033,90 +2432,93 @@ static void gen_opcode (unsigned long in { printf ("\ttmp <<= (32 - width);\n"); if (curi->dmode == Dreg) { - printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n"); + printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n"); printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n"); printf ("\t\t(tmp >> (offset & 0x1f)) |\n"); printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n"); - printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n"); + printf (" (m68k_dreg (regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n"); } else { printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n"); printf ("\t\t(tmp >> (offset & 7)) |\n"); printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n"); printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n"); - printf ("\tput_long(dsta,bf0 );\n"); + printf ("\tput_long (dsta,bf0 );\n"); printf ("\tif (((offset & 7) + width) > 32) {\n"); printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n"); printf ("\t\t\t(tmp << (8 - (offset & 7)));\n"); - printf ("\t\tput_byte(dsta+4,bf1);\n"); + printf ("\t\tput_byte (dsta+4,bf1);\n"); printf ("\t}\n"); } } break; case i_PACK: if (curi->smode == Dreg) { - printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ()); - printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n"); + printf ("\tuae_u16 val = m68k_dreg (regs, srcreg) + %s;\n", gen_nextiword (0)); + printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n"); } else { printf ("\tuae_u16 val;\n"); - printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); - printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n"); - printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); - printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ()); - printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); - printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n"); + printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); + printf ("\tval = (uae_u16)get_byte (m68k_areg (regs, srcreg));\n"); + printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); + printf ("\tval = (val | ((uae_u16)get_byte (m68k_areg (regs, srcreg)) << 8)) + %s;\n", gen_nextiword (0)); + printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); + printf ("\tput_byte (m68k_areg (regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n"); } break; case i_UNPK: if (curi->smode == Dreg) { - printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n"); - printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ()); - printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n"); + printf ("\tuae_u16 val = m68k_dreg (regs, srcreg);\n"); + printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0)); + printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffff0000) | (val & 0xffff);\n"); } else { printf ("\tuae_u16 val;\n"); - printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n"); - printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n"); - printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ()); - printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); - printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n"); - printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n"); - printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n"); + printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); + printf ("\tval = (uae_u16)get_byte (m68k_areg (regs, srcreg));\n"); + printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0)); + printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); + printf ("\tput_byte (m68k_areg (regs, dstreg),val);\n"); + printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); + printf ("\tput_byte (m68k_areg (regs, dstreg),val >> 8);\n"); } break; case i_TAS: - genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0); genflags (flag_logical, curi->size, "src", "", ""); + if (!isreg (curi->smode)) + addcycles (2); + fill_prefetch_next (); printf ("\tsrc |= 0x80;\n"); genastore ("src", curi->smode, "srcreg", curi->size, "src"); break; case i_FPP: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); sync_m68k_pc (); printf ("\tfpp_opp(opcode,extra);\n"); break; case i_FDBcc: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); sync_m68k_pc (); printf ("\tfdbcc_opp(opcode,extra);\n"); break; case i_FScc: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); sync_m68k_pc (); printf ("\tfscc_opp(opcode,extra);\n"); break; case i_FTRAPcc: sync_m68k_pc (); start_brace (); - printf ("\tuaecptr oldpc = m68k_getpc();\n"); + printf ("\tuaecptr oldpc = m68k_getpc ();\n"); if (curi->smode != am_unknown && curi->smode != am_illg) - genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0); sync_m68k_pc (); printf ("\tftrapcc_opp(opcode,oldpc);\n"); break; case i_FBcc: sync_m68k_pc (); start_brace (); - printf ("\tuaecptr pc = m68k_getpc();\n"); - genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0); + printf ("\tuaecptr pc = m68k_getpc ();\n"); + genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0, 0); sync_m68k_pc (); printf ("\tfbcc_opp(opcode,pc,extra);\n"); break; @@ -2128,31 +2530,89 @@ static void gen_opcode (unsigned long in sync_m68k_pc (); printf ("\tfrestore_opp(opcode);\n"); break; + + case i_CINVL: + case i_CINVP: + case i_CINVA: + case i_CPUSHL: + case i_CPUSHP: + case i_CPUSHA: + break; + case i_MOVE16: + if ((opcode & 0xfff8) == 0xf620) { + /* MOVE16 (Ax)+,(Ay)+ */ + printf ("\tuaecptr mems = m68k_areg (regs, srcreg) & ~15, memd;\n"); + printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword (0)); + printf ("\tmemd = m68k_areg (regs, dstreg) & ~15;\n"); + printf ("\tput_long (memd, get_long (mems));\n"); + printf ("\tput_long (memd+4, get_long (mems+4));\n"); + printf ("\tput_long (memd+8, get_long (mems+8));\n"); + printf ("\tput_long (memd+12, get_long (mems+12));\n"); + printf ("\tif (srcreg != dstreg)\n"); + printf ("\tm68k_areg (regs, srcreg) += 16;\n"); + printf ("\tm68k_areg (regs, dstreg) += 16;\n"); + } else { + /* Other variants */ + genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2, 0); + genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2, 0); + printf ("\tmemsa &= ~15;\n"); + printf ("\tmemda &= ~15;\n"); + printf ("\tput_long (memda, get_long (memsa));\n"); + printf ("\tput_long (memda+4, get_long (memsa+4));\n"); + printf ("\tput_long (memda+8, get_long (memsa+8));\n"); + printf ("\tput_long (memda+12, get_long (memsa+12));\n"); + if ((opcode & 0xfff8) == 0xf600) + printf ("\tm68k_areg (regs, srcreg) += 16;\n"); + else if ((opcode & 0xfff8) == 0xf608) + printf ("\tm68k_areg (regs, dstreg) += 16;\n"); + } + break; + case i_MMUOP: - genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0); + genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); + sync_m68k_pc (); + printf ("\tmmu_op (opcode, extra);\n"); + break; + case i_MMUOP30A: + printf ("\tuaecptr pc = m68k_getpc ();\n"); + if (curi->smode == Areg || curi->smode == Dreg) + printf("\tuae_u16 extraa = 0;\n"); + else + genamode (curi->smode, "srcreg", curi->size, "extra", 0, 0, 0); + sync_m68k_pc (); + printf ("\tmmu_op30 (pc, opcode, 1, extraa);\n"); + break; + case i_MMUOP30B: + printf ("\tuaecptr pc = m68k_getpc ();\n"); + genamode (curi->smode, "srcreg", curi->size, "extra", 0, 0, 0); sync_m68k_pc (); - printf ("\tmmu_op(opcode,extra);\n"); + printf ("\tmmu_op30 (pc, opcode, 0, 0);\n"); break; default: abort (); break; } finish_braces (); + fill_prefetch_finish (); sync_m68k_pc (); + did_prefetch = 0; } static void generate_includes (FILE * f) { fprintf (f, "#include \"sysconfig.h\"\n"); fprintf (f, "#include \"sysdeps.h\"\n"); - fprintf (f, "#include \"config.h\"\n"); fprintf (f, "#include \"options.h\"\n"); fprintf (f, "#include \"memory.h\"\n"); fprintf (f, "#include \"custom.h\"\n"); - fprintf (f, "#include \"readcpu.h\"\n"); fprintf (f, "#include \"newcpu.h\"\n"); - fprintf (f, "#include \"compiler.h\"\n"); + fprintf (f, "#include \"cpu_prefetch.h\"\n"); fprintf (f, "#include \"cputbl.h\"\n"); + + fprintf (f, "#define CPUFUNC(x) x##_ff\n" + "#ifdef NOFLAGS\n" + "#include \"noflags.h\"\n" + "#endif\n"); } static int postfix; @@ -2175,23 +2635,27 @@ static void generate_one_opcode (int rp) if (table68k[opcode].handler != -1) return; - if (opcode_next_clev[rp] != cpu_level) { - fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp], - opcode, lookuptab[i].name); - return; - } - fprintf (stblfile, "{ op_%lx_%d, 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); - fprintf (headerfile, "extern cpuop_func op_%lx_%d;\n", opcode, postfix); - printf ("unsigned long REGPARAM2 op_%lx_%d(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); + if (generate_stbl) { + if (opcode_next_clev[rp] != cpu_level) { + fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp], + opcode, lookuptab[i].name); + return; + } + fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); + } + fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix); + fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix); + printf ("unsigned long REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); switch (table68k[opcode].stype) { - case 0: smsk = 7; break; - case 1: smsk = 255; break; - case 2: smsk = 15; break; - case 3: smsk = 7; break; - case 4: smsk = 7; break; - case 5: smsk = 63; break; - default: abort (); + case 0: smsk = 7; break; + case 1: smsk = 255; break; + case 2: smsk = 15; break; + case 3: smsk = 7; break; + case 4: smsk = 7; break; + case 5: smsk = 63; break; + case 7: smsk = 3; break; + default: abort (); } dmsk = 7; @@ -2211,11 +2675,6 @@ static void generate_one_opcode (int rp) char source[100]; int pos = table68k[opcode].spos; -#if 0 - /* Check that we can do the little endian optimization safely. */ - if (pos < 8 && (smsk >> (8 - pos)) != 0) - abort (); -#endif if (pos) sprintf (source, "((opcode >> %d) & %d)", pos, smsk); else @@ -2246,7 +2705,7 @@ static void generate_one_opcode (int rp) /* Check that we can do the little endian optimization safely. */ if (pos < 8 && (dmsk >> (8 - pos)) != 0) abort (); -#endif +#endif if (pos) printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", pos, dmsk); @@ -2260,7 +2719,7 @@ static void generate_one_opcode (int rp) gen_opcode (opcode); if (need_endlabel) printf ("%s: ;\n", endlabelstr); - printf ("return %d;\n", insn_n_cycles / 2); + printf ("return %d * CYCLE_UNIT / 2;\n", insn_n_cycles); printf ("}\n"); opcode_next_clev[rp] = next_cpu_level; opcode_last_postfix[rp] = postfix; @@ -2272,47 +2731,50 @@ static void generate_func (void) using_prefetch = 0; using_exception_3 = 0; - for (i = 0; i < 5; i++) { - cpu_level = 3 - i; - if (i == 4) { + for (i = 0; i < 7; i++) { + cpu_level = 6 - i; + if (i == 6) { cpu_level = 0; using_prefetch = 1; using_exception_3 = 1; for (rp = 0; rp < nr_cpuop_funcs; rp++) opcode_next_clev[rp] = 0; } - postfix = i; - fprintf (stblfile, "struct cputbl op_smalltbl_%d[] = {\n", postfix); - /* sam: this is for people with low memory (eg. me :)) */ - printf ("\n" - "#if !defined(PART_1) && !defined(PART_2) && " - "!defined(PART_3) && !defined(PART_4) && " + postfix = i; + generate_stbl = i != 5; + if (generate_stbl) { + fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix); + + /* sam: this is for people with low memory (eg. me :)) */ + printf ("\n" + "#if !defined(PART_1) && !defined(PART_2) && " + "!defined(PART_3) && !defined(PART_4) && " "!defined(PART_5) && !defined(PART_6) && " "!defined(PART_7) && !defined(PART_8)" - "\n" - "#define PART_1 1\n" - "#define PART_2 1\n" - "#define PART_3 1\n" - "#define PART_4 1\n" - "#define PART_5 1\n" - "#define PART_6 1\n" - "#define PART_7 1\n" - "#define PART_8 1\n" - "#endif\n\n"); - + "\n" + "#define PART_1 1\n" + "#define PART_2 1\n" + "#define PART_3 1\n" + "#define PART_4 1\n" + "#define PART_5 1\n" + "#define PART_6 1\n" + "#define PART_7 1\n" + "#define PART_8 1\n" + "#endif\n\n"); + } rp = 0; - for(j=1;j<=8;++j) { - int k = (j*nr_cpuop_funcs)/8; - printf ("#ifdef PART_%d\n",j); - for (; rp < k; rp++) - generate_one_opcode (rp); - printf ("#endif\n\n"); + for(j = 1; j <= 8; ++j) { + int k = (j * nr_cpuop_funcs) / 8; + printf ("#ifdef PART_%d\n",j); + for (; rp < k; rp++) + generate_one_opcode (rp); + printf ("#endif\n\n"); } - fprintf (stblfile, "{ 0, 0, 0 }};\n"); + if (generate_stbl) + fprintf (stblfile, "{ 0, 0, 0 }};\n"); } - } int main (int argc, char **argv)