--- uae/src/include/memory.h 2018/04/24 17:12:50 1.1.1.10 +++ uae/src/include/memory.h 2018/04/24 17:18:48 1.1.1.13 @@ -7,10 +7,7 @@ */ extern void memory_reset (void); - -extern int special_mem; -#define S_READ 1 -#define S_WRITE 2 +extern void a1000_reset (void); typedef uae_u32 (*mem_get_func)(uaecptr) REGPARAM; typedef void (*mem_put_func)(uaecptr, uae_u32) REGPARAM; @@ -47,6 +44,8 @@ extern uae_u32 allocated_a3000mem; extern int ersatzkickfile; extern int cloanto_rom; +extern uae_u16 kickstart_version; +extern int uae_boot_rom, uae_boot_rom_size; extern uae_u8* baseaddr[]; @@ -69,6 +68,7 @@ typedef struct { ourselves. This holds the memory address where the start of memory is for this particular bank. */ uae_u8 *baseaddr; + const char *name; } addrbank; extern uae_u8 *filesysory; @@ -83,6 +83,10 @@ extern addrbank rtarea_bank; extern addrbank expamem_bank; extern addrbank fastmem_bank; extern addrbank gfxmem_bank; +extern addrbank gayle_bank; +extern addrbank gayle2_bank; +extern addrbank gayle_attr_bank; +extern addrbank mbres_bank; extern void rtarea_init (void); extern void rtarea_setup (void); @@ -107,14 +111,15 @@ extern uae_u8 *baseaddr[65536]; #define put_mem_bank(addr, b, realstart) do { \ (mem_banks[bankindex(addr)] = (b)); \ if ((b)->baseaddr) \ - baseaddr[bankindex(addr)] = (b)->baseaddr - (realstart); \ + baseaddr[bankindex(addr)] = (b)->baseaddr - (realstart); \ else \ - baseaddr[bankindex(addr)] = (uae_u8*)(((long)b)+1); \ + baseaddr[bankindex(addr)] = (uae_u8*)(((long)b)+1); \ } while (0) extern void memory_init (void); extern void memory_cleanup (void); extern void map_banks (addrbank *bank, int first, int count, int realsize); +extern void map_overlay (int chip); #ifndef NO_INLINE_MEMORY_ACCESS @@ -149,32 +154,92 @@ extern void byteput(uaecptr addr, uae_u3 #endif -STATIC_INLINE uae_u32 get_long(uaecptr addr) +STATIC_INLINE uae_u32 get_long (uaecptr addr) { return longget_1(addr); } -STATIC_INLINE uae_u32 get_word(uaecptr addr) +STATIC_INLINE uae_u32 get_word (uaecptr addr) { return wordget_1(addr); } -STATIC_INLINE uae_u32 get_byte(uaecptr addr) +STATIC_INLINE uae_u32 get_byte (uaecptr addr) { return byteget_1(addr); } -STATIC_INLINE void put_long(uaecptr addr, uae_u32 l) + +/* + * Read a host pointer from addr + */ +#if SIZEOF_VOID_P == 4 +# define get_pointer(addr) ((void *)get_long (addr)) +#else +# if SIZEOF_VOID_P == 8 +STATIC_INLINE void *get_pointer (uaecptr addr) +{ + const unsigned int n = SIZEOF_VOID_P / 4; + union { + void *ptr; + uae_u32 longs[SIZEOF_VOID_P / 4]; + } p; + unsigned int i; + + for (i = 0; i < n; i++) { +#ifdef WORDS_BIGENDIAN + p.longs[i] = get_long (addr + i * 4); +#else + p.longs[n - 1 - i] = get_long (addr + i * 4); +#endif + } + return p.ptr; +} +# else +# error "Unknown or unsupported pointer size." +# endif +#endif + +STATIC_INLINE void put_long (uaecptr addr, uae_u32 l) { longput_1(addr, l); } -STATIC_INLINE void put_word(uaecptr addr, uae_u32 w) +STATIC_INLINE void put_word (uaecptr addr, uae_u32 w) { wordput_1(addr, w); } -STATIC_INLINE void put_byte(uaecptr addr, uae_u32 b) +STATIC_INLINE void put_byte (uaecptr addr, uae_u32 b) { byteput_1(addr, b); } -STATIC_INLINE uae_u8 *get_real_address(uaecptr addr) +/* + * Store host pointer v at addr + */ +#if SIZEOF_VOID_P == 4 +# define put_pointer(addr, p) (put_long ((addr), (uae_u32)(p))) +#else +# if SIZEOF_VOID_P == 8 +STATIC_INLINE void put_pointer (uaecptr addr, void *v) +{ + const unsigned int n = SIZEOF_VOID_P / 4; + union { + void *ptr; + uae_u32 longs[SIZEOF_VOID_P / 4]; + } p; + unsigned int i; + + p.ptr = v; + + for (i = 0; i < n; i++) { +#ifdef WORDS_BIGENDIAN + put_long (addr + i * 4, p.longs[i]); +#else + put_long (addr + i * 4, p.longs[n - 1 - i]); +#endif + } +} +# endif +#endif + +STATIC_INLINE uae_u8 *get_real_address (uaecptr addr) { return get_mem_bank(addr).xlateaddr(addr); } @@ -192,6 +257,9 @@ extern void chipmem_lput (uaecptr, uae_u extern void chipmem_wput (uaecptr, uae_u32) REGPARAM; extern void chipmem_bput (uaecptr, uae_u32) REGPARAM; +extern uae_u32 chipmem_agnus_wget (uaecptr) REGPARAM; +extern void chipmem_agnus_wput (uaecptr, uae_u32) REGPARAM; + #ifdef NATMEM_OFFSET typedef struct shmpiece_reg { @@ -209,26 +277,12 @@ extern int canbang; extern uae_u8 *mapped_malloc (size_t, char *); extern void mapped_free (uae_u8 *); +extern void memory_hardreset (void); -#define ROMTYPE_KICK 1 -#define ROMTYPE_KICKCD32 2 -#define ROMTYPE_EXTCD32 4 -#define ROMTYPE_EXTCDTV 8 -#define ROMTYPE_AR 16 -#define ROMTYPE_KEY 32 -#define ROMTYPE_ARCADIA 64 - -struct romdata { - char *name; - int version, revision; - uae_u32 crc32; - uae_u32 size; - int id; - int cpu; - int cloanto; - int type; -}; - -extern void romlist_add (char *path, struct romdata *rd); -extern char *romlist_get (struct romdata *rd); -extern void romlist_clear (void); +uaecptr strcpyha_safe (uaecptr dst, const char *src); +uaecptr strncpyha_safe (uaecptr dst, const char *src, int size); +extern char *strcpyah_safe (char *dst, uaecptr src); +extern void memcpyha_safe (uaecptr dst, const uae_u8 *src, int size); +extern void memcpyha (uaecptr dst, const uae_u8 *src, int size); +extern void memcpyah_safe (uae_u8 *dst, uaecptr src, int size); +extern void memcpyah (uae_u8 *dst, uaecptr src, int size);