--- uae/src/include/newcpu.h 2018/04/24 16:57:07 1.1.1.10 +++ uae/src/include/newcpu.h 2018/04/24 17:18:52 1.1.1.16 @@ -33,8 +33,8 @@ #define COPY_CARRY (SET_XFLG (GET_CFLG)) #endif -extern int areg_byteinc[]; -extern int imm8_table[]; +extern const int areg_byteinc[]; +extern const int imm8_table[]; extern int movem_index1[256]; extern int movem_index2[256]; @@ -58,10 +58,29 @@ extern unsigned long op_illg (uae_u32) R typedef char flagtype; +/* You can set this to long double to be more accurate. However, the + resulting alignment issues will cost a lot of performance in some + apps */ +#define USE_LONG_DOUBLE 0 + +#if USE_LONG_DOUBLE +typedef long double fptype; +#else +typedef double fptype; +#endif + extern struct regstruct { uae_u32 regs[16]; - uaecptr usp,isp,msp; + + uae_u32 pc; + uae_u8 *pc_p; + uae_u8 *pc_oldp; + + uae_u16 irc, ir; + uae_u32 spcflags; + + uaecptr usp,isp,msp; uae_u16 sr; flagtype t1; flagtype t0; @@ -71,26 +90,41 @@ extern struct regstruct flagtype stopped; int intmask; - uae_u32 pc; - uae_u8 *pc_p; - uae_u8 *pc_oldp; - uae_u32 vbr,sfc,dfc; - double fp[8]; + fptype fp[8]; + fptype fp_result; + uae_u32 fpcr,fpsr,fpiar; + uae_u32 fpsr_highbyte; - uae_u32 spcflags; + uae_u32 caar, cacr; + uae_u32 itt0, itt1, dtt0, dtt1; + uae_u32 tcr, mmusr, urp, srp, buscr; + + uae_u32 mmu_fslw, mmu_fault_addr; + uae_u16 mmu_ssw; + uae_u32 wb3_data; + uae_u16 wb3_status; + + uae_u64 srp_030, crp_030; + uae_u32 tt0_030, tt1_030, tc_030; + uae_u16 mmusr_030; + + uae_u32 pcr; + uae_u32 kick_mask; + uae_u32 address_space_mask; - /* Fellow sources say this is 4 longwords. That's impossible. It needs - * to be at least a longword. The HRM has some cryptic comment about two - * instructions being on the same longword boundary. - * The way this is implemented now seems like a good compromise. - */ - uae_u32 prefetch; + uae_u8 panic; + uae_u32 panic_pc, panic_addr; } regs, lastint_regs; +STATIC_INLINE uae_u32 munge24(uae_u32 x) +{ + return x & regs.address_space_mask; +} + STATIC_INLINE void set_special (uae_u32 x) { regs.spcflags |= x; @@ -104,58 +138,27 @@ STATIC_INLINE void unset_special (uae_u3 #define m68k_dreg(r,num) ((r).regs[(num)]) #define m68k_areg(r,num) (((r).regs + 8)[(num)]) -#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1)) -#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o))) -#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o))) - -STATIC_INLINE uae_u32 get_ibyte_prefetch (uae_s32 o) +STATIC_INLINE void m68k_setpc (uaecptr newpc) { - if (o > 3 || o < 0) - return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1)); - - return do_get_mem_byte((uae_u8 *)(((uae_u8 *)®s.prefetch) + o + 1)); + regs.pc_p = regs.pc_oldp = get_real_address (newpc); + regs.pc = newpc; } -STATIC_INLINE uae_u32 get_iword_prefetch (uae_s32 o) -{ - if (o > 3 || o < 0) - return do_get_mem_word((uae_u16 *)(regs.pc_p + o)); - return do_get_mem_word((uae_u16 *)(((uae_u8 *)®s.prefetch) + o)); -} -STATIC_INLINE uae_u32 get_ilong_prefetch (uae_s32 o) +STATIC_INLINE uaecptr m68k_getpc (void) { - if (o > 3 || o < 0) - return do_get_mem_long((uae_u32 *)(regs.pc_p + o)); - if (o == 0) - return do_get_mem_long(®s.prefetch); - return (do_get_mem_word (((uae_u16 *)®s.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4)); + return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp); } -#define m68k_incpc(o) (regs.pc_p += (o)) - -STATIC_INLINE void fill_prefetch_0 (void) +STATIC_INLINE uaecptr m68k_getpc_p (uae_u8 *p) { - uae_u32 r; -#ifdef UNALIGNED_PROFITABLE - r = *(uae_u32 *)regs.pc_p; - regs.prefetch = r; -#else - r = do_get_mem_long ((uae_u32 *)regs.pc_p); - do_put_mem_long (®s.prefetch, r); -#endif + return regs.pc + ((char *)p - (char *)regs.pc_oldp); } -#if 0 -STATIC_INLINE void fill_prefetch_2 (void) -{ - uae_u32 r = do_get_mem_long (®s.prefetch) << 16; - uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1); - r |= r2; - do_put_mem_long (®s.prefetch, r); -} -#else -#define fill_prefetch_2 fill_prefetch_0 -#endif +#define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1)) +#define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o))) +#define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o))) + +#define m68k_incpc(o) (regs.pc_p += (o)) /* These are only used by the 68020/68881 code, and therefore don't * need to handle prefetch. */ @@ -180,40 +183,32 @@ STATIC_INLINE uae_u32 next_ilong (void) return r; } -#if !defined USE_COMPILER -STATIC_INLINE void m68k_setpc (uaecptr newpc) +STATIC_INLINE void m68k_do_rts(void) { - regs.pc_p = regs.pc_oldp = get_real_address(newpc); - regs.pc = newpc; + m68k_setpc(get_long(m68k_areg (regs, 7))); + m68k_areg (regs, 7) += 4; } -#else -extern void m68k_setpc (uaecptr newpc); -#endif -STATIC_INLINE uaecptr m68k_getpc (void) +STATIC_INLINE void m68k_do_bsr(uaecptr oldpc, uae_s32 offset) { - return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp); + m68k_areg (regs, 7) -= 4; + put_long(m68k_areg (regs, 7), oldpc); + m68k_incpc(offset); } -STATIC_INLINE uaecptr m68k_getpc_p (uae_u8 *p) +STATIC_INLINE void m68k_do_jsr(uaecptr oldpc, uaecptr dest) { - return regs.pc + ((char *)p - (char *)regs.pc_oldp); + m68k_areg (regs, 7) -= 4; + put_long(m68k_areg (regs, 7), oldpc); + m68k_setpc(dest); } -#ifdef USE_COMPILER -extern void m68k_setpc_fast (uaecptr newpc); -extern void m68k_setpc_bcc (uaecptr newpc); -extern void m68k_setpc_rte (uaecptr newpc); -#else -#define m68k_setpc_fast m68k_setpc -#define m68k_setpc_bcc m68k_setpc -#define m68k_setpc_rte m68k_setpc -#endif - STATIC_INLINE void m68k_setstopped (int stop) { regs.stopped = stop; - if (stop) + /* A traced STOP instruction drops through immediately without + actually stopping. */ + if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0) regs.spcflags |= SPCFLAG_STOP; } @@ -237,6 +232,7 @@ extern void m68k_disasm (FILE *, uaecptr extern void m68k_reset (void); extern void mmu_op (uae_u32, uae_u16); +extern void mmu_op30 (uaecptr, uae_u32, int, uaecptr); extern void fpp_opp (uae_u32, uae_u16); extern void fdbcc_opp (uae_u32, uae_u16); @@ -246,27 +242,35 @@ extern void fbcc_opp (uae_u32, uaecptr, extern void fsave_opp (uae_u32); extern void frestore_opp (uae_u32); -/* Opcode of faulting instruction */ -extern uae_u16 last_op_for_exception_3; -/* PC at fault time */ -extern uaecptr last_addr_for_exception_3; -/* Address that generated the exception */ -extern uaecptr last_fault_for_exception_3; +extern void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault); +extern void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault); +extern void exception2 (uaecptr addr, uaecptr fault); +extern void cpureset (void); + +extern void fill_prefetch_slow (void); #define CPU_OP_NAME(a) op ## a +/* 68060 */ +extern const struct cputbl op_smalltbl_0_ff[]; /* 68040 */ -extern struct cputbl op_smalltbl_0_ff[]; -/* 68020 + 68881 */ -extern struct cputbl op_smalltbl_1_ff[]; +extern const struct cputbl op_smalltbl_1_ff[]; +/* 68030 */ +extern const struct cputbl op_smalltbl_2_ff[]; /* 68020 */ -extern struct cputbl op_smalltbl_2_ff[]; +extern const struct cputbl op_smalltbl_3_ff[]; /* 68010 */ -extern struct cputbl op_smalltbl_3_ff[]; -/* 68000 */ -extern struct cputbl op_smalltbl_4_ff[]; +extern const struct cputbl op_smalltbl_4_ff[]; +/* 68000 - unused */ +#if 0 +extern const struct cputbl op_smalltbl_5_ff[]; +#endif /* 68000 slow but compatible. */ -extern struct cputbl op_smalltbl_5_ff[]; +extern const struct cputbl op_smalltbl_6_ff[]; extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl"); +#ifdef JIT +#else +#define flush_icache(X) do {} while (0) +#endif