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1.1 ! root 1: /* @(#)scsireg.h 1.18 98/03/28 Copyright 1987 J. Schilling */ ! 2: /* ! 3: * usefull definitions for dealing with CCS SCSI - devices ! 4: * ! 5: * Copyright (c) 1987 J. Schilling ! 6: */ ! 7: /* ! 8: * This program is free software; you can redistribute it and/or modify ! 9: * it under the terms of the GNU General Public License as published by ! 10: * the Free Software Foundation; either version 2, or (at your option) ! 11: * any later version. ! 12: * ! 13: * This program is distributed in the hope that it will be useful, ! 14: * but WITHOUT ANY WARRANTY; without even the implied warranty of ! 15: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 16: * GNU General Public License for more details. ! 17: * ! 18: * You should have received a copy of the GNU General Public License ! 19: * along with this program; see the file COPYING. If not, write to ! 20: * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. ! 21: */ ! 22: ! 23: #ifndef _SCSIREG_H ! 24: #define _SCSIREG_H ! 25: ! 26: #include "scg/utypes.h" ! 27: #include "scg/btorder.h" ! 28: ! 29: /* ! 30: * SCSI status bits. ! 31: */ ! 32: #define ST_VU_00 0x01 /* Vendor unique */ ! 33: #define ST_CHK_COND 0x02 /* Check condition */ ! 34: #define ST_COND_MET 0x04 /* Condition met */ ! 35: #define ST_BUSY 0x08 /* Busy */ ! 36: #define ST_IS_SEND 0x10 /* Intermediate status send */ ! 37: #define ST_VU_05 0x20 /* Vendor unique */ ! 38: #define ST_VU_06 0x40 /* Vendor unique */ ! 39: #define ST_RSVD_07 0x80 /* Reserved */ ! 40: ! 41: /* ! 42: * Sense key values for extended sense. ! 43: */ ! 44: #define SC_NO_SENSE 0x00 ! 45: #define SC_RECOVERABLE_ERROR 0x01 ! 46: #define SC_NOT_READY 0x02 ! 47: #define SC_MEDIUM_ERROR 0x03 ! 48: #define SC_HARDWARE_ERROR 0x04 ! 49: #define SC_ILLEGAL_REQUEST 0x05 ! 50: #define SC_UNIT_ATTENTION 0x06 ! 51: #define SC_WRITE_PROTECT 0x07 ! 52: #define SC_BLANK_CHECK 0x08 ! 53: #define SC_VENDOR_UNIQUE 0x09 ! 54: #define SC_COPY_ABORTED 0x0A ! 55: #define SC_ABORTED_COMMAND 0x0B ! 56: #define SC_EQUAL 0x0C ! 57: #define SC_VOLUME_OVERFLOW 0x0D ! 58: #define SC_MISCOMPARE 0x0E ! 59: #define SC_RESERVED 0x0F ! 60: ! 61: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 62: ! 63: struct scsi_inquiry { ! 64: Ucbit type : 5; /* 0 */ ! 65: Ucbit qualifier : 3; /* 0 */ ! 66: ! 67: Ucbit type_modifier : 7; /* 1 */ ! 68: Ucbit removable : 1; /* 1 */ ! 69: ! 70: Ucbit ansi_version : 3; /* 2 */ ! 71: Ucbit ecma_version : 3; /* 2 */ ! 72: Ucbit iso_version : 2; /* 2 */ ! 73: ! 74: Ucbit data_format : 4; /* 3 */ ! 75: Ucbit res3_54 : 2; /* 3 */ ! 76: Ucbit termiop : 1; /* 3 */ ! 77: Ucbit aenc : 1; /* 3 */ ! 78: ! 79: Ucbit add_len : 8; /* 4 */ ! 80: Ucbit sense_len : 8; /* 5 */ /* only Emulex ??? */ ! 81: Ucbit res2 : 8; /* 6 */ ! 82: ! 83: Ucbit softreset : 1; /* 7 */ ! 84: Ucbit cmdque : 1; ! 85: Ucbit res7_2 : 1; ! 86: Ucbit linked : 1; ! 87: Ucbit sync : 1; ! 88: Ucbit wbus16 : 1; ! 89: Ucbit wbus32 : 1; ! 90: Ucbit reladr : 1; /* 7 */ ! 91: ! 92: char vendor_info[8]; /* 8 */ ! 93: char prod_ident[16]; /* 16 */ ! 94: char prod_revision[4]; /* 32 */ ! 95: #ifdef comment ! 96: char vendor_uniq[20]; /* 36 */ ! 97: char reserved[40]; /* 56 */ ! 98: #endif ! 99: }; /* 96 */ ! 100: ! 101: #else /* Motorola byteorder */ ! 102: ! 103: struct scsi_inquiry { ! 104: Ucbit qualifier : 3; /* 0 */ ! 105: Ucbit type : 5; /* 0 */ ! 106: ! 107: Ucbit removable : 1; /* 1 */ ! 108: Ucbit type_modifier : 7; /* 1 */ ! 109: ! 110: Ucbit iso_version : 2; /* 2 */ ! 111: Ucbit ecma_version : 3; ! 112: Ucbit ansi_version : 3; /* 2 */ ! 113: ! 114: Ucbit aenc : 1; /* 3 */ ! 115: Ucbit termiop : 1; ! 116: Ucbit res3_54 : 2; ! 117: Ucbit data_format : 4; /* 3 */ ! 118: ! 119: Ucbit add_len : 8; /* 4 */ ! 120: Ucbit sense_len : 8; /* 5 */ /* only Emulex ??? */ ! 121: Ucbit res2 : 8; /* 6 */ ! 122: Ucbit reladr : 1; /* 7 */ ! 123: Ucbit wbus32 : 1; ! 124: Ucbit wbus16 : 1; ! 125: Ucbit sync : 1; ! 126: Ucbit linked : 1; ! 127: Ucbit res7_2 : 1; ! 128: Ucbit cmdque : 1; ! 129: Ucbit softreset : 1; ! 130: char vendor_info[8]; /* 8 */ ! 131: char prod_ident[16]; /* 16 */ ! 132: char prod_revision[4]; /* 32 */ ! 133: #ifdef comment ! 134: char vendor_uniq[20]; /* 36 */ ! 135: char reserved[40]; /* 56 */ ! 136: #endif ! 137: }; /* 96 */ ! 138: #endif ! 139: ! 140: #define info vendor_info ! 141: #define ident prod_ident ! 142: #define revision prod_revision ! 143: ! 144: /* Peripheral Device Qualifier */ ! 145: ! 146: #define INQ_DEV_PRESENT 0x00 /* Physical device present */ ! 147: #define INQ_DEV_NOTPR 0x01 /* Physical device not present */ ! 148: #define INQ_DEV_RES 0x02 /* Reserved */ ! 149: #define INQ_DEV_NOTSUP 0x03 /* Logical unit not supported */ ! 150: ! 151: /* Peripheral Device Type */ ! 152: ! 153: #define INQ_DASD 0x00 /* Direct-access device (disk) */ ! 154: #define INQ_SEQD 0x01 /* Sequential-access device (tape) */ ! 155: #define INQ_PRTD 0x02 /* Printer device */ ! 156: #define INQ_PROCD 0x03 /* Processor device */ ! 157: #define INQ_OPTD 0x04 /* Write once device (optical disk) */ ! 158: #define INQ_WORM 0x04 /* Write once device (optical disk) */ ! 159: #define INQ_ROMD 0x05 /* CD-ROM device */ ! 160: #define INQ_SCAN 0x06 /* Scanner device */ ! 161: #define INQ_OMEM 0x07 /* Optical Memory device */ ! 162: #define INQ_JUKE 0x08 /* Medium Changer device (jukebox) */ ! 163: #define INQ_COMM 0x09 /* Communications device */ ! 164: #define INQ_IT8_1 0x0A /* IT8 */ ! 165: #define INQ_IT8_2 0x0B /* IT8 */ ! 166: #define INQ_STARR 0x0C /* Storage array device */ ! 167: #define INQ_ENCL 0x0D /* Enclosure services device */ ! 168: #define INQ_NODEV 0x1F /* Unknown or no device */ ! 169: #define INQ_NOTPR 0x1F /* Logical unit not present (SCSI-1) */ ! 170: ! 171: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 172: ! 173: struct scsi_mode_header { ! 174: Ucbit sense_data_len : 8; ! 175: u_char medium_type; ! 176: Ucbit res2 : 4; ! 177: Ucbit cache : 1; ! 178: Ucbit res : 2; ! 179: Ucbit write_prot : 1; ! 180: u_char blockdesc_len; ! 181: }; ! 182: ! 183: #else /* Motorola byteorder */ ! 184: ! 185: struct scsi_mode_header { ! 186: Ucbit sense_data_len : 8; ! 187: u_char medium_type; ! 188: Ucbit write_prot : 1; ! 189: Ucbit res : 2; ! 190: Ucbit cache : 1; ! 191: Ucbit res2 : 4; ! 192: u_char blockdesc_len; ! 193: }; ! 194: #endif ! 195: ! 196: struct scsi_modesel_header { ! 197: Ucbit sense_data_len : 8; ! 198: u_char medium_type; ! 199: Ucbit res2 : 8; ! 200: u_char blockdesc_len; ! 201: }; ! 202: ! 203: struct scsi_mode_blockdesc { ! 204: u_char density; ! 205: u_char nlblock[3]; ! 206: Ucbit res : 8; ! 207: u_char lblen[3]; ! 208: }; ! 209: ! 210: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 211: ! 212: struct acb_mode_data { ! 213: u_char listformat; ! 214: u_char ncyl[2]; ! 215: u_char nhead; ! 216: u_char start_red_wcurrent[2]; ! 217: u_char start_precomp[2]; ! 218: u_char landing_zone; ! 219: u_char step_rate; ! 220: Ucbit : 2; ! 221: Ucbit hard_sec : 1; ! 222: Ucbit fixed_media : 1; ! 223: Ucbit : 4; ! 224: u_char sect_per_trk; ! 225: }; ! 226: ! 227: #else /* Motorola byteorder */ ! 228: ! 229: struct acb_mode_data { ! 230: u_char listformat; ! 231: u_char ncyl[2]; ! 232: u_char nhead; ! 233: u_char start_red_wcurrent[2]; ! 234: u_char start_precomp[2]; ! 235: u_char landing_zone; ! 236: u_char step_rate; ! 237: Ucbit : 4; ! 238: Ucbit fixed_media : 1; ! 239: Ucbit hard_sec : 1; ! 240: Ucbit : 2; ! 241: u_char sect_per_trk; ! 242: }; ! 243: #endif ! 244: ! 245: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 246: ! 247: struct scsi_mode_page_header { ! 248: Ucbit p_code : 6; ! 249: Ucbit res : 1; ! 250: Ucbit parsave : 1; ! 251: u_char p_len; ! 252: }; ! 253: ! 254: /* ! 255: * This is a hack that allows mode pages without ! 256: * any further bitfileds to be defined bitorder independent. ! 257: */ ! 258: #define MP_P_CODE \ ! 259: Ucbit p_code : 6; \ ! 260: Ucbit p_res : 1; \ ! 261: Ucbit parsave : 1 ! 262: ! 263: #else /* Motorola byteorder */ ! 264: ! 265: struct scsi_mode_page_header { ! 266: Ucbit parsave : 1; ! 267: Ucbit res : 1; ! 268: Ucbit p_code : 6; ! 269: u_char p_len; ! 270: }; ! 271: ! 272: /* ! 273: * This is a hack that allows mode pages without ! 274: * any further bitfileds to be defined bitorder independent. ! 275: */ ! 276: #define MP_P_CODE \ ! 277: Ucbit parsave : 1; \ ! 278: Ucbit p_res : 1; \ ! 279: Ucbit p_code : 6 ! 280: ! 281: #endif ! 282: ! 283: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 284: ! 285: struct scsi_mode_page_01 { /* Error recovery Parameters */ ! 286: MP_P_CODE; /* parsave & pagecode */ ! 287: u_char p_len; /* 0x0A = 12 Bytes */ ! 288: Ucbit disa_correction : 1; /* Byte 2 */ ! 289: Ucbit term_on_rec_err : 1; ! 290: Ucbit report_rec_err : 1; ! 291: Ucbit en_early_corr : 1; ! 292: Ucbit read_continuous : 1; ! 293: Ucbit tranfer_block : 1; ! 294: Ucbit en_auto_reall_r : 1; ! 295: Ucbit en_auto_reall_w : 1; /* Byte 2 */ ! 296: u_char rd_retry_count; /* Byte 3 */ ! 297: u_char correction_span; ! 298: char head_offset_count; ! 299: char data_strobe_offset; ! 300: u_char res; ! 301: u_char wr_retry_count; ! 302: u_char res_tape[2]; ! 303: u_char recov_timelim[2]; ! 304: }; ! 305: ! 306: #else /* Motorola byteorder */ ! 307: ! 308: struct scsi_mode_page_01 { /* Error recovery Parameters */ ! 309: MP_P_CODE; /* parsave & pagecode */ ! 310: u_char p_len; /* 0x0A = 12 Bytes */ ! 311: Ucbit en_auto_reall_w : 1; /* Byte 2 */ ! 312: Ucbit en_auto_reall_r : 1; ! 313: Ucbit tranfer_block : 1; ! 314: Ucbit read_continuous : 1; ! 315: Ucbit en_early_corr : 1; ! 316: Ucbit report_rec_err : 1; ! 317: Ucbit term_on_rec_err : 1; ! 318: Ucbit disa_correction : 1; /* Byte 2 */ ! 319: u_char rd_retry_count; /* Byte 3 */ ! 320: u_char correction_span; ! 321: char head_offset_count; ! 322: char data_strobe_offset; ! 323: u_char res; ! 324: u_char wr_retry_count; ! 325: u_char res_tape[2]; ! 326: u_char recov_timelim[2]; ! 327: }; ! 328: #endif ! 329: ! 330: ! 331: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 332: ! 333: struct scsi_mode_page_02 { /* Device dis/re connect Parameters */ ! 334: MP_P_CODE; /* parsave & pagecode */ ! 335: u_char p_len; /* 0x0E = 16 Bytes */ ! 336: u_char buf_full_ratio; ! 337: u_char buf_empt_ratio; ! 338: u_char bus_inact_limit[2]; ! 339: u_char disc_time_limit[2]; ! 340: u_char conn_time_limit[2]; ! 341: u_char max_burst_size[2]; /* Start SCSI-2 */ ! 342: Ucbit data_tr_dis_ctl : 2; ! 343: Ucbit : 6; ! 344: u_char res[3]; ! 345: }; ! 346: ! 347: #else /* Motorola byteorder */ ! 348: ! 349: struct scsi_mode_page_02 { /* Device dis/re connect Parameters */ ! 350: MP_P_CODE; /* parsave & pagecode */ ! 351: u_char p_len; /* 0x0E = 16 Bytes */ ! 352: u_char buf_full_ratio; ! 353: u_char buf_empt_ratio; ! 354: u_char bus_inact_limit[2]; ! 355: u_char disc_time_limit[2]; ! 356: u_char conn_time_limit[2]; ! 357: u_char max_burst_size[2]; /* Start SCSI-2 */ ! 358: Ucbit : 6; ! 359: Ucbit data_tr_dis_ctl : 2; ! 360: u_char res[3]; ! 361: }; ! 362: #endif ! 363: ! 364: #define DTDC_DATADONE 0x01 /* ! 365: * Target may not disconnect once ! 366: * data transfer is started until ! 367: * all data successfully transferred. ! 368: */ ! 369: ! 370: #define DTDC_CMDDONE 0x03 /* ! 371: * Target may not disconnect once ! 372: * data transfer is started until ! 373: * command completed. ! 374: */ ! 375: ! 376: ! 377: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 378: ! 379: struct scsi_mode_page_03 { /* Direct access format Paramters */ ! 380: MP_P_CODE; /* parsave & pagecode */ ! 381: u_char p_len; /* 0x16 = 24 Bytes */ ! 382: u_char trk_per_zone[2]; ! 383: u_char alt_sec_per_zone[2]; ! 384: u_char alt_trk_per_zone[2]; ! 385: u_char alt_trk_per_vol[2]; ! 386: u_char sect_per_trk[2]; ! 387: u_char bytes_per_phys_sect[2]; ! 388: u_char interleave[2]; ! 389: u_char trk_skew[2]; ! 390: u_char cyl_skew[2]; ! 391: Ucbit : 3; ! 392: Ucbit inhibit_save : 1; ! 393: Ucbit fmt_by_surface : 1; ! 394: Ucbit removable : 1; ! 395: Ucbit hard_sec : 1; ! 396: Ucbit soft_sec : 1; ! 397: u_char res[3]; ! 398: }; ! 399: ! 400: #else /* Motorola byteorder */ ! 401: ! 402: struct scsi_mode_page_03 { /* Direct access format Paramters */ ! 403: MP_P_CODE; /* parsave & pagecode */ ! 404: u_char p_len; /* 0x16 = 24 Bytes */ ! 405: u_char trk_per_zone[2]; ! 406: u_char alt_sec_per_zone[2]; ! 407: u_char alt_trk_per_zone[2]; ! 408: u_char alt_trk_per_vol[2]; ! 409: u_char sect_per_trk[2]; ! 410: u_char bytes_per_phys_sect[2]; ! 411: u_char interleave[2]; ! 412: u_char trk_skew[2]; ! 413: u_char cyl_skew[2]; ! 414: Ucbit soft_sec : 1; ! 415: Ucbit hard_sec : 1; ! 416: Ucbit removable : 1; ! 417: Ucbit fmt_by_surface : 1; ! 418: Ucbit inhibit_save : 1; ! 419: Ucbit : 3; ! 420: u_char res[3]; ! 421: }; ! 422: #endif ! 423: ! 424: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 425: ! 426: struct scsi_mode_page_04 { /* Rigid disk Geometry Parameters */ ! 427: MP_P_CODE; /* parsave & pagecode */ ! 428: u_char p_len; /* 0x16 = 24 Bytes */ ! 429: u_char ncyl[3]; ! 430: u_char nhead; ! 431: u_char start_precomp[3]; ! 432: u_char start_red_wcurrent[3]; ! 433: u_char step_rate[2]; ! 434: u_char landing_zone[3]; ! 435: Ucbit rot_pos_locking : 2; /* Start SCSI-2 */ ! 436: Ucbit : 6; /* Start SCSI-2 */ ! 437: u_char rotational_off; ! 438: u_char res1; ! 439: u_char rotation_rate[2]; ! 440: u_char res2[2]; ! 441: }; ! 442: ! 443: #else /* Motorola byteorder */ ! 444: ! 445: struct scsi_mode_page_04 { /* Rigid disk Geometry Parameters */ ! 446: MP_P_CODE; /* parsave & pagecode */ ! 447: u_char p_len; /* 0x16 = 24 Bytes */ ! 448: u_char ncyl[3]; ! 449: u_char nhead; ! 450: u_char start_precomp[3]; ! 451: u_char start_red_wcurrent[3]; ! 452: u_char step_rate[2]; ! 453: u_char landing_zone[3]; ! 454: Ucbit : 6; /* Start SCSI-2 */ ! 455: Ucbit rot_pos_locking : 2; /* Start SCSI-2 */ ! 456: u_char rotational_off; ! 457: u_char res1; ! 458: u_char rotation_rate[2]; ! 459: u_char res2[2]; ! 460: }; ! 461: #endif ! 462: ! 463: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 464: ! 465: struct scsi_mode_page_05 { /* Flexible disk Parameters */ ! 466: MP_P_CODE; /* parsave & pagecode */ ! 467: u_char p_len; /* 0x1E = 32 Bytes */ ! 468: u_char transfer_rate[2]; ! 469: u_char nhead; ! 470: u_char sect_per_trk; ! 471: u_char bytes_per_phys_sect[2]; ! 472: u_char ncyl[2]; ! 473: u_char start_precomp[2]; ! 474: u_char start_red_wcurrent[2]; ! 475: u_char step_rate[2]; ! 476: u_char step_pulse_width; ! 477: u_char head_settle_delay[2]; ! 478: u_char motor_on_delay; ! 479: u_char motor_off_delay; ! 480: Ucbit spc : 4; ! 481: Ucbit : 4; ! 482: Ucbit : 5; ! 483: Ucbit mo : 1; ! 484: Ucbit ssn : 1; ! 485: Ucbit trdy : 1; ! 486: u_char write_compensation; ! 487: u_char head_load_delay; ! 488: u_char head_unload_delay; ! 489: Ucbit pin_2_use : 4; ! 490: Ucbit pin_34_use : 4; ! 491: Ucbit pin_1_use : 4; ! 492: Ucbit pin_4_use : 4; ! 493: u_char rotation_rate[2]; ! 494: u_char res[2]; ! 495: }; ! 496: ! 497: #else /* Motorola byteorder */ ! 498: ! 499: struct scsi_mode_page_05 { /* Flexible disk Parameters */ ! 500: MP_P_CODE; /* parsave & pagecode */ ! 501: u_char p_len; /* 0x1E = 32 Bytes */ ! 502: u_char transfer_rate[2]; ! 503: u_char nhead; ! 504: u_char sect_per_trk; ! 505: u_char bytes_per_phys_sect[2]; ! 506: u_char ncyl[2]; ! 507: u_char start_precomp[2]; ! 508: u_char start_red_wcurrent[2]; ! 509: u_char step_rate[2]; ! 510: u_char step_pulse_width; ! 511: u_char head_settle_delay[2]; ! 512: u_char motor_on_delay; ! 513: u_char motor_off_delay; ! 514: Ucbit trdy : 1; ! 515: Ucbit ssn : 1; ! 516: Ucbit mo : 1; ! 517: Ucbit : 5; ! 518: Ucbit : 4; ! 519: Ucbit spc : 4; ! 520: u_char write_compensation; ! 521: u_char head_load_delay; ! 522: u_char head_unload_delay; ! 523: Ucbit pin_34_use : 4; ! 524: Ucbit pin_2_use : 4; ! 525: Ucbit pin_4_use : 4; ! 526: Ucbit pin_1_use : 4; ! 527: u_char rotation_rate[2]; ! 528: u_char res[2]; ! 529: }; ! 530: #endif ! 531: ! 532: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 533: ! 534: struct scsi_mode_page_07 { /* Verify Error recovery */ ! 535: MP_P_CODE; /* parsave & pagecode */ ! 536: u_char p_len; /* 0x0A = 12 Bytes */ ! 537: Ucbit disa_correction : 1; /* Byte 2 */ ! 538: Ucbit term_on_rec_err : 1; ! 539: Ucbit report_rec_err : 1; ! 540: Ucbit en_early_corr : 1; ! 541: Ucbit res : 4; /* Byte 2 */ ! 542: u_char ve_retry_count; /* Byte 3 */ ! 543: u_char ve_correction_span; ! 544: char res2[5]; /* Byte 5 */ ! 545: u_char ve_recov_timelim[2]; /* Byte 10 */ ! 546: }; ! 547: ! 548: #else /* Motorola byteorder */ ! 549: ! 550: struct scsi_mode_page_07 { /* Verify Error recovery */ ! 551: MP_P_CODE; /* parsave & pagecode */ ! 552: u_char p_len; /* 0x0A = 12 Bytes */ ! 553: Ucbit res : 4; /* Byte 2 */ ! 554: Ucbit en_early_corr : 1; ! 555: Ucbit report_rec_err : 1; ! 556: Ucbit term_on_rec_err : 1; ! 557: Ucbit disa_correction : 1; /* Byte 2 */ ! 558: u_char ve_retry_count; /* Byte 3 */ ! 559: u_char ve_correction_span; ! 560: char res2[5]; /* Byte 5 */ ! 561: u_char ve_recov_timelim[2]; /* Byte 10 */ ! 562: }; ! 563: #endif ! 564: ! 565: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 566: ! 567: struct scsi_mode_page_08 { /* Caching Parameters */ ! 568: MP_P_CODE; /* parsave & pagecode */ ! 569: u_char p_len; /* 0x0A = 12 Bytes */ ! 570: Ucbit disa_rd_cache : 1; /* Byte 2 */ ! 571: Ucbit muliple_fact : 1; ! 572: Ucbit en_wt_cache : 1; ! 573: Ucbit res : 5; /* Byte 2 */ ! 574: Ucbit wt_ret_pri : 4; /* Byte 3 */ ! 575: Ucbit demand_rd_ret_pri: 4; /* Byte 3 */ ! 576: u_char disa_pref_tr_len[2]; /* Byte 4 */ ! 577: u_char min_pref[2]; /* Byte 6 */ ! 578: u_char max_pref[2]; /* Byte 8 */ ! 579: u_char max_pref_ceiling[2]; /* Byte 10 */ ! 580: }; ! 581: ! 582: #else /* Motorola byteorder */ ! 583: ! 584: struct scsi_mode_page_08 { /* Caching Parameters */ ! 585: MP_P_CODE; /* parsave & pagecode */ ! 586: u_char p_len; /* 0x0A = 12 Bytes */ ! 587: Ucbit res : 5; /* Byte 2 */ ! 588: Ucbit en_wt_cache : 1; ! 589: Ucbit muliple_fact : 1; ! 590: Ucbit disa_rd_cache : 1; /* Byte 2 */ ! 591: Ucbit demand_rd_ret_pri: 4; /* Byte 3 */ ! 592: Ucbit wt_ret_pri : 4; ! 593: u_char disa_pref_tr_len[2]; /* Byte 4 */ ! 594: u_char min_pref[2]; /* Byte 6 */ ! 595: u_char max_pref[2]; /* Byte 8 */ ! 596: u_char max_pref_ceiling[2]; /* Byte 10 */ ! 597: }; ! 598: #endif ! 599: ! 600: struct scsi_mode_page_09 { /* Peripheral device Parameters */ ! 601: MP_P_CODE; /* parsave & pagecode */ ! 602: u_char p_len; /* >= 0x06 = 8 Bytes */ ! 603: u_char interface_id[2]; /* Byte 2 */ ! 604: u_char res[4]; /* Byte 4 */ ! 605: u_char vendor_specific[1]; /* Byte 8 */ ! 606: }; ! 607: ! 608: #define PDEV_SCSI 0x0000 /* scsi interface */ ! 609: #define PDEV_SMD 0x0001 /* SMD interface */ ! 610: #define PDEV_ESDI 0x0002 /* ESDI interface */ ! 611: #define PDEV_IPI2 0x0003 /* IPI-2 interface */ ! 612: #define PDEV_IPI3 0x0004 /* IPI-3 interface */ ! 613: ! 614: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 615: ! 616: struct scsi_mode_page_0A { /* Common device Control Parameters */ ! 617: MP_P_CODE; /* parsave & pagecode */ ! 618: u_char p_len; /* 0x06 = 8 Bytes */ ! 619: Ucbit rep_log_exeption: 1; /* Byte 2 */ ! 620: Ucbit res : 7; /* Byte 2 */ ! 621: Ucbit dis_queuing : 1; /* Byte 3 */ ! 622: Ucbit queuing_err_man : 1; ! 623: Ucbit res2 : 2; ! 624: Ucbit queue_alg_mod : 4; /* Byte 3 */ ! 625: Ucbit EAENP : 1; /* Byte 4 */ ! 626: Ucbit UAENP : 1; ! 627: Ucbit RAENP : 1; ! 628: Ucbit res3 : 4; ! 629: Ucbit en_ext_cont_all : 1; /* Byte 4 */ ! 630: Ucbit res4 : 8; ! 631: u_char ready_aen_hold_per[2]; /* Byte 6 */ ! 632: }; ! 633: ! 634: #else /* Motorola byteorder */ ! 635: ! 636: struct scsi_mode_page_0A { /* Common device Control Parameters */ ! 637: MP_P_CODE; /* parsave & pagecode */ ! 638: u_char p_len; /* 0x06 = 8 Bytes */ ! 639: Ucbit res : 7; /* Byte 2 */ ! 640: Ucbit rep_log_exeption: 1; /* Byte 2 */ ! 641: Ucbit queue_alg_mod : 4; /* Byte 3 */ ! 642: Ucbit res2 : 2; ! 643: Ucbit queuing_err_man : 1; ! 644: Ucbit dis_queuing : 1; /* Byte 3 */ ! 645: Ucbit en_ext_cont_all : 1; /* Byte 4 */ ! 646: Ucbit res3 : 4; ! 647: Ucbit RAENP : 1; ! 648: Ucbit UAENP : 1; ! 649: Ucbit EAENP : 1; /* Byte 4 */ ! 650: Ucbit res4 : 8; ! 651: u_char ready_aen_hold_per[2]; /* Byte 6 */ ! 652: }; ! 653: #endif ! 654: ! 655: #define CTRL_QMOD_RESTRICT 0x0 ! 656: #define CTRL_QMOD_UNRESTRICT 0x1 ! 657: ! 658: ! 659: struct scsi_mode_page_0B { /* Medium Types Supported Parameters */ ! 660: MP_P_CODE; /* parsave & pagecode */ ! 661: u_char p_len; /* 0x06 = 8 Bytes */ ! 662: u_char res[2]; /* Byte 2 */ ! 663: u_char medium_one_supp; /* Byte 4 */ ! 664: u_char medium_two_supp; /* Byte 5 */ ! 665: u_char medium_three_supp; /* Byte 6 */ ! 666: u_char medium_four_supp; /* Byte 7 */ ! 667: }; ! 668: ! 669: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 670: ! 671: struct scsi_mode_page_0C { /* Notch & Partition Parameters */ ! 672: MP_P_CODE; /* parsave & pagecode */ ! 673: u_char p_len; /* 0x16 = 24 Bytes */ ! 674: Ucbit res : 6; /* Byte 2 */ ! 675: Ucbit logical_notch : 1; ! 676: Ucbit notched_drive : 1; /* Byte 2 */ ! 677: u_char res2; /* Byte 3 */ ! 678: u_char max_notches[2]; /* Byte 4 */ ! 679: u_char active_notch[2]; /* Byte 6 */ ! 680: u_char starting_boundary[4]; /* Byte 8 */ ! 681: u_char ending_boundary[4]; /* Byte 12 */ ! 682: u_char pages_notched[8]; /* Byte 16 */ ! 683: }; ! 684: ! 685: #else /* Motorola byteorder */ ! 686: ! 687: struct scsi_mode_page_0C { /* Notch & Partition Parameters */ ! 688: MP_P_CODE; /* parsave & pagecode */ ! 689: u_char p_len; /* 0x16 = 24 Bytes */ ! 690: Ucbit notched_drive : 1; /* Byte 2 */ ! 691: Ucbit logical_notch : 1; ! 692: Ucbit res : 6; /* Byte 2 */ ! 693: u_char res2; /* Byte 3 */ ! 694: u_char max_notches[2]; /* Byte 4 */ ! 695: u_char active_notch[2]; /* Byte 6 */ ! 696: u_char starting_boundary[4]; /* Byte 8 */ ! 697: u_char ending_boundary[4]; /* Byte 12 */ ! 698: u_char pages_notched[8]; /* Byte 16 */ ! 699: }; ! 700: #endif ! 701: ! 702: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 703: ! 704: struct scsi_mode_page_0D { /* CD-ROM Parameters */ ! 705: MP_P_CODE; /* parsave & pagecode */ ! 706: u_char p_len; /* 0x06 = 8 Bytes */ ! 707: u_char res; /* Byte 2 */ ! 708: Ucbit inact_timer_mult: 4; /* Byte 3 */ ! 709: Ucbit res2 : 4; /* Byte 3 */ ! 710: u_char s_un_per_m_un[2]; /* Byte 4 */ ! 711: u_char f_un_per_s_un[2]; /* Byte 6 */ ! 712: }; ! 713: ! 714: #else /* Motorola byteorder */ ! 715: ! 716: struct scsi_mode_page_0D { /* CD-ROM Parameters */ ! 717: MP_P_CODE; /* parsave & pagecode */ ! 718: u_char p_len; /* 0x06 = 8 Bytes */ ! 719: u_char res; /* Byte 2 */ ! 720: Ucbit res2 : 4; /* Byte 3 */ ! 721: Ucbit inact_timer_mult: 4; /* Byte 3 */ ! 722: u_char s_un_per_m_un[2]; /* Byte 4 */ ! 723: u_char f_un_per_s_un[2]; /* Byte 6 */ ! 724: }; ! 725: #endif ! 726: ! 727: struct sony_mode_page_20 { /* Sony Format Mode Parameters */ ! 728: MP_P_CODE; /* parsave & pagecode */ ! 729: u_char p_len; /* 0x0A = 12 Bytes */ ! 730: u_char format_mode; ! 731: u_char format_type; ! 732: #define num_bands user_band_size /* Gilt bei Type 1 */ ! 733: u_char user_band_size[4]; /* Gilt bei Type 0 */ ! 734: u_char spare_band_size[2]; ! 735: u_char res[2]; ! 736: }; ! 737: ! 738: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 739: ! 740: struct toshiba_mode_page_20 { /* Toshiba Speed Control Parameters */ ! 741: MP_P_CODE; /* parsave & pagecode */ ! 742: u_char p_len; /* 0x01 = 3 Bytes */ ! 743: Ucbit speed : 1; ! 744: Ucbit res : 7; ! 745: }; ! 746: ! 747: #else /* Motorola byteorder */ ! 748: ! 749: struct toshiba_mode_page_20 { /* Toshiba Speed Control Parameters */ ! 750: MP_P_CODE; /* parsave & pagecode */ ! 751: u_char p_len; /* 0x01 = 3 Bytes */ ! 752: Ucbit res : 7; ! 753: Ucbit speed : 1; ! 754: }; ! 755: #endif ! 756: ! 757: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 758: ! 759: struct ccs_mode_page_38 { /* CCS Caching Parameters */ ! 760: MP_P_CODE; /* parsave & pagecode */ ! 761: u_char p_len; /* 0x0E = 14 Bytes */ ! 762: ! 763: Ucbit cache_table_size: 4; /* Byte 3 */ ! 764: Ucbit cache_en : 1; ! 765: Ucbit res2 : 1; ! 766: Ucbit wr_index_en : 1; ! 767: Ucbit res : 1; /* Byte 3 */ ! 768: u_char threshold; /* Byte 4 Prefetch threshold */ ! 769: u_char max_prefetch; /* Byte 5 Max. prefetch */ ! 770: u_char max_multiplier; /* Byte 6 Max. prefetch multiplier */ ! 771: u_char min_prefetch; /* Byte 7 Min. prefetch */ ! 772: u_char min_multiplier; /* Byte 8 Min. prefetch multiplier */ ! 773: u_char res3[8]; /* Byte 9 */ ! 774: }; ! 775: ! 776: #else /* Motorola byteorder */ ! 777: ! 778: struct ccs_mode_page_38 { /* CCS Caching Parameters */ ! 779: MP_P_CODE; /* parsave & pagecode */ ! 780: u_char p_len; /* 0x0E = 14 Bytes */ ! 781: ! 782: Ucbit res : 1; /* Byte 3 */ ! 783: Ucbit wr_index_en : 1; ! 784: Ucbit res2 : 1; ! 785: Ucbit cache_en : 1; ! 786: Ucbit cache_table_size: 4; /* Byte 3 */ ! 787: u_char threshold; /* Byte 4 Prefetch threshold */ ! 788: u_char max_prefetch; /* Byte 5 Max. prefetch */ ! 789: u_char max_multiplier; /* Byte 6 Max. prefetch multiplier */ ! 790: u_char min_prefetch; /* Byte 7 Min. prefetch */ ! 791: u_char min_multiplier; /* Byte 8 Min. prefetch multiplier */ ! 792: u_char res3[8]; /* Byte 9 */ ! 793: }; ! 794: #endif ! 795: ! 796: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 797: ! 798: struct cd_mode_page_05 { /* write parameters */ ! 799: MP_P_CODE; /* parsave & pagecode */ ! 800: u_char p_len; /* 0x32 = 50 Bytes */ ! 801: Ucbit write_type : 4; /* Session write type (PACKET/TAO...)*/ ! 802: Ucbit test_write : 1; /* Do not actually write data */ ! 803: Ucbit res_2 : 3; ! 804: Ucbit track_mode : 4; /* Track mode (Q-sub control nibble) */ ! 805: Ucbit copy : 1; /* 1st higher gen of copy prot track ~*/ ! 806: Ucbit fp : 1; /* Fixed packed (if in packet mode) */ ! 807: Ucbit multi_session : 2; /* Multi session write type */ ! 808: Ucbit dbtype : 4; /* Data block type */ ! 809: Ucbit res_4 : 4; /* Reserved */ ! 810: u_char res_56[2]; /* Reserved */ ! 811: Ucbit host_appl_code : 6; /* Host application code of disk */ ! 812: Ucbit res_7 : 2; /* Reserved */ ! 813: u_char session_format; /* Session format (DA/CDI/XA) */ ! 814: u_char res_9; /* Reserved */ ! 815: u_char packet_size[4]; /* # of user datablocks/fixed packet */ ! 816: u_char audio_pause_len[2]; /* # of blocks where index is zero */ ! 817: u_char media_cat_number[16]; /* Media catalog Number (MCN) */ ! 818: u_char ISRC[14]; /* ISRC for this track */ ! 819: u_char sub_header[4]; ! 820: u_char vendor_uniq[4]; ! 821: }; ! 822: ! 823: #else /* Motorola byteorder */ ! 824: ! 825: struct cd_mode_page_05 { /* write parameters */ ! 826: MP_P_CODE; /* parsave & pagecode */ ! 827: u_char p_len; /* 0x32 = 50 Bytes */ ! 828: Ucbit res_2 : 3; ! 829: Ucbit test_write : 1; /* Do not actually write data */ ! 830: Ucbit write_type : 4; /* Session write type (PACKET/TAO...)*/ ! 831: Ucbit multi_session : 2; /* Multi session write type */ ! 832: Ucbit fp : 1; /* Fixed packed (if in packet mode) */ ! 833: Ucbit copy : 1; /* 1st higher gen of copy prot track */ ! 834: Ucbit track_mode : 4; /* Track mode (Q-sub control nibble) */ ! 835: Ucbit res_4 : 4; /* Reserved */ ! 836: Ucbit dbtype : 4; /* Data block type */ ! 837: u_char res_56[2]; /* Reserved */ ! 838: Ucbit res_7 : 2; /* Reserved */ ! 839: Ucbit host_appl_code : 6; /* Host application code of disk */ ! 840: u_char session_format; /* Session format (DA/CDI/XA) */ ! 841: u_char res_9; /* Reserved */ ! 842: u_char packet_size[4]; /* # of user datablocks/fixed packet */ ! 843: u_char audio_pause_len[2]; /* # of blocks where index is zero */ ! 844: u_char media_cat_number[16]; /* Media catalog Number (MCN) */ ! 845: u_char ISRC[14]; /* ISRC for this track */ ! 846: u_char sub_header[4]; ! 847: u_char vendor_uniq[4]; ! 848: }; ! 849: ! 850: #endif ! 851: ! 852: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 853: ! 854: struct cd_mode_page_2A { /* CD Cap / mech status */ ! 855: MP_P_CODE; /* parsave & pagecode */ ! 856: u_char p_len; /* 0x14 = 20 Bytes */ ! 857: Ucbit cd_r_read : 1; /* Reads CD-R media */ ! 858: Ucbit cd_rw_read : 1; /* Reads CD-RW media */ ! 859: Ucbit method2 : 1; /* Reads fixed packet method2 media */ ! 860: Ucbit dvd_rom_read : 1; /* Reads DVD ROM media */ ! 861: Ucbit dvd_r_read : 1; /* Reads DVD-R media */ ! 862: Ucbit dvd_ram_read : 1; /* Reads DVD-RAM media */ ! 863: Ucbit res_2_67 : 2; /* Reserved */ ! 864: Ucbit cd_r_write : 1; /* Supports writing CD-R media */ ! 865: Ucbit cd_rw_write : 1; /* Supports writing CD-RW media */ ! 866: Ucbit test_write : 1; /* Supports emulation write */ ! 867: Ucbit res_3_3 : 1; /* Reserved */ ! 868: Ucbit dvd_r_write : 1; /* Supports writing DVD-R media */ ! 869: Ucbit dvd_ram_write : 1; /* Supports writing DVD-RAM media */ ! 870: Ucbit res_3_67 : 2; /* Reserved */ ! 871: Ucbit audio_play : 1; /* Supports Audio play operation */ ! 872: Ucbit composite : 1; /* Deliveres composite A/V stream */ ! 873: Ucbit digital_port_2 : 1; /* Supports digital output on port 2 */ ! 874: Ucbit digital_port_1 : 1; /* Supports digital output on port 1 */ ! 875: Ucbit mode_2_form_1 : 1; /* Reads Mode-2 form 1 media (XA) */ ! 876: Ucbit mode_2_form_2 : 1; /* Reads Mode-2 form 2 media */ ! 877: Ucbit multi_session : 1; /* Reads multi-session media */ ! 878: Ucbit res_4 : 1; /* Reserved */ ! 879: Ucbit cd_da_supported : 1; /* Reads audio data with READ CD cmd */ ! 880: Ucbit cd_da_accurate : 1; /* READ CD data stream is accurate */ ! 881: Ucbit rw_supported : 1; /* Reads R-W sub channel information */ ! 882: Ucbit rw_deint_corr : 1; /* Reads de-interleved R-W sub chan */ ! 883: Ucbit c2_pointers : 1; /* Supports C2 error pointers */ ! 884: Ucbit ISRC : 1; /* Reads ISRC information */ ! 885: Ucbit UPC : 1; /* Reads media catalog number (UPC) */ ! 886: Ucbit read_bar_code : 1; /* Supports reading bar codes */ ! 887: Ucbit lock : 1; /* PREVENT/ALLOW may lock media */ ! 888: Ucbit lock_state : 1; /* Lock state 0=unlocked 1=locked */ ! 889: Ucbit prevent_jumper : 1; /* State of prev/allow jumper 0=pres */ ! 890: Ucbit eject : 1; /* Ejects disc/cartr with STOP LoEj */ ! 891: Ucbit res_6_4 : 1; /* Reserved */ ! 892: Ucbit loading_type : 3; /* Loading mechanism type */ ! 893: Ucbit sep_chan_vol : 1; /* Vol controls each channel separat */ ! 894: Ucbit sep_chan_mute : 1; /* Mute controls each channel separat*/ ! 895: Ucbit disk_present_rep: 1; /* Changer supports disk present rep */ ! 896: Ucbit sw_slot_sel : 1; /* Load empty slot in changer */ ! 897: Ucbit res_7 : 4; /* Reserved */ ! 898: u_char max_read_speed[2]; /* Max. read speed in KB/s */ ! 899: u_char num_vol_levels[2]; /* # of supported volume levels */ ! 900: u_char buffer_size[2]; /* Buffer size for the data in KB */ ! 901: u_char cur_read_speed[2]; /* Current read speed in KB/s */ ! 902: u_char res_16; /* Reserved */ ! 903: Ucbit res_17_0 : 1; /* Reserved */ ! 904: Ucbit BCK : 1; /* Data valid on falling edge of BCK */ ! 905: Ucbit RCK : 1; /* Set: HIGH high LRCK=left channel */ ! 906: Ucbit LSBF : 1; /* Set: LSB first Clear: MSB first */ ! 907: Ucbit length : 2; /* 0=32BCKs 1=16BCKs 2=24BCKs 3=24I2c*/ ! 908: Ucbit res_17 : 2; /* Reserved */ ! 909: u_char max_write_speed[2]; /* Max. write speed supported in KB/s*/ ! 910: u_char cur_write_speed[2]; /* Current write speed in KB/s */ ! 911: }; ! 912: ! 913: #else /* Motorola byteorder */ ! 914: ! 915: struct cd_mode_page_2A { /* CD Cap / mech status */ ! 916: MP_P_CODE; /* parsave & pagecode */ ! 917: u_char p_len; /* 0x14 = 20 Bytes */ ! 918: Ucbit res_2_67 : 2; /* Reserved */ ! 919: Ucbit dvd_ram_read : 1; /* Reads DVD-RAM media */ ! 920: Ucbit dvd_r_read : 1; /* Reads DVD-R media */ ! 921: Ucbit dvd_rom_read : 1; /* Reads DVD ROM media */ ! 922: Ucbit method2 : 1; /* Reads fixed packet method2 media */ ! 923: Ucbit cd_rw_read : 1; /* Reads CD-RW media */ ! 924: Ucbit cd_r_read : 1; /* Reads CD-R media */ ! 925: Ucbit res_3_67 : 2; /* Reserved */ ! 926: Ucbit dvd_ram_write : 1; /* Supports writing DVD-RAM media */ ! 927: Ucbit dvd_r_write : 1; /* Supports writing DVD-R media */ ! 928: Ucbit res_3_3 : 1; /* Reserved */ ! 929: Ucbit test_write : 1; /* Supports emulation write */ ! 930: Ucbit cd_rw_write : 1; /* Supports writing CD-RW media */ ! 931: Ucbit cd_r_write : 1; /* Supports writing CD-R media */ ! 932: Ucbit res_4 : 1; /* Reserved */ ! 933: Ucbit multi_session : 1; /* Reads multi-session media */ ! 934: Ucbit mode_2_form_2 : 1; /* Reads Mode-2 form 2 media */ ! 935: Ucbit mode_2_form_1 : 1; /* Reads Mode-2 form 1 media (XA) */ ! 936: Ucbit digital_port_1 : 1; /* Supports digital output on port 1 */ ! 937: Ucbit digital_port_2 : 1; /* Supports digital output on port 2 */ ! 938: Ucbit composite : 1; /* Deliveres composite A/V stream */ ! 939: Ucbit audio_play : 1; /* Supports Audio play operation */ ! 940: Ucbit read_bar_code : 1; /* Supports reading bar codes */ ! 941: Ucbit UPC : 1; /* Reads media catalog number (UPC) */ ! 942: Ucbit ISRC : 1; /* Reads ISRC information */ ! 943: Ucbit c2_pointers : 1; /* Supports C2 error pointers */ ! 944: Ucbit rw_deint_corr : 1; /* Reads de-interleved R-W sub chan */ ! 945: Ucbit rw_supported : 1; /* Reads R-W sub channel information */ ! 946: Ucbit cd_da_accurate : 1; /* READ CD data stream is accurate */ ! 947: Ucbit cd_da_supported : 1; /* Reads audio data with READ CD cmd */ ! 948: Ucbit loading_type : 3; /* Loading mechanism type */ ! 949: Ucbit res_6_4 : 1; /* Reserved */ ! 950: Ucbit eject : 1; /* Ejects disc/cartr with STOP LoEj */ ! 951: Ucbit prevent_jumper : 1; /* State of prev/allow jumper 0=pres */ ! 952: Ucbit lock_state : 1; /* Lock state 0=unlocked 1=locked */ ! 953: Ucbit lock : 1; /* PREVENT/ALLOW may lock media */ ! 954: Ucbit res_7 : 4; /* Reserved */ ! 955: Ucbit sw_slot_sel : 1; /* Load empty slot in changer */ ! 956: Ucbit disk_present_rep: 1; /* Changer supports disk present rep */ ! 957: Ucbit sep_chan_mute : 1; /* Mute controls each channel separat*/ ! 958: Ucbit sep_chan_vol : 1; /* Vol controls each channel separat */ ! 959: u_char max_read_speed[2]; /* Max. read speed in KB/s */ ! 960: u_char num_vol_levels[2]; /* # of supported volume levels */ ! 961: u_char buffer_size[2]; /* Buffer size for the data in KB */ ! 962: u_char cur_read_speed[2]; /* Current read speed in KB/s */ ! 963: u_char res_16; /* Reserved */ ! 964: Ucbit res_17 : 2; /* Reserved */ ! 965: Ucbit length : 2; /* 0=32BCKs 1=16BCKs 2=24BCKs 3=24I2c*/ ! 966: Ucbit LSBF : 1; /* Set: LSB first Clear: MSB first */ ! 967: Ucbit RCK : 1; /* Set: HIGH high LRCK=left channel */ ! 968: Ucbit BCK : 1; /* Data valid on falling edge of BCK */ ! 969: Ucbit res_17_0 : 1; /* Reserved */ ! 970: u_char max_write_speed[2]; /* Max. write speed supported in KB/s*/ ! 971: u_char cur_write_speed[2]; /* Current write speed in KB/s */ ! 972: }; ! 973: ! 974: #endif ! 975: ! 976: #define LT_CADDY 0 ! 977: #define LT_TRAY 1 ! 978: #define LT_POP_UP 2 ! 979: #define LT_RES3 3 ! 980: #define LT_CHANGER_IND 4 ! 981: #define LT_CHANGER_CART 5 ! 982: #define LT_RES6 6 ! 983: #define LT_RES7 7 ! 984: ! 985: ! 986: struct scsi_mode_data { ! 987: struct scsi_mode_header header; ! 988: struct scsi_mode_blockdesc blockdesc; ! 989: union pagex { ! 990: struct acb_mode_data acb; ! 991: struct scsi_mode_page_01 page1; ! 992: struct scsi_mode_page_02 page2; ! 993: struct scsi_mode_page_03 page3; ! 994: struct scsi_mode_page_04 page4; ! 995: struct scsi_mode_page_05 page5; ! 996: struct scsi_mode_page_07 page7; ! 997: struct scsi_mode_page_08 page8; ! 998: struct scsi_mode_page_09 page9; ! 999: struct scsi_mode_page_0A pageA; ! 1000: struct scsi_mode_page_0B pageB; ! 1001: struct scsi_mode_page_0C pageC; ! 1002: struct scsi_mode_page_0D pageD; ! 1003: struct sony_mode_page_20 sony20; ! 1004: struct toshiba_mode_page_20 toshiba20; ! 1005: struct ccs_mode_page_38 ccs38; ! 1006: } pagex; ! 1007: }; ! 1008: ! 1009: struct scsi_capacity { ! 1010: long c_baddr; /* must convert byteorder!! */ ! 1011: long c_bsize; /* must convert byteorder!! */ ! 1012: }; ! 1013: ! 1014: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 1015: ! 1016: struct scsi_def_header { ! 1017: Ucbit : 8; ! 1018: Ucbit format : 3; ! 1019: Ucbit gdl : 1; ! 1020: Ucbit mdl : 1; ! 1021: Ucbit : 3; ! 1022: u_char length[2]; ! 1023: }; ! 1024: ! 1025: #else /* Motorola byteorder */ ! 1026: ! 1027: struct scsi_def_header { ! 1028: Ucbit : 8; ! 1029: Ucbit : 3; ! 1030: Ucbit mdl : 1; ! 1031: Ucbit gdl : 1; ! 1032: Ucbit format : 3; ! 1033: u_char length[2]; ! 1034: }; ! 1035: #endif ! 1036: ! 1037: ! 1038: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 1039: ! 1040: struct scsi_format_header { ! 1041: Ucbit res : 8; /* Adaptec 5500: 1 --> format track */ ! 1042: Ucbit vu : 1; ! 1043: Ucbit : 3; ! 1044: Ucbit serr : 1; /* Stop on error */ ! 1045: Ucbit dcert : 1; /* Disable certification */ ! 1046: Ucbit dmdl : 1; /* Disable manufacturer defect list */ ! 1047: Ucbit enable : 1; /* Enable to use the next 3 bits */ ! 1048: u_char length[2]; /* Length of following list in bytes*/ ! 1049: }; ! 1050: ! 1051: #else /* Motorola byteorder */ ! 1052: ! 1053: struct scsi_format_header { ! 1054: Ucbit res : 8; /* Adaptec 5500: 1 --> format track */ ! 1055: Ucbit enable : 1; /* Enable to use the next 3 bits */ ! 1056: Ucbit dmdl : 1; /* Disable manufacturer defect list */ ! 1057: Ucbit dcert : 1; /* Disable certification */ ! 1058: Ucbit serr : 1; /* Stop on error */ ! 1059: Ucbit : 3; ! 1060: Ucbit vu : 1; ! 1061: u_char length[2]; /* Length of following list in bytes*/ ! 1062: }; ! 1063: #endif ! 1064: ! 1065: struct scsi_def_bfi { ! 1066: u_char cyl[3]; ! 1067: u_char head; ! 1068: u_char bfi[4]; ! 1069: }; ! 1070: ! 1071: struct scsi_def_phys { ! 1072: u_char cyl[3]; ! 1073: u_char head; ! 1074: u_char sec[4]; ! 1075: }; ! 1076: ! 1077: struct scsi_def_list { ! 1078: struct scsi_def_header hd; ! 1079: union { ! 1080: u_char list_block[1][4]; ! 1081: struct scsi_def_bfi list_bfi[1]; ! 1082: struct scsi_def_phys list_phys[1]; ! 1083: } def_list; ! 1084: }; ! 1085: ! 1086: struct scsi_format_data { ! 1087: struct scsi_format_header hd; ! 1088: union { ! 1089: u_char list_block[1][4]; ! 1090: struct scsi_def_bfi list_bfi[1]; ! 1091: struct scsi_def_phys list_phys[1]; ! 1092: } def_list; ! 1093: }; ! 1094: ! 1095: #define def_block def_list.list_block ! 1096: #define def_bfi def_list.list_bfi ! 1097: #define def_phys def_list.list_phys ! 1098: ! 1099: #define SC_DEF_BLOCK 0 ! 1100: #define SC_DEF_BFI 4 ! 1101: #define SC_DEF_PHYS 5 ! 1102: #define SC_DEF_VU 6 ! 1103: #define SC_DEF_RES 7 ! 1104: ! 1105: struct scsi_send_diag_cmd { ! 1106: u_char cmd; ! 1107: u_char addr[4]; ! 1108: Ucbit : 8; ! 1109: }; ! 1110: ! 1111: #if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */ ! 1112: ! 1113: struct scsi_sector_header { ! 1114: u_char cyl[2]; ! 1115: u_char head; ! 1116: u_char sec; ! 1117: Ucbit : 5; ! 1118: Ucbit rp : 1; ! 1119: Ucbit sp : 1; ! 1120: Ucbit dt : 1; ! 1121: }; ! 1122: ! 1123: #else /* Motorola byteorder */ ! 1124: ! 1125: struct scsi_sector_header { ! 1126: u_char cyl[2]; ! 1127: u_char head; ! 1128: u_char sec; ! 1129: Ucbit dt : 1; ! 1130: Ucbit sp : 1; ! 1131: Ucbit rp : 1; ! 1132: Ucbit : 5; ! 1133: }; ! 1134: #endif ! 1135: ! 1136: #endif /* _SCSIREG_H */
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