--- uae/src/newcpu.c	2018/04/24 17:00:08	1.1.1.14
+++ uae/src/newcpu.c	2018/04/24 17:05:38	1.1.1.17
@@ -675,7 +675,9 @@ void MakeFromSR (void)
     if (regs.t1 || regs.t0)
 	set_special (SPCFLAG_TRACE);
     else
-	unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
+    	/* Keep SPCFLAG_DOTRACE, we still want a trace exception for
+	   SR-modifying instructions (including STOP).  */
+	unset_special (SPCFLAG_TRACE);
 }
 
 void Exception(int nr, uaecptr oldpc)
@@ -748,7 +750,7 @@ kludge_me_do:
     unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
 }
 
-static void Interrupt(int nr)
+static void Interrupt (int nr)
 {
     assert(nr < 8 && nr >= 0);
     lastint_regs = regs;
@@ -759,7 +761,7 @@ static void Interrupt(int nr)
     set_special (SPCFLAG_INT);
 }
 
-static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr;
+static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp;
 
 int m68k_move2c (int regno, uae_u32 *regp)
 {
@@ -775,7 +777,7 @@ int m68k_move2c (int regno, uae_u32 *reg
 	case 1: regs.dfc = *regp & 7; break;
 	case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break;
 	case 3: tc = *regp & 0xc000; break;
-	  /* Mask out fields that should be zero.  */
+	    /* Mask out fields that should be zero.  */
 	case 4: itt0 = *regp & 0xffffe364; break;
 	case 5: itt1 = *regp & 0xffffe364; break;
 	case 6: dtt0 = *regp & 0xffffe364; break;
@@ -786,6 +788,9 @@ int m68k_move2c (int regno, uae_u32 *reg
 	case 0x802: caar = *regp & 0xfc; break;
 	case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
 	case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
+	case 0x805: mmusr = *regp; break;
+	case 0x806: urp = *regp; break;
+	case 0x807: srp = *regp; break;
 	default:
 	    op_illg (0x4E7B);
 	    return 0;
@@ -818,6 +823,8 @@ int m68k_movec2 (int regno, uae_u32 *reg
 	case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
 	case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
 	case 0x805: *regp = mmusr; break;
+	case 0x806: *regp = urp; break;
+	case 0x807: *regp = srp; break;
 	default:
 	    op_illg (0x4E7A);
 	    return 0;
@@ -1100,6 +1107,7 @@ void m68k_reset (void)
 
     m68k_areg (regs, 7) = get_long (0x00f80000);
     m68k_setpc (get_long (0x00f80004));
+    refill_prefetch (m68k_getpc (), 0);
     fill_prefetch_0 ();
     regs.s = 1;
     regs.m = 0;
@@ -1142,14 +1150,14 @@ unsigned long REGPARAM2 op_illg (uae_u32
 	    ersatz_perform (arg);
 	    fill_prefetch_0 ();
 	    return 4;
-	} else if ((pc & 0xF80000) == 0xF00000) {
+	} else if ((pc & 0xFFFF0000) == RTAREA_BASE) {
 	    /* User-mode STOP replacement */
 	    m68k_setstopped (1);
 	    return 4;
 	}
     }
 
-    if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
+    if ((opcode & 0xF000) == 0xA000 && (pc & 0xFFFF0000) == RTAREA_BASE) {
 	/* Calltrap. */
 	m68k_incpc(2);
 	call_calltrap (opcode & 0xFFF);
@@ -1162,7 +1170,7 @@ unsigned long REGPARAM2 op_illg (uae_u32
 	return 4;
     }
     if ((opcode & 0xF000) == 0xA000) {
-	if ((pc & 0xF80000) == 0xF00000) {
+	if ((pc & 0xFFFF0000) == RTAREA_BASE) {
 	    /* Calltrap. */
 	    call_calltrap (opcode & 0xFFF);
 	}
@@ -1294,7 +1302,7 @@ static void m68k_run_1 (void)
 	uae_u32 opcode = get_iword_prefetch (0);
 #ifdef DEBUG_PREFETCH
 	if (get_ilong (0) != do_get_mem_long (&regs.prefetch)) {
-	    fprintf (stderr, "Prefetch differs from memory.\n");
+	    write_log ("Prefetch differs from memory.\n");
 	    debugging = 1;
 	    return;
 	}
@@ -1319,7 +1327,7 @@ static void m68k_run_1 (void)
 #endif
 #ifdef DEBUG_PREFETCH
 	if (memcmp (saved_bytes, oldpcp, 20) != 0) {
-	    fprintf (stderr, "Self-modifying code detected.\n");
+	    write_log ("Self-modifying code detected.\n");
 	    set_special (SPCFLAG_BRK);
 	    debugging = 1;
 	}