--- uae/src/newcpu.c 2018/04/24 16:54:50 1.1.1.11 +++ uae/src/newcpu.c 2018/04/24 17:16:34 1.1.1.23 @@ -9,29 +9,33 @@ #include "sysconfig.h" #include "sysdeps.h" -#include "config.h" #include "options.h" #include "events.h" #include "uae.h" #include "memory.h" #include "custom.h" -#include "readcpu.h" #include "newcpu.h" #include "autoconf.h" +#include "traps.h" #include "ersatz.h" #include "debug.h" -#include "compiler.h" #include "gui.h" +#include "savestate.h" +#include "blitter.h" /* Opcode of faulting instruction */ -uae_u16 last_op_for_exception_3; +static uae_u16 last_op_for_exception_3; /* PC at fault time */ -uaecptr last_addr_for_exception_3; +static uaecptr last_addr_for_exception_3; /* Address that generated the exception */ -uaecptr last_fault_for_exception_3; +static uaecptr last_fault_for_exception_3; +/* read (0) or write (1) access */ +static int last_writeaccess_for_exception_3; +/* instruction (1) or data (0) access */ +static int last_instructionaccess_for_exception_3; -int areg_byteinc[] = { 1,1,1,1,1,1,1,2 }; -int imm8_table[] = { 8,1,2,3,4,5,6,7 }; +const int areg_byteinc[] = { 1,1,1,1,1,1,1,2 }; +const int imm8_table[] = { 8,1,2,3,4,5,6,7 }; int movem_index1[256]; int movem_index2[256]; @@ -109,14 +113,14 @@ static void build_cpufunctbl (void) { int i; unsigned long opcode; - struct cputbl *tbl = (currprefs.cpu_level == 3 ? op_smalltbl_0 - : currprefs.cpu_level == 2 ? op_smalltbl_1 - : currprefs.cpu_level == 1 ? op_smalltbl_2 - : currprefs.cpu_compatible ? op_smalltbl_4 - : op_smalltbl_3); + struct cputbl *tbl = (currprefs.cpu_level == 4 ? op_smalltbl_0_ff + : currprefs.cpu_level == 3 ? op_smalltbl_1_ff + : currprefs.cpu_level == 2 ? op_smalltbl_2_ff + : currprefs.cpu_level == 1 ? op_smalltbl_3_ff + : op_smalltbl_5_ff); - write_log ("Building CPU function table (%d %d %d).\n", - currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24); + write_log ("Building CPU function table (%d %d).\n", + currprefs.cpu_level, currprefs.address_space_24); for (opcode = 0; opcode < 65536; opcode++) cpufunctbl[opcode] = op_illg_1; @@ -143,6 +147,21 @@ static void build_cpufunctbl (void) } } +void fill_prefetch_slow (void) +{ +#ifdef CPUEMU_6 + if (currprefs.cpu_cycle_exact) { + regs.ir = get_word_ce (m68k_getpc ()); + regs.irc = get_word_ce (m68k_getpc () + 2); + } else { +#endif + regs.ir = get_word (m68k_getpc ()); + regs.irc = get_word (m68k_getpc () + 2); +#ifdef CPUEMU_6 + } +#endif +} + unsigned long cycles_mask, cycles_val; static void update_68k_cycles (void) @@ -157,12 +176,6 @@ static void update_68k_cycles (void) void check_prefs_changed_cpu (void) { - if (currprefs.cpu_level != changed_prefs.cpu_level - || currprefs.cpu_compatible != changed_prefs.cpu_compatible) { - currprefs.cpu_level = changed_prefs.cpu_level; - currprefs.cpu_compatible = changed_prefs.cpu_compatible; - build_cpufunctbl (); - } if (currprefs.m68k_speed != changed_prefs.m68k_speed) { currprefs.m68k_speed = changed_prefs.m68k_speed; reset_frame_rate_hack (); @@ -211,26 +224,33 @@ void init_m68k (void) } #endif write_log ("Building CPU table for configuration: 68"); + regs.address_space_mask = 0xffffffff; if (currprefs.address_space_24 && currprefs.cpu_level > 1) - write_log ("EC"); + write_log ("EC"); switch (currprefs.cpu_level) { - case 1: - write_log ("010"); - break; - case 2: - write_log ("020"); - break; - case 3: - write_log ("020/881"); - break; - default: - write_log ("000"); - break; + case 1: + write_log ("010"); + break; + case 2: + write_log ("020"); + break; + case 3: + write_log ("020/881"); + break; + case 4: + /* Who is going to miss the MMU anyway...? :-) */ + write_log ("040"); + break; + default: + write_log ("000"); + break; + } + if (currprefs.address_space_24) { + regs.address_space_mask = 0x00ffffff; + write_log (" 24-bit addressing"); } - if (currprefs.cpu_compatible) - write_log (" (compatible mode)"); write_log ("\n"); - + read_table68k (); do_merges (); @@ -278,7 +298,7 @@ uae_s32 ShowEA (FILE *f, int reg, amodes break; case Ad16: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; - addr = m68k_areg(regs,reg) + (uae_s16)disp16; + addr = m68k_areg (regs,reg) + (uae_s16)disp16; sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff, (unsigned long)addr); break; @@ -286,13 +306,13 @@ uae_s32 ShowEA (FILE *f, int reg, amodes dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; disp8 = dp & 0xFF; r = (dp & 0x7000) >> 12; - dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r); + dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r); if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg); dispreg <<= (dp >> 9) & 3; if (dp & 0x100) { uae_s32 outer = 0, disp = 0; - uae_s32 base = m68k_areg(regs,reg); + uae_s32 base = m68k_areg (regs,reg); char name[10]; sprintf (name,"A%d, ",reg); if (dp & 0x80) { base = 0; name[0] = 0; } @@ -315,7 +335,7 @@ uae_s32 ShowEA (FILE *f, int reg, amodes disp,outer, (unsigned long)addr); } else { - addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg; + addr = m68k_areg (regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg; sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg, dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3), disp8, @@ -333,7 +353,7 @@ uae_s32 ShowEA (FILE *f, int reg, amodes dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; disp8 = dp & 0xFF; r = (dp & 0x7000) >> 12; - dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r); + dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r); if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg); dispreg <<= (dp >> 9) & 3; @@ -453,7 +473,7 @@ static int verify_ea (int reg, amodes mo break; case Ad16: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; - addr = m68k_areg(regs,reg) + (uae_s16)disp16; + addr = m68k_areg (regs,reg) + (uae_s16)disp16; break; case Ad8r: addr = m68k_areg (regs, reg); @@ -461,7 +481,7 @@ static int verify_ea (int reg, amodes mo dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2; disp8 = dp & 0xFF; r = (dp & 0x7000) >> 12; - dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r); + dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r); if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg); dispreg <<= (dp >> 9) & 3; @@ -544,6 +564,8 @@ static int verify_ea (int reg, amodes mo last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset; last_fault_for_exception_3 = addr; + last_writeaccess_for_exception_3 = 0; + last_instructionaccess_for_exception_3 = 0; return 0; } @@ -637,163 +659,275 @@ void MakeFromSR (void) if (olds != regs.s) { if (olds) { if (oldm) - regs.msp = m68k_areg(regs, 7); + regs.msp = m68k_areg (regs, 7); else - regs.isp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.usp; + regs.isp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.usp; } else { - regs.usp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp; + regs.usp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.m ? regs.msp : regs.isp; } } else if (olds && oldm != regs.m) { if (oldm) { - regs.msp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.isp; + regs.msp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.isp; } else { - regs.isp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.msp; + regs.isp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.msp; } } } else { if (olds != regs.s) { if (olds) { - regs.isp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.usp; + regs.isp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.usp; } else { - regs.usp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.isp; + regs.usp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.isp; } } } - regs.spcflags |= SPCFLAG_INT; + set_special (SPCFLAG_INT); if (regs.t1 || regs.t0) - regs.spcflags |= SPCFLAG_TRACE; + set_special (SPCFLAG_TRACE); else - regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE); + /* Keep SPCFLAG_DOTRACE, we still want a trace exception for + SR-modifying instructions (including STOP). */ + unset_special (SPCFLAG_TRACE); } -void Exception(int nr, uaecptr oldpc) +static void exception_trace (int nr) +{ + unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE); + if (regs.t1 && !regs.t0) { + /* trace stays pending if exception is div by zero, chk, + * trapv or trap #x + */ + if (nr == 5 || nr == 6 || nr == 7 || (nr >= 32 && nr <= 47)) + set_special (SPCFLAG_DOTRACE); + } + regs.t1 = regs.t0 = regs.m = 0; +} + +static void exception_debug (int nr) +{ +#ifdef DEBUGGER + if (!exception_debugging) + return; + console_out ("Exception %d, PC=%08.8X\n", nr, m68k_getpc()); +#endif +} + +void Exception_normal (int nr, uaecptr oldpc) { - compiler_flush_jsr_stack(); + uae_u32 currpc = m68k_getpc (), newpc; + int sv = regs.s; + + exception_debug (nr); MakeSR(); + if (!regs.s) { - regs.usp = m68k_areg(regs, 7); + regs.usp = m68k_areg (regs, 7); if (currprefs.cpu_level >= 2) - m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp; + m68k_areg (regs, 7) = regs.m ? regs.msp : regs.isp; else - m68k_areg(regs, 7) = regs.isp; + m68k_areg (regs, 7) = regs.isp; regs.s = 1; } if (currprefs.cpu_level > 0) { if (nr == 2 || nr == 3) { int i; - /* @@@ this is probably wrong (?) */ - for (i = 0 ; i < 12 ; i++) { - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + if (currprefs.cpu_level >= 4) { /* 68040 */ + if (nr == 2) { + for (i = 0 ; i < 18 ; i++) { + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + } + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), last_fault_for_exception_3); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */ + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), last_addr_for_exception_3); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0x7000 + nr * 4); + } else { + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), last_fault_for_exception_3); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0x2000 + nr * 4); + } + } else { + uae_u16 ssw = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1); + ssw |= last_writeaccess_for_exception_3 ? 0 : 0x40; + ssw |= 0x20; + for (i = 0 ; i < 36; i++) { + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + } + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), last_fault_for_exception_3); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), ssw); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0xb000 + nr * 4); } - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0xa000 + nr * 4); +#if 0 + write_log ("Exception %d (%x) at %x -> %x!\n", nr, oldpc, currpc, get_long (regs.vbr + 4*nr)); +#endif + } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) { - m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), oldpc); - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x2000 + nr * 4); - } else if (regs.m && nr >= 24 && nr < 32) { - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), nr * 4); - m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), m68k_getpc ()); - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), regs.sr); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), oldpc); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0x2000 + nr * 4); + } else if (regs.m && nr >= 24 && nr < 32) { /* M + Interrupt */ + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), nr * 4); + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), currpc); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), regs.sr); regs.sr |= (1 << 13); - regs.msp = m68k_areg(regs, 7); - m68k_areg(regs, 7) = regs.isp; - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x1000 + nr * 4); + regs.msp = m68k_areg (regs, 7); + m68k_areg (regs, 7) = regs.isp; + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), 0x1000 + nr * 4); } else { - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), nr * 4); - } - } else { - if (nr == 2 || nr == 3) { - m68k_areg(regs, 7) -= 12; - /* ??????? */ - if (nr == 3) { - put_long (m68k_areg(regs, 7), last_fault_for_exception_3); - put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3); - put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3); - } - write_log ("Exception!\n"); - goto kludge_me_do; + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), nr * 4); } - } - m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), m68k_getpc ()); + } else if (nr == 2 || nr == 3) { + uae_u16 mode = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1); + mode |= last_writeaccess_for_exception_3 ? 0 : 16; + m68k_areg (regs, 7) -= 14; + /* fixme: bit3=I/N */ + put_word (m68k_areg (regs, 7) + 0, mode); + put_long (m68k_areg (regs, 7) + 2, last_fault_for_exception_3); + put_word (m68k_areg (regs, 7) + 6, last_op_for_exception_3); + put_word (m68k_areg (regs, 7) + 8, regs.sr); + put_long (m68k_areg (regs, 7) + 10, last_addr_for_exception_3); + write_log ("Exception %d (%x) at %x -> %x!\n", nr, oldpc, currpc, get_long (regs.vbr + 4*nr)); + goto kludge_me_do; + } + m68k_areg (regs, 7) -= 4; + put_long (m68k_areg (regs, 7), currpc); + m68k_areg (regs, 7) -= 2; + put_word (m68k_areg (regs, 7), regs.sr); kludge_me_do: - m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), regs.sr); - m68k_setpc (get_long (regs.vbr + 4*nr)); - fill_prefetch_0 (); - regs.t1 = regs.t0 = regs.m = 0; - regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE); + newpc = get_long (regs.vbr + 4 * nr); + if (newpc & 1) { + if (nr == 2 || nr == 3) + uae_reset (1); /* there is nothing else we can do.. */ + else + exception3 (regs.ir, m68k_getpc(), newpc); + return; + } + m68k_setpc (newpc); + fill_prefetch_slow (); + exception_trace (nr); +} + +void Exception (int nr, uaecptr oldpc) +{ + Exception_normal (nr, oldpc); } -static void Interrupt(int nr) +static void Interrupt (int nr) { + regs.stopped = 0; + unset_special (SPCFLAG_STOP); assert(nr < 8 && nr >= 0); lastint_regs = regs; lastint_no = nr; - Exception(nr+24, 0); + Exception (nr + 24, 0); regs.intmask = nr; - regs.spcflags |= SPCFLAG_INT; + set_special (SPCFLAG_INT); } -static int caar, cacr; +static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp; int m68k_move2c (int regno, uae_u32 *regp) { - if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1) { + if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1) + || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2) + || (currprefs.cpu_level == 4 && regno == 0x802)) + { op_illg (0x4E7B); return 0; - } else + } else { switch (regno) { - case 0: regs.sfc = *regp & 7; break; - case 1: regs.dfc = *regp & 7; break; - case 2: cacr = *regp & 0x3; break; /* ignore C and CE */ - case 0x800: regs.usp = *regp; break; - case 0x801: regs.vbr = *regp; break; - case 0x802: caar = *regp &0xfc; break; - case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break; - case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break; - default: + case 0: regs.sfc = *regp & 7; break; + case 1: regs.dfc = *regp & 7; break; + case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break; + case 3: tc = *regp & 0xc000; break; + /* Mask out fields that should be zero. */ + case 4: itt0 = *regp & 0xffffe364; break; + case 5: itt1 = *regp & 0xffffe364; break; + case 6: dtt0 = *regp & 0xffffe364; break; + case 7: dtt1 = *regp & 0xffffe364; break; + + case 0x800: regs.usp = *regp; break; + case 0x801: regs.vbr = *regp; break; + case 0x802: caar = *regp & 0xfc; break; + case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg (regs, 7) = regs.msp; break; + case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg (regs, 7) = regs.isp; break; + case 0x805: mmusr = *regp; break; + case 0x806: urp = *regp; break; + case 0x807: srp = *regp; break; + default: op_illg (0x4E7B); return 0; } + } return 1; } int m68k_movec2 (int regno, uae_u32 *regp) { - if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1) { + if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1) + || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2) + || (currprefs.cpu_level == 4 && regno == 0x802)) + { op_illg (0x4E7A); return 0; - } else + } else { switch (regno) { - case 0: *regp = regs.sfc; break; - case 1: *regp = regs.dfc; break; - case 2: *regp = cacr; break; - case 0x800: *regp = regs.usp; break; - case 0x801: *regp = regs.vbr; break; - case 0x802: *regp = caar; break; - case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break; - case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break; - default: + case 0: *regp = regs.sfc; break; + case 1: *regp = regs.dfc; break; + case 2: *regp = cacr; break; + case 3: *regp = tc; break; + case 4: *regp = itt0; break; + case 5: *regp = itt1; break; + case 6: *regp = dtt0; break; + case 7: *regp = dtt1; break; + case 0x800: *regp = regs.usp; break; + case 0x801: *regp = regs.vbr; break; + case 0x802: *regp = caar; break; + case 0x803: *regp = regs.m == 1 ? m68k_areg (regs, 7) : regs.msp; break; + case 0x804: *regp = regs.m == 0 ? m68k_areg (regs, 7) : regs.isp; break; + case 0x805: *regp = mmusr; break; + case 0x806: *regp = urp; break; + case 0x807: *regp = srp; break; + default: op_illg (0x4E7A); return 0; } + } return 1; } @@ -1048,16 +1182,37 @@ void m68k_mull (uae_u32 opcode, uae_u32 } #endif } -static char* ccnames[] = +static const char *ccnames[] = { "T ","F ","HI","LS","CC","CS","NE","EQ", "VC","VS","PL","MI","GE","LT","GT","LE" }; void m68k_reset (void) { + if (currprefs.cpu_level != changed_prefs.cpu_level + || currprefs.address_space_24 != changed_prefs.address_space_24) + { + currprefs.address_space_24 = changed_prefs.address_space_24; + currprefs.cpu_level = changed_prefs.cpu_level; + build_cpufunctbl (); + } + + regs.kick_mask = 0x00F80000; + regs.spcflags = 0; + if (savestate_state == STATE_RESTORE) { + m68k_setpc (regs.pc); + /* MakeFromSR() must not swap stack pointer */ + regs.s = (regs.sr >> 13) & 1; + MakeFromSR(); + /* set stack pointer */ + if (regs.s) + m68k_areg (regs, 7) = regs.isp; + else + m68k_areg (regs, 7) = regs.usp; + return; + } + m68k_areg (regs, 7) = get_long (0x00f80000); m68k_setpc (get_long (0x00f80004)); - fill_prefetch_0 (); - regs.kick_mask = 0xF80000; regs.s = 1; regs.m = 0; regs.stopped = 0; @@ -1068,28 +1223,28 @@ void m68k_reset (void) SET_CFLG (0); SET_VFLG (0); SET_NFLG (0); - regs.spcflags = 0; regs.intmask = 7; regs.vbr = regs.sfc = regs.dfc = 0; regs.fpcr = regs.fpsr = regs.fpiar = 0; + regs.irc = 0xffff; + fill_prefetch_slow (); } unsigned long REGPARAM2 op_illg (uae_u32 opcode) { uaecptr pc = m68k_getpc (); - + if (cloanto_rom && (opcode & 0xF100) == 0x7100) { m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF); m68k_incpc (2); - fill_prefetch_0 (); + fill_prefetch_slow (); return 4; } - compiler_flush_jsr_stack (); if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) { write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n"); broken_in = 1; - regs.spcflags |= SPCFLAG_BRK; + set_special (SPCFLAG_BRK); quit_program = 1; } if (opcode == 0xFF0D) { @@ -1098,20 +1253,20 @@ unsigned long REGPARAM2 op_illg (uae_u32 uae_u16 arg = get_iword (2); m68k_incpc (4); ersatz_perform (arg); - fill_prefetch_0 (); + fill_prefetch_slow (); return 4; - } else if ((pc & 0xF80000) == 0xF00000) { + } else if ((pc & 0xFFFF0000) == RTAREA_BASE) { /* User-mode STOP replacement */ m68k_setstopped (1); return 4; } } - if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) { + if ((opcode & 0xF000) == 0xA000 && (pc & 0xFFFF0000) == RTAREA_BASE) { /* Calltrap. */ m68k_incpc(2); call_calltrap (opcode & 0xFFF); - fill_prefetch_0 (); + fill_prefetch_slow (); return 4; } @@ -1120,14 +1275,14 @@ unsigned long REGPARAM2 op_illg (uae_u32 return 4; } if ((opcode & 0xF000) == 0xA000) { - if ((pc & 0xF80000) == 0xF00000) { + if ((pc & 0xFFFF0000) == RTAREA_BASE) { /* Calltrap. */ call_calltrap (opcode & 0xFFF); } Exception(0xA,0); return 4; } -#if 0 +#if 1 write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc); #endif Exception (4,0); @@ -1136,10 +1291,13 @@ unsigned long REGPARAM2 op_illg (uae_u32 void mmu_op(uae_u32 opcode, uae_u16 extra) { - if ((extra & 0xB000) == 0) { /* PMOVE instruction */ - - } else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */ - } else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */ + if ((opcode & 0xFE0) == 0x0500) { + /* PFLUSH */ + mmusr = 0; + write_log ("PFLUSH\n"); + } else if ((opcode & 0x0FD8) == 0x548) { + /* PTEST */ + write_log ("PTEST\n"); } else op_illg (opcode); } @@ -1156,7 +1314,7 @@ static void do_trace (void) /* probably never used so why bother */ /* We can afford this to be inefficient... */ m68k_setpc (m68k_getpc ()); - fill_prefetch_0 (); + fill_prefetch_slow (); opcode = get_word (regs.pc); if (opcode == 0x4e72 /* RTE */ || opcode == 0x4e74 /* RTD */ @@ -1173,44 +1331,49 @@ static void do_trace (void) && (uae_s16)m68k_dreg(regs, opcode & 7) != 0)) { last_trace_ad = m68k_getpc (); - regs.spcflags &= ~SPCFLAG_TRACE; - regs.spcflags |= SPCFLAG_DOTRACE; + unset_special (SPCFLAG_TRACE); + set_special (SPCFLAG_DOTRACE); } } else if (regs.t1) { last_trace_ad = m68k_getpc (); - regs.spcflags &= ~SPCFLAG_TRACE; - regs.spcflags |= SPCFLAG_DOTRACE; + unset_special (SPCFLAG_TRACE); + set_special (SPCFLAG_DOTRACE); } } - -static int do_specialties (void) +static int do_specialties (int cycles) { if (regs.spcflags & SPCFLAG_COPPER) do_copper (); /*n_spcinsns++;*/ - while (regs.spcflags & SPCFLAG_BLTNASTY) { - do_cycles (4); + while ((regs.spcflags & SPCFLAG_BLTNASTY) && cycles > 0) { + int c = blitnasty(); + if (!c) { + cycles -= 2 * CYCLE_UNIT; + if (cycles < CYCLE_UNIT) + cycles = 0; + c = 1; + } + do_cycles (c * CYCLE_UNIT); if (regs.spcflags & SPCFLAG_COPPER) do_copper (); } - run_compiled_code(); - if (regs.spcflags & SPCFLAG_DOTRACE) { + if (regs.spcflags & SPCFLAG_DOTRACE) Exception (9,last_trace_ad); - } + while (regs.spcflags & SPCFLAG_STOP) { - do_cycles (4); + do_cycles (4 * CYCLE_UNIT); if (regs.spcflags & SPCFLAG_COPPER) do_copper (); - if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){ + if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) { int intr = intlev (); - regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT); + unset_special (SPCFLAG_INT | SPCFLAG_DOINT); if (intr != -1 && intr > regs.intmask) { Interrupt (intr); regs.stopped = 0; - regs.spcflags &= ~SPCFLAG_STOP; + unset_special (SPCFLAG_STOP); } } } @@ -1219,18 +1382,18 @@ static int do_specialties (void) if (regs.spcflags & SPCFLAG_DOINT) { int intr = intlev (); - regs.spcflags &= ~SPCFLAG_DOINT; + unset_special (SPCFLAG_DOINT); if (intr != -1 && intr > regs.intmask) { Interrupt (intr); regs.stopped = 0; } } if (regs.spcflags & SPCFLAG_INT) { - regs.spcflags &= ~SPCFLAG_INT; - regs.spcflags |= SPCFLAG_DOINT; + unset_special (SPCFLAG_INT); + set_special (SPCFLAG_DOINT); } if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) { - regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); + unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); return 1; } return 0; @@ -1242,13 +1405,8 @@ static void m68k_run_1 (void) { for (;;) { int cycles; - uae_u32 opcode = get_iword_prefetch (0); -#if 0 - if (get_ilong (0) != do_get_mem_long (®s.prefetch)) { - debugging = 1; - return; - } -#endif + uae_u32 opcode = regs.ir; + /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */ /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/ #if COUNT_INSTRS == 2 @@ -1257,37 +1415,27 @@ static void m68k_run_1 (void) #elif COUNT_INSTRS == 1 instrcount[opcode]++; #endif -#if defined X86_ASSEMBLY - __asm__ __volatile__("\tcall *%%ebx" - : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode) - : "%edx", "%ecx", - "%esi", "%edi", "%ebp", "memory", "cc"); -#else cycles = (*cpufunctbl[opcode])(opcode); -#endif /*n_insns++;*/ cycles &= cycles_mask; cycles |= cycles_val; do_cycles (cycles); if (regs.spcflags) { - if (do_specialties ()) + if (do_specialties (cycles)) return; } } } +#define DEBUG_PREFETCH + /* Same thing, but don't use prefetch to get opcode. */ static void m68k_run_2 (void) { for (;;) { int cycles; uae_u32 opcode = get_iword (0); -#if 0 - if (get_ilong (0) != do_get_mem_long (®s.prefetch)) { - debugging = 1; - return; - } -#endif + /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */ /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/ #if COUNT_INSTRS == 2 @@ -1296,38 +1444,32 @@ static void m68k_run_2 (void) #elif COUNT_INSTRS == 1 instrcount[opcode]++; #endif -#if defined X86_ASSEMBLY - __asm__ __volatile__("\tcall *%%ebx" - : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode) - : "%edx", "%ecx", - "%esi", "%edi", "%ebp", "memory", "cc"); -#else cycles = (*cpufunctbl[opcode])(opcode); -#endif + /*n_insns++;*/ cycles &= cycles_mask; cycles |= cycles_val; do_cycles (cycles); if (regs.spcflags) { - if (do_specialties ()) + if (do_specialties (cycles)) return; } } } -#ifdef X86_ASSEMBLY -STATIC_INLINE void m68k_run1 (void (*func)(void)) -{ - /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */ - __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" - : : "r" (func) : "%eax", "%edx", "%ecx", "memory", "cc"); -} -#else -#define m68k_run1(F) F() -#endif +#define m68k_run1(F) (F) () int in_m68k_go = 0; +static void exception2_handle (uaecptr addr, uaecptr fault) +{ + last_addr_for_exception_3 = addr; + last_fault_for_exception_3 = fault; + last_writeaccess_for_exception_3 = 0; + last_instructionaccess_for_exception_3 = 0; + Exception (2, addr); +} + void m68k_go (int may_quit) { if (in_m68k_go || !may_quit) { @@ -1344,13 +1486,42 @@ void m68k_go (int may_quit) if (quit_program == 1) break; quit_program = 0; + if (savestate_state == STATE_RESTORE) { + restore_state (savestate_filename); +#if 0 + activate_debugger (); +#endif + } m68k_reset (); reset_all_systems (); customreset (); + /* We may have been restoring state, but we're done now. */ + savestate_restore_finish (); + fill_prefetch_slow (); + handle_active_events (); + if (regs.spcflags) + do_specialties (0); + m68k_setpc (regs.pc); } + if (debugging) debug (); - m68k_run1 (currprefs.cpu_compatible ? m68k_run_1 : m68k_run_2); + if (regs.panic) { + regs.panic = 0; + /* program jumped to non-existing memory and cpu was >= 68020 */ + get_real_address (regs.isp); /* stack in no one's land? -> reboot */ + if (regs.isp & 1) + regs.panic = 1; + if (!regs.panic) + exception2_handle (regs.panic_pc, regs.panic_addr); + if (regs.panic) { + /* system is very badly confused */ + write_log ("double bus error or corrupted stack, forcing reboot..\n"); + regs.panic = 0; + uae_reset (1); + } + } + m68k_run1 (currprefs.cpu_level == 0 ? m68k_run_1 : m68k_run_2); } in_m68k_go--; } @@ -1450,12 +1621,12 @@ void m68k_dumpstate (FILE *f, uaecptr *n if ((i & 3) == 3) fprintf (f, "\n"); } for (i = 0; i < 8; i++){ - fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i)); + fprintf (f, "A%d: %08lx ", i, m68k_areg (regs, i)); if ((i & 3) == 3) fprintf (f, "\n"); } - if (regs.s == 0) regs.usp = m68k_areg(regs, 7); - if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7); - if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7); + if (regs.s == 0) regs.usp = m68k_areg (regs, 7); + if (regs.s && regs.m) regs.msp = m68k_areg (regs, 7); + if (regs.s && regs.m == 0) regs.isp = m68k_areg (regs, 7); fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n", regs.usp,regs.isp,regs.msp,regs.vbr); fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n", @@ -1470,10 +1641,159 @@ void m68k_dumpstate (FILE *f, uaecptr *n (regs.fpsr & 0x4000000) != 0, (regs.fpsr & 0x2000000) != 0, (regs.fpsr & 0x1000000) != 0); - if (currprefs.cpu_compatible) - fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch)); m68k_disasm (f, m68k_getpc (), nextpc, 1); if (nextpc) fprintf (f, "next PC: %08lx\n", *nextpc); } + + +/* CPU save/restore code */ + +#define CPUTYPE_EC 1 +#define CPUMODE_HALT 1 + +const uae_u8 *restore_cpu (const uae_u8 *src) +{ + int i,model,flags; + uae_u32 l; + + model = restore_u32(); + switch (model) { + case 68000: + currprefs.cpu_level = 0; + break; + case 68010: + currprefs.cpu_level = 1; + break; + case 68020: + currprefs.cpu_level = 2; + break; + default: + write_log ("Unknown cpu type %d\n", model); + break; + } + + flags = restore_u32(); + currprefs.address_space_24 = 0; + if (flags & CPUTYPE_EC) + currprefs.address_space_24 = 1; + for (i = 0; i < 15; i++) + regs.regs[i] = restore_u32 (); + regs.pc = restore_u32 (); + regs.irc = restore_u16 (); + regs.ir = restore_u16 (); + regs.usp = restore_u32 (); + regs.isp = restore_u32 (); + regs.sr = restore_u16 (); + l = restore_u32(); + if (l & CPUMODE_HALT) { + regs.stopped = 1; + set_special (SPCFLAG_STOP); + } else + regs.stopped = 0; + if (model >= 68010) { + regs.dfc = restore_u32 (); + regs.sfc = restore_u32 (); + regs.vbr = restore_u32 (); + } + if (model >= 68020) { + caar = restore_u32 (); + cacr = restore_u32 (); + regs.msp = restore_u32 (); + } + write_log ("CPU %d%s%03d, PC=%08.8X\n", + model/1000, flags & 1 ? "EC" : "", model % 1000, regs.pc); + + return src; +} + +static int cpumodel[] = { 68000, 68010, 68020, 68020 }; + +uae_u8 *save_cpu (int *len, uae_u8 *dstptr) +{ + uae_u8 *dstbak,*dst; + int model,i; + + if (dstptr) + dstbak = dst = dstptr; + else + dstbak = dst = malloc(4+4+15*4+4+4+4+4+2+4+4+4+4+4+4+4); + model = cpumodel[currprefs.cpu_level]; + save_u32 (model); /* MODEL */ + save_u32 (currprefs.address_space_24 ? 1 : 0); /* FLAGS */ + for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */ + save_u32 (m68k_getpc ()); /* PC */ + save_u16 (regs.irc); /* prefetch */ + save_u16 (regs.ir); /* instruction prefetch */ + MakeSR (); + save_u32 (!regs.s ? regs.regs[15] : regs.usp); /* USP */ + save_u32 (regs.s ? regs.regs[15] : regs.isp); /* ISP */ + save_u16 (regs.sr); /* SR/CCR */ + save_u32 (regs.stopped ? CPUMODE_HALT : 0); /* flags */ + if(model >= 68010) { + save_u32 (regs.dfc); /* DFC */ + save_u32 (regs.sfc); /* SFC */ + save_u32 (regs.vbr); /* VBR */ + } + if(model >= 68020) { + save_u32 (caar); /* CAAR */ + save_u32 (cacr); /* CACR */ + save_u32 (regs.msp); /* MSP */ + } + *len = dst - dstbak; + return dstbak; +} + +static void exception3f (uae_u32 opcode, uaecptr addr, uaecptr fault, int writeaccess, int instructionaccess) +{ + last_addr_for_exception_3 = addr; + last_fault_for_exception_3 = fault; + last_op_for_exception_3 = opcode; + last_writeaccess_for_exception_3 = writeaccess; + last_instructionaccess_for_exception_3 = instructionaccess; + Exception (3, fault); +} + +void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault) +{ + exception3f (opcode, addr, fault, 0, 0); +} + +void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault) +{ + exception3f (opcode, addr, fault, 0, 1); +} + +void exception2 (uaecptr addr, uaecptr fault) +{ + write_log ("delayed exception2!\n"); + regs.panic_pc = m68k_getpc(); + regs.panic_addr = addr; + regs.panic = 2; + set_special (SPCFLAG_BRK); + m68k_setpc (0xf80000); + fill_prefetch_slow (); +} + +void cpureset (void) +{ + customreset (); +#if 0 + uae_u16 ins; + if (currprefs.cpu_level == 0 && (currprefs.cpu_compatible || currprefs.cpu_cycle_exact)) { + customreset (); + return; + } + ins = get_word (m68k_getpc() + 2); + if ((ins & ~7) == 0x4ed0) { + int reg = ins & 7; + uae_u32 addr = m68k_areg (regs, reg); + write_log ("reset/jmp (ax) combination emulated\n"); + customreset (); + if (addr < 0x80000) + addr += 0xf80000; + m68k_setpc (addr); + } +#endif +}