--- uae/src/newcpu.c 2018/04/24 16:44:48 1.1.1.5 +++ uae/src/newcpu.c 2018/04/24 16:46:12 1.1.1.6 @@ -13,7 +13,6 @@ #include "options.h" #include "events.h" #include "uae.h" -#include "machdep/m68k.h" #include "memory.h" #include "custom.h" #include "readcpu.h" @@ -624,8 +623,8 @@ void MakeSR (void) #endif regs.sr = ((regs.t1 << 15) | (regs.t0 << 14) | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8) - | (XFLG << 4) | (NFLG << 3) | (ZFLG << 2) | (VFLG << 1) - | CFLG); + | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1) + | GET_CFLG); } void MakeFromSR (void) @@ -638,11 +637,11 @@ void MakeFromSR (void) regs.s = (regs.sr >> 13) & 1; regs.m = (regs.sr >> 12) & 1; regs.intmask = (regs.sr >> 8) & 7; - XFLG = (regs.sr >> 4) & 1; - NFLG = (regs.sr >> 3) & 1; - ZFLG = (regs.sr >> 2) & 1; - VFLG = (regs.sr >> 1) & 1; - CFLG = regs.sr & 1; + SET_XFLG ((regs.sr >> 4) & 1); + SET_NFLG ((regs.sr >> 3) & 1); + SET_ZFLG ((regs.sr >> 2) & 1); + SET_VFLG ((regs.sr >> 1) & 1); + SET_CFLG (regs.sr & 1); if (currprefs.cpu_level >= 2) { if (olds != regs.s) { if (olds) { @@ -849,13 +848,15 @@ void m68k_divl (uae_u32 opcode, uae_u32 if ((quot & UVAL64(0xffffffff80000000)) != 0 && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000)) { - VFLG = NFLG = 1; - CFLG = 0; + SET_VFLG (1); + SET_NFLG (1); + SET_CFLG (0); } else { if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem; - VFLG = CFLG = 0; - ZFLG = ((uae_s32)quot) == 0; - NFLG = ((uae_s32)quot) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (((uae_s32)quot) == 0); + SET_NFLG (((uae_s32)quot) < 0); m68k_dreg(regs, extra & 7) = rem; m68k_dreg(regs, (extra >> 12) & 7) = quot; } @@ -871,12 +872,14 @@ void m68k_divl (uae_u32 opcode, uae_u32 rem = a % (uae_u64)src; quot = a / (uae_u64)src; if (quot > 0xffffffffu) { - VFLG = NFLG = 1; - CFLG = 0; + SET_VFLG (1); + SET_NFLG (1); + SET_CFLG (0); } else { - VFLG = CFLG = 0; - ZFLG = ((uae_s32)quot) == 0; - NFLG = ((uae_s32)quot) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (((uae_s32)quot) == 0); + SET_NFLG (((uae_s32)quot) < 0); m68k_dreg(regs, extra & 7) = rem; m68k_dreg(regs, (extra >> 12) & 7) = quot; } @@ -907,14 +910,16 @@ void m68k_divl (uae_u32 opcode, uae_u32 if ((uae_s32)src < 0) src = -src; if (div_unsigned(hi, lo, src, ", &rem) || (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) { - VFLG = NFLG = 1; - CFLG = 0; + SET_VFLG (1); + SET_NFLG (1); + SET_CFLG (0); } else { if (sign & 0x80000000) quot = -quot; if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem; - VFLG = CFLG = 0; - ZFLG = ((uae_s32)quot) == 0; - NFLG = ((uae_s32)quot) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (((uae_s32)quot) == 0); + SET_NFLG (((uae_s32)quot) < 0); m68k_dreg(regs, extra & 7) = rem; m68k_dreg(regs, (extra >> 12) & 7) = quot; } @@ -928,12 +933,14 @@ void m68k_divl (uae_u32 opcode, uae_u32 hi = (uae_u32)m68k_dreg(regs, extra & 7); } if (div_unsigned(hi, lo, src, ", &rem)) { - VFLG = NFLG = 1; - CFLG = 0; + SET_VFLG (1); + SET_NFLG (1); + SET_CFLG (0); } else { - VFLG = CFLG = 0; - ZFLG = ((uae_s32)quot) == 0; - NFLG = ((uae_s32)quot) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (((uae_s32)quot) == 0); + SET_NFLG (((uae_s32)quot) < 0); m68k_dreg(regs, extra & 7) = rem; m68k_dreg(regs, (extra >> 12) & 7) = quot; } @@ -968,15 +975,16 @@ void m68k_mull (uae_u32 opcode, uae_u32 uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7); a *= (uae_s64)(uae_s32)src; - VFLG = CFLG = 0; - ZFLG = a == 0; - NFLG = a < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (a == 0); + SET_NFLG (a < 0); if (extra & 0x400) m68k_dreg(regs, extra & 7) = a >> 32; else if ((a & UVAL64(0xffffffff80000000)) != 0 && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000)) { - VFLG = 1; + SET_VFLG (1); } m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; } else { @@ -984,13 +992,14 @@ void m68k_mull (uae_u32 opcode, uae_u32 uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7); a *= (uae_u64)src; - VFLG = CFLG = 0; - ZFLG = a == 0; - NFLG = ((uae_s64)a) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (a == 0); + SET_NFLG (((uae_s64)a) < 0); if (extra & 0x400) m68k_dreg(regs, extra & 7) = a >> 32; else if ((a & UVAL64(0xffffffff00000000)) != 0) { - VFLG = 1; + SET_VFLG (1); } m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a; } @@ -1012,16 +1021,17 @@ void m68k_mull (uae_u32 opcode, uae_u32 dst_lo = -dst_lo; if (dst_lo == 0) dst_hi++; } - VFLG = CFLG = 0; - ZFLG = dst_hi == 0 && dst_lo == 0; - NFLG = ((uae_s32)dst_hi) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (dst_hi == 0 && dst_lo == 0); + SET_NFLG (((uae_s32)dst_hi) < 0); if (extra & 0x400) m68k_dreg(regs, extra & 7) = dst_hi; else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0) && ((dst_hi & 0xffffffff) != 0xffffffff || (dst_lo & 0x80000000) != 0x80000000)) { - VFLG = 1; + SET_VFLG (1); } m68k_dreg(regs, (extra >> 12) & 7) = dst_lo; } else { @@ -1030,13 +1040,14 @@ void m68k_mull (uae_u32 opcode, uae_u32 mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo); - VFLG = CFLG = 0; - ZFLG = dst_hi == 0 && dst_lo == 0; - NFLG = ((uae_s32)dst_hi) < 0; + SET_VFLG (0); + SET_CFLG (0); + SET_ZFLG (dst_hi == 0 && dst_lo == 0); + SET_NFLG (((uae_s32)dst_hi) < 0); if (extra & 0x400) m68k_dreg(regs, extra & 7) = dst_hi; else if (dst_hi != 0) { - VFLG = 1; + SET_VFLG (1); } m68k_dreg(regs, (extra >> 12) & 7) = dst_lo; } @@ -1057,7 +1068,11 @@ void m68k_reset (void) regs.stopped = 0; regs.t1 = 0; regs.t0 = 0; - ZFLG = CFLG = NFLG = VFLG = 0; + SET_ZFLG (0); + SET_XFLG (0); + SET_CFLG (0); + SET_VFLG (0); + SET_NFLG (0); regs.spcflags = 0; regs.intmask = 7; regs.vbr = regs.sfc = regs.dfc = 0; @@ -1405,7 +1420,7 @@ void m68k_dumpstate (uaecptr *nextpc) regs.usp,regs.isp,regs.msp,regs.vbr); printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n", regs.t1, regs.t0, regs.s, regs.m, - XFLG, NFLG, ZFLG, VFLG, CFLG, regs.intmask); + GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask); for (i = 0; i < 8; i++){ printf ("FP%d: %g ", i, regs.fp[i]); if ((i & 3) == 3) printf ("\n");