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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
1.1 root 16: #include "memory.h"
17: #include "custom.h"
18: #include "newcpu.h"
19: #include "autoconf.h"
20: #include "ersatz.h"
21: #include "debug.h"
22: #include "compiler.h"
1.1.1.3 root 23: #include "gui.h"
24:
25: /* Opcode of faulting instruction */
26: uae_u16 last_op_for_exception_3;
27: /* PC at fault time */
28: uaecptr last_addr_for_exception_3;
29: /* Address that generated the exception */
30: uaecptr last_fault_for_exception_3;
1.1 root 31:
32: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
33: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
34:
35: int movem_index1[256];
36: int movem_index2[256];
37: int movem_next[256];
38:
39: int fpp_movem_index1[256];
40: int fpp_movem_index2[256];
41: int fpp_movem_next[256];
42:
43: cpuop_func *cpufunctbl[65536];
44:
1.1.1.3 root 45: #define COUNT_INSTRS 0
1.1 root 46:
47: #if COUNT_INSTRS
48: static unsigned long int instrcount[65536];
1.1.1.3 root 49: static uae_u16 opcodenums[65536];
1.1 root 50:
1.1.1.4 root 51: static int compfn (const void *el1, const void *el2)
1.1 root 52: {
1.1.1.3 root 53: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
54: }
55:
56: static char *icountfilename (void)
57: {
58: char *name = getenv ("INSNCOUNT");
59: if (name)
60: return name;
61: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 62: }
63:
1.1.1.4 root 64: void dump_counts (void)
1.1 root 65: {
1.1.1.4 root 66: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 67: unsigned long int total;
1.1 root 68: int i;
1.1.1.3 root 69:
70: write_log ("Writing instruction count file...\n");
1.1.1.4 root 71: for (i = 0; i < 65536; i++) {
1.1 root 72: opcodenums[i] = i;
1.1.1.3 root 73: total += instrcount[i];
1.1 root 74: }
1.1.1.4 root 75: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 76:
77: fprintf (f, "Total: %lu\n", total);
78: for (i=0; i < 65536; i++) {
1.1 root 79: unsigned long int cnt = instrcount[opcodenums[i]];
80: struct instr *dp;
81: struct mnemolookup *lookup;
82: if (!cnt)
83: break;
84: dp = table68k + opcodenums[i];
1.1.1.4 root 85: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
86: ;
1.1.1.3 root 87: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 88: }
1.1.1.4 root 89: fclose (f);
1.1 root 90: }
91: #else
1.1.1.4 root 92: void dump_counts (void)
1.1 root 93: {
94: }
95: #endif
96:
97: int broken_in;
98:
1.1.1.4 root 99: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
100:
101: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
102: {
1.1.1.8 root 103: op_illg (opcode);
1.1.1.4 root 104: return 4;
105: }
106:
1.1.1.3 root 107: static void build_cpufunctbl (void)
108: {
109: int i;
110: unsigned long opcode;
1.1.1.12! root 111: struct cputbl *tbl = (currprefs.cpu_level == 4 ? op_smalltbl_0_ff
! 112: : currprefs.cpu_level == 3 ? op_smalltbl_1_ff
! 113: : currprefs.cpu_level == 2 ? op_smalltbl_2_ff
! 114: : currprefs.cpu_level == 1 ? op_smalltbl_3_ff
! 115: : ! currprefs.cpu_compatible ? op_smalltbl_4_ff
! 116: : op_smalltbl_5_ff);
1.1.1.3 root 117:
1.1.1.4 root 118: write_log ("Building CPU function table (%d %d %d).\n",
119: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 120:
121: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.8 root 122: cpufunctbl[opcode] = op_illg_1;
1.1.1.3 root 123: for (i = 0; tbl[i].handler != NULL; i++) {
124: if (! tbl[i].specific)
1.1.1.8 root 125: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.3 root 126: }
127: for (opcode = 0; opcode < 65536; opcode++) {
128: cpuop_func *f;
129:
130: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
131: continue;
132:
133: if (table68k[opcode].handler != -1) {
1.1.1.8 root 134: f = cpufunctbl[table68k[opcode].handler];
1.1.1.4 root 135: if (f == op_illg_1)
1.1.1.3 root 136: abort();
1.1.1.8 root 137: cpufunctbl[opcode] = f;
1.1.1.3 root 138: }
139: }
140: for (i = 0; tbl[i].handler != NULL; i++) {
141: if (tbl[i].specific)
1.1.1.8 root 142: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.4 root 143: }
144: }
145:
146: unsigned long cycles_mask, cycles_val;
147:
148: static void update_68k_cycles (void)
149: {
150: cycles_mask = 0;
151: cycles_val = currprefs.m68k_speed;
152: if (currprefs.m68k_speed < 1) {
153: cycles_mask = 0xFFFFFFFF;
154: cycles_val = 0;
1.1.1.3 root 155: }
156: }
157:
158: void check_prefs_changed_cpu (void)
159: {
160: if (currprefs.cpu_level != changed_prefs.cpu_level
161: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
162: currprefs.cpu_level = changed_prefs.cpu_level;
163: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
164: build_cpufunctbl ();
165: }
1.1.1.4 root 166: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
167: currprefs.m68k_speed = changed_prefs.m68k_speed;
168: reset_frame_rate_hack ();
169: update_68k_cycles ();
170: }
1.1.1.3 root 171: }
172:
1.1 root 173: void init_m68k (void)
174: {
1.1.1.3 root 175: int i;
176:
1.1.1.4 root 177: update_68k_cycles ();
178:
1.1 root 179: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 180: int j;
1.1 root 181: for (j = 0 ; j < 8 ; j++) {
182: if (i & (1 << j)) break;
183: }
184: movem_index1[i] = j;
185: movem_index2[i] = 7-j;
186: movem_next[i] = i & (~(1 << j));
187: }
188: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 189: int j;
1.1 root 190: for (j = 7 ; j >= 0 ; j--) {
191: if (i & (1 << j)) break;
192: }
1.1.1.8 root 193: fpp_movem_index1[i] = 7-j;
194: fpp_movem_index2[i] = j;
1.1 root 195: fpp_movem_next[i] = i & (~(1 << j));
196: }
197: #if COUNT_INSTRS
198: {
1.1.1.4 root 199: FILE *f = fopen (icountfilename (), "r");
200: memset (instrcount, 0, sizeof instrcount);
1.1 root 201: if (f) {
1.1.1.3 root 202: uae_u32 opcode, count, total;
1.1 root 203: char name[20];
1.1.1.3 root 204: write_log ("Reading instruction count file...\n");
1.1.1.4 root 205: fscanf (f, "Total: %lu\n", &total);
206: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 207: instrcount[opcode] = count;
208: }
209: fclose(f);
210: }
211: }
212: #endif
1.1.1.5 root 213: write_log ("Building CPU table for configuration: 68");
214: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
215: write_log ("EC");
216: switch (currprefs.cpu_level) {
1.1.1.12! root 217: case 1:
1.1.1.5 root 218: write_log ("010");
219: break;
1.1.1.12! root 220: case 2:
1.1.1.5 root 221: write_log ("020");
222: break;
1.1.1.12! root 223: case 3:
1.1.1.5 root 224: write_log ("020/881");
225: break;
1.1.1.12! root 226: case 4:
! 227: /* Who is going to miss the MMU anyway...? :-) */
! 228: write_log ("040");
! 229: break;
! 230: default:
1.1.1.5 root 231: write_log ("000");
232: break;
233: }
234: if (currprefs.cpu_compatible)
235: write_log (" (compatible mode)");
236: write_log ("\n");
237:
1.1 root 238: read_table68k ();
239: do_merges ();
1.1.1.2 root 240:
1.1.1.4 root 241: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 242:
1.1.1.3 root 243: build_cpufunctbl ();
244: }
1.1.1.4 root 245:
1.1 root 246: struct regstruct regs, lastint_regs;
247: static struct regstruct regs_backup[16];
248: static int backup_pointer = 0;
1.1.1.3 root 249: static long int m68kpc_offset;
1.1 root 250: int lastint_no;
251:
1.1.1.3 root 252: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
253: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
254: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
255:
1.1.1.11 root 256: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 257: {
258: uae_u16 dp;
259: uae_s8 disp8;
260: uae_s16 disp16;
1.1 root 261: int r;
1.1.1.3 root 262: uae_u32 dispreg;
263: uaecptr addr;
264: uae_s32 offset = 0;
1.1.1.2 root 265: char buffer[80];
1.1.1.3 root 266:
267: switch (mode){
1.1 root 268: case Dreg:
1.1.1.3 root 269: sprintf (buffer,"D%d", reg);
1.1 root 270: break;
271: case Areg:
1.1.1.3 root 272: sprintf (buffer,"A%d", reg);
1.1 root 273: break;
274: case Aind:
1.1.1.3 root 275: sprintf (buffer,"(A%d)", reg);
1.1 root 276: break;
277: case Aipi:
1.1.1.3 root 278: sprintf (buffer,"(A%d)+", reg);
1.1 root 279: break;
280: case Apdi:
1.1.1.3 root 281: sprintf (buffer,"-(A%d)", reg);
1.1 root 282: break;
283: case Ad16:
1.1.1.4 root 284: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 285: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
286: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1.1.8 root 287: (unsigned long)addr);
1.1 root 288: break;
289: case Ad8r:
1.1.1.4 root 290: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 291: disp8 = dp & 0xFF;
292: r = (dp & 0x7000) >> 12;
1.1.1.3 root 293: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
294: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 295: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 296:
1.1 root 297: if (dp & 0x100) {
1.1.1.3 root 298: uae_s32 outer = 0, disp = 0;
299: uae_s32 base = m68k_areg(regs,reg);
300: char name[10];
301: sprintf (name,"A%d, ",reg);
302: if (dp & 0x80) { base = 0; name[0] = 0; }
303: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 304: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
305: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 306: base += disp;
307:
1.1.1.4 root 308: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
309: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 310:
311: if (!(dp & 4)) base += dispreg;
312: if (dp & 3) base = get_long (base);
313: if (dp & 4) base += dispreg;
314:
315: addr = base + outer;
316: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
317: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
318: 1 << ((dp >> 9) & 3),
319: disp,outer,
1.1.1.8 root 320: (unsigned long)addr);
1.1.1.3 root 321: } else {
322: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
323: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 324: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
325: 1 << ((dp >> 9) & 3), disp8,
1.1.1.8 root 326: (unsigned long)addr);
1.1 root 327: }
328: break;
329: case PC16:
1.1.1.4 root 330: addr = m68k_getpc () + m68kpc_offset;
331: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 332: addr += (uae_s16)disp16;
1.1.1.8 root 333: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
1.1 root 334: break;
335: case PC8r:
1.1.1.4 root 336: addr = m68k_getpc () + m68kpc_offset;
337: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 338: disp8 = dp & 0xFF;
339: r = (dp & 0x7000) >> 12;
1.1.1.2 root 340: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 341: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 342: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 343:
1.1 root 344: if (dp & 0x100) {
1.1.1.3 root 345: uae_s32 outer = 0,disp = 0;
346: uae_s32 base = addr;
347: char name[10];
348: sprintf (name,"PC, ");
349: if (dp & 0x80) { base = 0; name[0] = 0; }
350: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 351: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
352: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 353: base += disp;
354:
1.1.1.4 root 355: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
356: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 357:
358: if (!(dp & 4)) base += dispreg;
359: if (dp & 3) base = get_long (base);
360: if (dp & 4) base += dispreg;
361:
362: addr = base + outer;
363: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
364: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
365: 1 << ((dp >> 9) & 3),
366: disp,outer,
1.1.1.8 root 367: (unsigned long)addr);
1.1.1.2 root 368: } else {
1.1.1.3 root 369: addr += (uae_s32)((uae_s8)disp8) + dispreg;
370: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 371: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
1.1.1.8 root 372: disp8, (unsigned long)addr);
1.1 root 373: }
374: break;
375: case absw:
1.1.1.8 root 376: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 377: m68kpc_offset += 2;
1.1 root 378: break;
379: case absl:
1.1.1.8 root 380: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 381: m68kpc_offset += 4;
1.1 root 382: break;
383: case imm:
1.1.1.3 root 384: switch (size){
1.1 root 385: case sz_byte:
1.1.1.4 root 386: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 387: m68kpc_offset += 2;
388: break;
1.1 root 389: case sz_word:
1.1.1.4 root 390: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 391: m68kpc_offset += 2;
392: break;
1.1 root 393: case sz_long:
1.1.1.8 root 394: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 395: m68kpc_offset += 4;
396: break;
1.1 root 397: default:
398: break;
399: }
400: break;
401: case imm0:
1.1.1.4 root 402: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 403: m68kpc_offset += 2;
404: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 405: break;
406: case imm1:
1.1.1.4 root 407: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 408: m68kpc_offset += 2;
409: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 410: break;
411: case imm2:
1.1.1.4 root 412: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 413: m68kpc_offset += 4;
1.1.1.8 root 414: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 415: break;
416: case immi:
1.1.1.3 root 417: offset = (uae_s32)(uae_s8)(reg & 0xff);
1.1.1.8 root 418: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 419: break;
420: default:
421: break;
422: }
1.1.1.2 root 423: if (buf == 0)
1.1.1.11 root 424: fprintf (f, "%s", buffer);
1.1.1.2 root 425: else
1.1.1.4 root 426: strcat (buf, buffer);
1.1.1.2 root 427: return offset;
1.1 root 428: }
429:
1.1.1.3 root 430: /* The plan is that this will take over the job of exception 3 handling -
431: * the CPU emulation functions will just do a longjmp to m68k_go whenever
432: * they hit an odd address. */
1.1.1.4 root 433: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 434: {
435: uae_u16 dp;
436: uae_s8 disp8;
437: uae_s16 disp16;
438: int r;
439: uae_u32 dispreg;
440: uaecptr addr;
441: uae_s32 offset = 0;
442:
443: switch (mode){
444: case Dreg:
445: *val = m68k_dreg (regs, reg);
446: return 1;
447: case Areg:
448: *val = m68k_areg (regs, reg);
449: return 1;
450:
451: case Aind:
452: case Aipi:
453: addr = m68k_areg (regs, reg);
454: break;
455: case Apdi:
456: addr = m68k_areg (regs, reg);
457: break;
458: case Ad16:
1.1.1.4 root 459: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 460: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
461: break;
462: case Ad8r:
463: addr = m68k_areg (regs, reg);
464: d8r_common:
1.1.1.4 root 465: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 466: disp8 = dp & 0xFF;
467: r = (dp & 0x7000) >> 12;
468: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
469: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
470: dispreg <<= (dp >> 9) & 3;
471:
472: if (dp & 0x100) {
473: uae_s32 outer = 0, disp = 0;
474: uae_s32 base = addr;
475: if (dp & 0x80) base = 0;
476: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 477: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
478: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 479: base += disp;
480:
1.1.1.4 root 481: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
482: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 483:
484: if (!(dp & 4)) base += dispreg;
485: if (dp & 3) base = get_long (base);
486: if (dp & 4) base += dispreg;
487:
488: addr = base + outer;
489: } else {
490: addr += (uae_s32)((uae_s8)disp8) + dispreg;
491: }
492: break;
493: case PC16:
1.1.1.4 root 494: addr = m68k_getpc () + m68kpc_offset;
495: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 496: addr += (uae_s16)disp16;
497: break;
498: case PC8r:
1.1.1.4 root 499: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 500: goto d8r_common;
501: case absw:
1.1.1.4 root 502: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 503: m68kpc_offset += 2;
504: break;
505: case absl:
1.1.1.4 root 506: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 507: m68kpc_offset += 4;
508: break;
509: case imm:
510: switch (size){
511: case sz_byte:
1.1.1.4 root 512: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 513: m68kpc_offset += 2;
514: break;
515: case sz_word:
1.1.1.4 root 516: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 517: m68kpc_offset += 2;
518: break;
519: case sz_long:
1.1.1.4 root 520: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 521: m68kpc_offset += 4;
522: break;
523: default:
524: break;
525: }
526: return 1;
527: case imm0:
528: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
529: m68kpc_offset += 2;
530: return 1;
531: case imm1:
532: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
533: m68kpc_offset += 2;
534: return 1;
535: case imm2:
536: *val = get_ilong_1 (m68kpc_offset);
537: m68kpc_offset += 4;
538: return 1;
539: case immi:
540: *val = (uae_s32)(uae_s8)(reg & 0xff);
541: return 1;
542: default:
543: addr = 0;
544: break;
545: }
546: if ((addr & 1) == 0)
547: return 1;
548:
1.1.1.4 root 549: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 550: last_fault_for_exception_3 = addr;
551: return 0;
552: }
553:
1.1.1.5 root 554: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
555: {
556: int reg = (dp >> 12) & 15;
557: uae_s32 regd = regs.regs[reg];
558: if ((dp & 0x800) == 0)
559: regd = (uae_s32)(uae_s16)regd;
560: regd <<= (dp >> 9) & 3;
561: if (dp & 0x100) {
562: uae_s32 outer = 0;
563: if (dp & 0x80) base = 0;
564: if (dp & 0x40) regd = 0;
565:
566: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
567: if ((dp & 0x30) == 0x30) base += next_ilong();
568:
569: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
570: if ((dp & 0x3) == 0x3) outer = next_ilong();
571:
572: if ((dp & 0x4) == 0) base += regd;
573: if (dp & 0x3) base = get_long (base);
574: if (dp & 0x4) base += regd;
575:
576: return base + outer;
577: } else {
578: return base + (uae_s32)((uae_s8)dp) + regd;
579: }
580: }
581:
582: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
583: {
584: int reg = (dp >> 12) & 15;
585: uae_s32 regd = regs.regs[reg];
586: #if 1
587: if ((dp & 0x800) == 0)
588: regd = (uae_s32)(uae_s16)regd;
589: return base + (uae_s8)dp + regd;
590: #else
591: /* Branch-free code... benchmark this again now that
592: * things are no longer inline. */
593: uae_s32 regd16;
594: uae_u32 mask;
595: mask = ((dp & 0x800) >> 11) - 1;
596: regd16 = (uae_s32)(uae_s16)regd;
597: regd16 &= mask;
598: mask = ~mask;
599: base += (uae_s8)dp;
600: regd &= mask;
601: regd |= regd16;
602: return base + regd;
603: #endif
604: }
605:
1.1.1.4 root 606: void MakeSR (void)
1.1 root 607: {
608: #if 0
609: assert((regs.t1 & 1) == regs.t1);
610: assert((regs.t0 & 1) == regs.t0);
611: assert((regs.s & 1) == regs.s);
612: assert((regs.m & 1) == regs.m);
613: assert((XFLG & 1) == XFLG);
614: assert((NFLG & 1) == NFLG);
615: assert((ZFLG & 1) == ZFLG);
616: assert((VFLG & 1) == VFLG);
617: assert((CFLG & 1) == CFLG);
618: #endif
619: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
620: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 root 621: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
622: | GET_CFLG);
1.1 root 623: }
624:
1.1.1.4 root 625: void MakeFromSR (void)
1.1 root 626: {
627: int oldm = regs.m;
628: int olds = regs.s;
629:
630: regs.t1 = (regs.sr >> 15) & 1;
631: regs.t0 = (regs.sr >> 14) & 1;
632: regs.s = (regs.sr >> 13) & 1;
633: regs.m = (regs.sr >> 12) & 1;
634: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 root 635: SET_XFLG ((regs.sr >> 4) & 1);
636: SET_NFLG ((regs.sr >> 3) & 1);
637: SET_ZFLG ((regs.sr >> 2) & 1);
638: SET_VFLG ((regs.sr >> 1) & 1);
639: SET_CFLG (regs.sr & 1);
1.1.1.3 root 640: if (currprefs.cpu_level >= 2) {
1.1 root 641: if (olds != regs.s) {
1.1.1.3 root 642: if (olds) {
643: if (oldm)
644: regs.msp = m68k_areg(regs, 7);
645: else
646: regs.isp = m68k_areg(regs, 7);
647: m68k_areg(regs, 7) = regs.usp;
648: } else {
649: regs.usp = m68k_areg(regs, 7);
650: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
651: }
1.1 root 652: } else if (olds && oldm != regs.m) {
653: if (oldm) {
1.1.1.2 root 654: regs.msp = m68k_areg(regs, 7);
655: m68k_areg(regs, 7) = regs.isp;
656: } else {
657: regs.isp = m68k_areg(regs, 7);
658: m68k_areg(regs, 7) = regs.msp;
1.1 root 659: }
660: }
661: } else {
662: if (olds != regs.s) {
1.1.1.3 root 663: if (olds) {
664: regs.isp = m68k_areg(regs, 7);
665: m68k_areg(regs, 7) = regs.usp;
666: } else {
667: regs.usp = m68k_areg(regs, 7);
668: m68k_areg(regs, 7) = regs.isp;
669: }
670: }
1.1 root 671: }
1.1.1.3 root 672:
1.1.1.12! root 673: set_special (SPCFLAG_INT);
1.1 root 674: if (regs.t1 || regs.t0)
1.1.1.12! root 675: set_special (SPCFLAG_TRACE);
1.1 root 676: else
1.1.1.12! root 677: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 678: }
679:
1.1.1.3 root 680: void Exception(int nr, uaecptr oldpc)
1.1 root 681: {
1.1.1.12! root 682: uae_u32 currpc = m68k_getpc ();
! 683:
1.1.1.2 root 684: compiler_flush_jsr_stack();
1.1 root 685: MakeSR();
1.1.1.12! root 686:
1.1 root 687: if (!regs.s) {
1.1.1.2 root 688: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 689: if (currprefs.cpu_level >= 2)
690: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
691: else
692: m68k_areg(regs, 7) = regs.isp;
1.1 root 693: regs.s = 1;
694: }
1.1.1.3 root 695: if (currprefs.cpu_level > 0) {
1.1 root 696: if (nr == 2 || nr == 3) {
697: int i;
1.1.1.3 root 698: /* @@@ this is probably wrong (?) */
1.1 root 699: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 700: m68k_areg(regs, 7) -= 2;
701: put_word (m68k_areg(regs, 7), 0);
1.1 root 702: }
1.1.1.2 root 703: m68k_areg(regs, 7) -= 2;
704: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 705: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 706: m68k_areg(regs, 7) -= 4;
707: put_long (m68k_areg(regs, 7), oldpc);
708: m68k_areg(regs, 7) -= 2;
709: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
710: } else if (regs.m && nr >= 24 && nr < 32) {
711: m68k_areg(regs, 7) -= 2;
712: put_word (m68k_areg(regs, 7), nr * 4);
713: m68k_areg(regs, 7) -= 4;
1.1.1.12! root 714: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 715: m68k_areg(regs, 7) -= 2;
716: put_word (m68k_areg(regs, 7), regs.sr);
717: regs.sr |= (1 << 13);
718: regs.msp = m68k_areg(regs, 7);
719: m68k_areg(regs, 7) = regs.isp;
720: m68k_areg(regs, 7) -= 2;
721: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
722: } else {
723: m68k_areg(regs, 7) -= 2;
724: put_word (m68k_areg(regs, 7), nr * 4);
725: }
726: } else {
727: if (nr == 2 || nr == 3) {
728: m68k_areg(regs, 7) -= 12;
729: /* ??????? */
730: if (nr == 3) {
731: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
732: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
733: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
734: }
735: write_log ("Exception!\n");
736: goto kludge_me_do;
737: }
1.1 root 738: }
1.1.1.2 root 739: m68k_areg(regs, 7) -= 4;
1.1.1.12! root 740: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 741: kludge_me_do:
1.1.1.2 root 742: m68k_areg(regs, 7) -= 2;
743: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 744: m68k_setpc (get_long (regs.vbr + 4*nr));
745: fill_prefetch_0 ();
1.1 root 746: regs.t1 = regs.t0 = regs.m = 0;
1.1.1.12! root 747: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 748: }
749:
750: static void Interrupt(int nr)
751: {
752: assert(nr < 8 && nr >= 0);
753: lastint_regs = regs;
754: lastint_no = nr;
755: Exception(nr+24, 0);
1.1.1.3 root 756:
1.1 root 757: regs.intmask = nr;
1.1.1.12! root 758: set_special (SPCFLAG_INT);
1.1 root 759: }
760:
1.1.1.12! root 761: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr;
1.1 root 762:
1.1.1.9 root 763: int m68k_move2c (int regno, uae_u32 *regp)
1.1 root 764: {
1.1.1.12! root 765: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
! 766: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
! 767: || (currprefs.cpu_level == 4 && regno == 0x802))
! 768: {
1.1 root 769: op_illg (0x4E7B);
1.1.1.9 root 770: return 0;
1.1.1.12! root 771: } else {
1.1 root 772: switch (regno) {
1.1.1.12! root 773: case 0: regs.sfc = *regp & 7; break;
! 774: case 1: regs.dfc = *regp & 7; break;
! 775: case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break;
! 776: case 3: tc = *regp & 0xc000; break;
! 777: /* Mask out fields that should be zero. */
! 778: case 4: itt0 = *regp & 0xffffe364; break;
! 779: case 5: itt1 = *regp & 0xffffe364; break;
! 780: case 6: dtt0 = *regp & 0xffffe364; break;
! 781: case 7: dtt1 = *regp & 0xffffe364; break;
! 782:
! 783: case 0x800: regs.usp = *regp; break;
! 784: case 0x801: regs.vbr = *regp; break;
! 785: case 0x802: caar = *regp & 0xfc; break;
! 786: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
! 787: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
! 788: default:
1.1 root 789: op_illg (0x4E7B);
1.1.1.9 root 790: return 0;
1.1 root 791: }
1.1.1.12! root 792: }
1.1.1.9 root 793: return 1;
1.1 root 794: }
795:
1.1.1.9 root 796: int m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 797: {
1.1.1.12! root 798: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
! 799: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
! 800: || (currprefs.cpu_level == 4 && regno == 0x802))
! 801: {
1.1 root 802: op_illg (0x4E7A);
1.1.1.9 root 803: return 0;
1.1.1.12! root 804: } else {
1.1 root 805: switch (regno) {
1.1.1.12! root 806: case 0: *regp = regs.sfc; break;
! 807: case 1: *regp = regs.dfc; break;
! 808: case 2: *regp = cacr; break;
! 809: case 3: *regp = tc; break;
! 810: case 4: *regp = itt0; break;
! 811: case 5: *regp = itt1; break;
! 812: case 6: *regp = dtt0; break;
! 813: case 7: *regp = dtt1; break;
! 814: case 0x800: *regp = regs.usp; break;
! 815: case 0x801: *regp = regs.vbr; break;
! 816: case 0x802: *regp = caar; break;
! 817: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
! 818: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
! 819: case 0x805: *regp = mmusr; break;
! 820: default:
1.1 root 821: op_illg (0x4E7A);
1.1.1.9 root 822: return 0;
1.1 root 823: }
1.1.1.12! root 824: }
1.1.1.9 root 825: return 1;
1.1 root 826: }
827:
1.1.1.8 root 828: STATIC_INLINE int
1.1.1.3 root 829: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 830: {
1.1.1.3 root 831: uae_u32 q = 0, cbit = 0;
1.1 root 832: int i;
833:
834: if (div <= src_hi) {
1.1.1.4 root 835: return 1;
1.1 root 836: }
837: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 838: cbit = src_hi & 0x80000000ul;
1.1 root 839: src_hi <<= 1;
1.1.1.2 root 840: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 841: src_lo <<= 1;
842: q = q << 1;
843: if (cbit || div <= src_hi) {
844: q |= 1;
845: src_hi -= div;
846: }
847: }
848: *quot = q;
849: *rem = src_hi;
1.1.1.4 root 850: return 0;
1.1 root 851: }
852:
1.1.1.3 root 853: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 854: {
1.1.1.3 root 855: #if defined(uae_s64)
1.1 root 856: if (src == 0) {
1.1.1.4 root 857: Exception (5, oldpc);
1.1 root 858: return;
859: }
860: if (extra & 0x800) {
861: /* signed variant */
1.1.1.3 root 862: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
863: uae_s64 quot, rem;
864:
1.1 root 865: if (extra & 0x400) {
1.1.1.3 root 866: a &= 0xffffffffu;
867: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 868: }
1.1.1.3 root 869: rem = a % (uae_s64)(uae_s32)src;
870: quot = a / (uae_s64)(uae_s32)src;
871: if ((quot & UVAL64(0xffffffff80000000)) != 0
872: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
873: {
1.1.1.6 root 874: SET_VFLG (1);
875: SET_NFLG (1);
876: SET_CFLG (0);
1.1.1.4 root 877: } else {
1.1.1.3 root 878: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 root 879: SET_VFLG (0);
880: SET_CFLG (0);
881: SET_ZFLG (((uae_s32)quot) == 0);
882: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 883: m68k_dreg(regs, extra & 7) = rem;
884: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 885: }
886: } else {
887: /* unsigned */
1.1.1.3 root 888: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
889: uae_u64 quot, rem;
890:
1.1 root 891: if (extra & 0x400) {
1.1.1.3 root 892: a &= 0xffffffffu;
893: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 894: }
1.1.1.3 root 895: rem = a % (uae_u64)src;
896: quot = a / (uae_u64)src;
897: if (quot > 0xffffffffu) {
1.1.1.6 root 898: SET_VFLG (1);
899: SET_NFLG (1);
900: SET_CFLG (0);
1.1.1.4 root 901: } else {
1.1.1.6 root 902: SET_VFLG (0);
903: SET_CFLG (0);
904: SET_ZFLG (((uae_s32)quot) == 0);
905: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 906: m68k_dreg(regs, extra & 7) = rem;
907: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 908: }
909: }
910: #else
911: if (src == 0) {
1.1.1.4 root 912: Exception (5, oldpc);
1.1 root 913: return;
914: }
915: if (extra & 0x800) {
916: /* signed variant */
1.1.1.3 root 917: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
918: uae_s32 hi = lo < 0 ? -1 : 0;
919: uae_s32 save_high;
920: uae_u32 quot, rem;
921: uae_u32 sign;
922:
1.1 root 923: if (extra & 0x400) {
1.1.1.3 root 924: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 925: }
926: save_high = hi;
927: sign = (hi ^ src);
928: if (hi < 0) {
1.1.1.4 root 929: hi = ~hi;
930: lo = -lo;
931: if (lo == 0) hi++;
1.1 root 932: }
1.1.1.3 root 933: if ((uae_s32)src < 0) src = -src;
1.1 root 934: if (div_unsigned(hi, lo, src, ", &rem) ||
935: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 root 936: SET_VFLG (1);
937: SET_NFLG (1);
938: SET_CFLG (0);
1.1.1.4 root 939: } else {
1.1 root 940: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 941: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 root 942: SET_VFLG (0);
943: SET_CFLG (0);
944: SET_ZFLG (((uae_s32)quot) == 0);
945: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 946: m68k_dreg(regs, extra & 7) = rem;
947: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 948: }
949: } else {
950: /* unsigned */
1.1.1.3 root 951: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
952: uae_u32 hi = 0;
953: uae_u32 quot, rem;
954:
1.1 root 955: if (extra & 0x400) {
1.1.1.3 root 956: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 957: }
958: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 root 959: SET_VFLG (1);
960: SET_NFLG (1);
961: SET_CFLG (0);
1.1.1.4 root 962: } else {
1.1.1.6 root 963: SET_VFLG (0);
964: SET_CFLG (0);
965: SET_ZFLG (((uae_s32)quot) == 0);
966: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 967: m68k_dreg(regs, extra & 7) = rem;
968: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 969: }
970: }
971: #endif
972: }
973:
1.1.1.8 root 974: STATIC_INLINE void
1.1.1.3 root 975: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 976: {
1.1.1.3 root 977: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
978: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
979: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
980: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
981: uae_u32 lo;
982:
983: lo = r0 + ((r1 << 16) & 0xffff0000ul);
984: if (lo < r0) r3++;
985: r0 = lo;
986: lo = r0 + ((r2 << 16) & 0xffff0000ul);
987: if (lo < r0) r3++;
988: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 989: *dst_lo = lo;
990: *dst_hi = r3;
991: }
992:
1.1.1.3 root 993: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 994: {
1.1.1.3 root 995: #if defined(uae_s64)
1.1 root 996: if (extra & 0x800) {
997: /* signed variant */
1.1.1.3 root 998: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 999:
1.1.1.3 root 1000: a *= (uae_s64)(uae_s32)src;
1.1.1.6 root 1001: SET_VFLG (0);
1002: SET_CFLG (0);
1003: SET_ZFLG (a == 0);
1004: SET_NFLG (a < 0);
1.1 root 1005: if (extra & 0x400)
1.1.1.2 root 1006: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1007: else if ((a & UVAL64(0xffffffff80000000)) != 0
1008: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1009: {
1.1.1.6 root 1010: SET_VFLG (1);
1.1 root 1011: }
1.1.1.3 root 1012: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1013: } else {
1014: /* unsigned */
1.1.1.3 root 1015: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1016:
1017: a *= (uae_u64)src;
1.1.1.6 root 1018: SET_VFLG (0);
1019: SET_CFLG (0);
1020: SET_ZFLG (a == 0);
1021: SET_NFLG (((uae_s64)a) < 0);
1.1 root 1022: if (extra & 0x400)
1.1.1.2 root 1023: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1024: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 root 1025: SET_VFLG (1);
1.1 root 1026: }
1.1.1.3 root 1027: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1028: }
1029: #else
1030: if (extra & 0x800) {
1031: /* signed variant */
1.1.1.3 root 1032: uae_s32 src1,src2;
1033: uae_u32 dst_lo,dst_hi;
1034: uae_u32 sign;
1.1 root 1035:
1.1.1.3 root 1036: src1 = (uae_s32)src;
1037: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1038: sign = (src1 ^ src2);
1039: if (src1 < 0) src1 = -src1;
1040: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1041: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1042: if (sign & 0x80000000) {
1043: dst_hi = ~dst_hi;
1044: dst_lo = -dst_lo;
1045: if (dst_lo == 0) dst_hi++;
1046: }
1.1.1.6 root 1047: SET_VFLG (0);
1048: SET_CFLG (0);
1049: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1050: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1051: if (extra & 0x400)
1.1.1.2 root 1052: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1053: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1054: && ((dst_hi & 0xffffffff) != 0xffffffff
1055: || (dst_lo & 0x80000000) != 0x80000000))
1056: {
1.1.1.6 root 1057: SET_VFLG (1);
1.1 root 1058: }
1.1.1.2 root 1059: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1060: } else {
1061: /* unsigned */
1.1.1.3 root 1062: uae_u32 dst_lo,dst_hi;
1063:
1064: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1065:
1.1.1.6 root 1066: SET_VFLG (0);
1067: SET_CFLG (0);
1068: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1069: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1070: if (extra & 0x400)
1.1.1.2 root 1071: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1072: else if (dst_hi != 0) {
1.1.1.6 root 1073: SET_VFLG (1);
1.1 root 1074: }
1.1.1.2 root 1075: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1076: }
1077: #endif
1078: }
1079: static char* ccnames[] =
1080: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1081: "VC","VS","PL","MI","GE","LT","GT","LE" };
1082:
1.1.1.4 root 1083: void m68k_reset (void)
1.1 root 1084: {
1.1.1.3 root 1085: m68k_areg (regs, 7) = get_long (0x00f80000);
1086: m68k_setpc (get_long (0x00f80004));
1087: fill_prefetch_0 ();
1.1.1.2 root 1088: regs.kick_mask = 0xF80000;
1.1 root 1089: regs.s = 1;
1090: regs.m = 0;
1091: regs.stopped = 0;
1092: regs.t1 = 0;
1093: regs.t0 = 0;
1.1.1.6 root 1094: SET_ZFLG (0);
1095: SET_XFLG (0);
1096: SET_CFLG (0);
1097: SET_VFLG (0);
1098: SET_NFLG (0);
1.1 root 1099: regs.spcflags = 0;
1100: regs.intmask = 7;
1101: regs.vbr = regs.sfc = regs.dfc = 0;
1102: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1103: }
1104:
1.1.1.4 root 1105: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1106: {
1.1.1.3 root 1107: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1108:
1.1.1.3 root 1109: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1110: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1111: m68k_incpc (2);
1112: fill_prefetch_0 ();
1.1.1.4 root 1113: return 4;
1.1.1.3 root 1114: }
1115:
1116: compiler_flush_jsr_stack ();
1117: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1118: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1119: broken_in = 1;
1.1.1.12! root 1120: set_special (SPCFLAG_BRK);
1.1 root 1121: quit_program = 1;
1122: }
1.1.1.2 root 1123: if (opcode == 0xFF0D) {
1.1.1.3 root 1124: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1125: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1126: uae_u16 arg = get_iword (2);
1127: m68k_incpc (4);
1128: ersatz_perform (arg);
1129: fill_prefetch_0 ();
1.1.1.4 root 1130: return 4;
1.1.1.3 root 1131: } else if ((pc & 0xF80000) == 0xF00000) {
1.1.1.2 root 1132: /* User-mode STOP replacement */
1.1.1.3 root 1133: m68k_setstopped (1);
1.1.1.4 root 1134: return 4;
1.1.1.2 root 1135: }
1.1 root 1136: }
1.1.1.3 root 1137:
1138: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1139: /* Calltrap. */
1140: m68k_incpc(2);
1141: call_calltrap (opcode & 0xFFF);
1142: fill_prefetch_0 ();
1.1.1.4 root 1143: return 4;
1.1.1.3 root 1144: }
1145:
1.1 root 1146: if ((opcode & 0xF000) == 0xF000) {
1147: Exception(0xB,0);
1.1.1.4 root 1148: return 4;
1.1 root 1149: }
1150: if ((opcode & 0xF000) == 0xA000) {
1.1.1.3 root 1151: if ((pc & 0xF80000) == 0xF00000) {
1152: /* Calltrap. */
1153: call_calltrap (opcode & 0xFFF);
1154: }
1155: Exception(0xA,0);
1.1.1.4 root 1156: return 4;
1.1 root 1157: }
1.1.1.12! root 1158: #if 1
1.1.1.4 root 1159: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.10 root 1160: #endif
1.1.1.3 root 1161: Exception (4,0);
1.1.1.4 root 1162: return 4;
1.1 root 1163: }
1164:
1.1.1.3 root 1165: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1166: {
1.1.1.12! root 1167: if ((opcode & 0xFE0) == 0x0500) {
! 1168: /* PFLUSH */
! 1169: mmusr = 0;
! 1170: write_log ("PFLUSH\n");
! 1171: } else if ((opcode & 0x0FD8) == 0x548) {
! 1172: /* PTEST */
! 1173: write_log ("PTEST\n");
1.1 root 1174: } else
1.1.1.3 root 1175: op_illg (opcode);
1.1 root 1176: }
1177:
1.1.1.4 root 1178: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1179:
1.1.1.3 root 1180: static uaecptr last_trace_ad = 0;
1.1 root 1181:
1.1.1.7 root 1182: static void do_trace (void)
1.1 root 1183: {
1.1.1.11 root 1184: if (regs.t0 && currprefs.cpu_level >= 2) {
1.1.1.7 root 1185: uae_u16 opcode;
1186: /* should also include TRAP, CHK, SR modification FPcc */
1187: /* probably never used so why bother */
1188: /* We can afford this to be inefficient... */
1189: m68k_setpc (m68k_getpc ());
1190: fill_prefetch_0 ();
1191: opcode = get_word (regs.pc);
1192: if (opcode == 0x4e72 /* RTE */
1193: || opcode == 0x4e74 /* RTD */
1194: || opcode == 0x4e75 /* RTS */
1195: || opcode == 0x4e77 /* RTR */
1196: || opcode == 0x4e76 /* TRAPV */
1197: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1198: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1199: || (opcode & 0xff00) == 0x6100 /* BSR */
1200: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1201: && cctrue((opcode >> 8) & 0xf))
1202: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1203: && !cctrue((opcode >> 8) & 0xf)
1204: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1205: {
1.1.1.4 root 1206: last_trace_ad = m68k_getpc ();
1.1.1.12! root 1207: unset_special (SPCFLAG_TRACE);
! 1208: set_special (SPCFLAG_DOTRACE);
1.1 root 1209: }
1.1.1.7 root 1210: } else if (regs.t1) {
1211: last_trace_ad = m68k_getpc ();
1.1.1.12! root 1212: unset_special (SPCFLAG_TRACE);
! 1213: set_special (SPCFLAG_DOTRACE);
1.1 root 1214: }
1215: }
1216:
1.1.1.7 root 1217:
1.1.1.3 root 1218: static int do_specialties (void)
1.1 root 1219: {
1.1.1.9 root 1220: if (regs.spcflags & SPCFLAG_COPPER)
1221: do_copper ();
1222:
1.1.1.3 root 1223: /*n_spcinsns++;*/
1224: while (regs.spcflags & SPCFLAG_BLTNASTY) {
1.1.1.4 root 1225: do_cycles (4);
1.1.1.9 root 1226: if (regs.spcflags & SPCFLAG_COPPER)
1227: do_copper ();
1.1.1.3 root 1228: }
1.1.1.9 root 1229:
1.1.1.3 root 1230: run_compiled_code();
1231: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1232: Exception (9,last_trace_ad);
1.1.1.3 root 1233: }
1234: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.4 root 1235: do_cycles (4);
1.1.1.9 root 1236: if (regs.spcflags & SPCFLAG_COPPER)
1237: do_copper ();
1.1.1.3 root 1238: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1239: int intr = intlev ();
1.1.1.12! root 1240: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1241: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1242: Interrupt (intr);
1.1.1.3 root 1243: regs.stopped = 0;
1.1.1.12! root 1244: unset_special (SPCFLAG_STOP);
1.1.1.2 root 1245: }
1.1.1.3 root 1246: }
1247: }
1.1.1.7 root 1248: if (regs.spcflags & SPCFLAG_TRACE)
1249: do_trace ();
1.1.1.4 root 1250:
1.1.1.3 root 1251: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1252: int intr = intlev ();
1.1.1.12! root 1253: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1254: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1255: Interrupt (intr);
1.1.1.3 root 1256: regs.stopped = 0;
1257: }
1258: }
1259: if (regs.spcflags & SPCFLAG_INT) {
1.1.1.12! root 1260: unset_special (SPCFLAG_INT);
! 1261: set_special (SPCFLAG_DOINT);
1.1.1.3 root 1262: }
1.1.1.4 root 1263: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1.1.1.12! root 1264: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1265: return 1;
1.1.1.2 root 1266: }
1.1.1.3 root 1267: return 0;
1.1.1.2 root 1268: }
1269:
1.1.1.8 root 1270: /* It's really sad to have two almost identical functions for this, but we
1271: do it all for performance... :( */
1.1.1.4 root 1272: static void m68k_run_1 (void)
1.1.1.2 root 1273: {
1.1.1.12! root 1274: #ifdef DEBUG_PREFETCH
! 1275: uae_u8 saved_bytes[20];
! 1276: uae_u16 *oldpcp;
! 1277: #endif
1.1.1.3 root 1278: for (;;) {
1.1.1.4 root 1279: int cycles;
1.1.1.8 root 1280: uae_u32 opcode = get_iword_prefetch (0);
1.1.1.12! root 1281: #ifdef DEBUG_PREFETCH
1.1.1.8 root 1282: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1.1.1.12! root 1283: fprintf (stderr, "Prefetch differs from memory.\n");
1.1.1.8 root 1284: debugging = 1;
1285: return;
1286: }
1.1.1.12! root 1287: oldpcp = regs.pc_p;
! 1288: memcpy (saved_bytes, regs.pc_p, 20);
1.1.1.8 root 1289: #endif
1290: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1291: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1292: #if COUNT_INSTRS == 2
1293: if (table68k[opcode].handler != -1)
1294: instrcount[table68k[opcode].handler]++;
1295: #elif COUNT_INSTRS == 1
1296: instrcount[opcode]++;
1297: #endif
1298: #if defined X86_ASSEMBLY
1299: __asm__ __volatile__("\tcall *%%ebx"
1300: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1301: : "%edx", "%ecx",
1302: "%esi", "%edi", "%ebp", "memory", "cc");
1303: #else
1304: cycles = (*cpufunctbl[opcode])(opcode);
1305: #endif
1.1.1.12! root 1306: #ifdef DEBUG_PREFETCH
! 1307: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
! 1308: fprintf (stderr, "Self-modifying code detected.\n");
! 1309: set_special (SPCFLAG_BRK);
! 1310: debugging = 1;
! 1311: }
! 1312: #endif
1.1.1.8 root 1313: /*n_insns++;*/
1314: cycles &= cycles_mask;
1315: cycles |= cycles_val;
1316: do_cycles (cycles);
1317: if (regs.spcflags) {
1318: if (do_specialties ())
1319: return;
1320: }
1321: }
1322: }
1323:
1.1.1.12! root 1324: #define DEBUG_PREFETCH
! 1325:
1.1.1.8 root 1326: /* Same thing, but don't use prefetch to get opcode. */
1327: static void m68k_run_2 (void)
1328: {
1329: for (;;) {
1330: int cycles;
1331: uae_u32 opcode = get_iword (0);
1.1.1.12! root 1332:
1.1.1.2 root 1333: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1334: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1335: #if COUNT_INSTRS == 2
1.1.1.8 root 1336: if (table68k[opcode].handler != -1)
1337: instrcount[table68k[opcode].handler]++;
1.1.1.3 root 1338: #elif COUNT_INSTRS == 1
1.1.1.2 root 1339: instrcount[opcode]++;
1340: #endif
1.1.1.8 root 1341: #if defined X86_ASSEMBLY
1.1.1.3 root 1342: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1343: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1344: : "%edx", "%ecx",
1345: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1346: #else
1.1.1.4 root 1347: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1348: #endif
1.1.1.12! root 1349:
1.1.1.2 root 1350: /*n_insns++;*/
1.1.1.4 root 1351: cycles &= cycles_mask;
1352: cycles |= cycles_val;
1353: do_cycles (cycles);
1.1.1.2 root 1354: if (regs.spcflags) {
1.1.1.4 root 1355: if (do_specialties ())
1.1 root 1356: return;
1357: }
1358: }
1359: }
1360:
1361: #ifdef X86_ASSEMBLY
1.1.1.9 root 1362: STATIC_INLINE void m68k_run1 (void (*func)(void))
1.1 root 1363: {
1364: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.8 root 1365: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp"
1366: : : "r" (func) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1367: }
1.1.1.2 root 1368: #else
1.1.1.11 root 1369: #define m68k_run1(F) F()
1.1.1.2 root 1370: #endif
1371:
1.1.1.3 root 1372: int in_m68k_go = 0;
1.1 root 1373:
1.1.1.4 root 1374: void m68k_go (int may_quit)
1.1 root 1375: {
1.1.1.3 root 1376: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1377: write_log ("Bug! m68k_go is not reentrant.\n");
1378: abort ();
1.1.1.3 root 1379: }
1.1.1.4 root 1380:
1381: reset_frame_rate_hack ();
1382: update_68k_cycles ();
1383:
1.1.1.3 root 1384: in_m68k_go++;
1385: for (;;) {
1386: if (quit_program > 0) {
1387: if (quit_program == 1)
1.1 root 1388: break;
1.1.1.3 root 1389: quit_program = 0;
1.1.1.4 root 1390: m68k_reset ();
1391: reset_all_systems ();
1392: customreset ();
1.1 root 1393: }
1.1.1.3 root 1394: if (debugging)
1.1.1.4 root 1395: debug ();
1.1.1.8 root 1396: m68k_run1 (currprefs.cpu_compatible ? m68k_run_1 : m68k_run_2);
1.1 root 1397: }
1.1.1.3 root 1398: in_m68k_go--;
1.1 root 1399: }
1400:
1.1.1.4 root 1401: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1402: {
1.1.1.3 root 1403: uae_u32 opcode, val;
1404: struct instr *dp;
1405:
1406: opcode = get_iword_1(0);
1407: last_op_for_exception_3 = opcode;
1408: m68kpc_offset = 2;
1409:
1.1.1.8 root 1410: if (cpufunctbl[opcode] == op_illg_1) {
1.1.1.3 root 1411: opcode = 0x4AFC;
1412: }
1413: dp = table68k + opcode;
1414:
1415: if (dp->suse) {
1416: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1417: Exception (3, 0);
1418: return;
1419: }
1420: }
1421: if (dp->duse) {
1422: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1423: Exception (3, 0);
1424: return;
1425: }
1426: }
1427: }
1428:
1.1.1.11 root 1429: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1430: {
1431: uaecptr newpc = 0;
1.1.1.4 root 1432: m68kpc_offset = addr - m68k_getpc ();
1433: while (cnt-- > 0) {
1.1 root 1434: char instrname[20],*ccpt;
1435: int opwords;
1.1.1.3 root 1436: uae_u32 opcode;
1.1 root 1437: struct mnemolookup *lookup;
1438: struct instr *dp;
1.1.1.11 root 1439: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1440: for (opwords = 0; opwords < 5; opwords++){
1.1.1.11 root 1441: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1442: }
1.1.1.4 root 1443: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1444: m68kpc_offset += 2;
1.1.1.8 root 1445: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1446: opcode = 0x4AFC;
1447: }
1448: dp = table68k + opcode;
1449: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1450: ;
1.1.1.3 root 1451:
1.1.1.4 root 1452: strcpy (instrname, lookup->name);
1453: ccpt = strstr (instrname, "cc");
1.1 root 1454: if (ccpt != 0) {
1.1.1.4 root 1455: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1456: }
1.1.1.11 root 1457: fprintf (f, "%s", instrname);
1.1.1.3 root 1458: switch (dp->size){
1.1.1.11 root 1459: case sz_byte: fprintf (f, ".B "); break;
1460: case sz_word: fprintf (f, ".W "); break;
1461: case sz_long: fprintf (f, ".L "); break;
1462: default: fprintf (f, " "); break;
1.1 root 1463: }
1464:
1465: if (dp->suse) {
1.1.1.4 root 1466: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1467: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1.1 root 1468: }
1469: if (dp->suse && dp->duse)
1.1.1.11 root 1470: fprintf (f, ",");
1.1 root 1471: if (dp->duse) {
1.1.1.4 root 1472: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1473: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1474: }
1475: if (ccpt != 0) {
1476: if (cctrue(dp->cc))
1.1.1.11 root 1477: fprintf (f, " == %08lx (TRUE)", newpc);
1.1.1.3 root 1478: else
1.1.1.11 root 1479: fprintf (f, " == %08lx (FALSE)", newpc);
1.1 root 1480: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.11 root 1481: fprintf (f, " == %08lx", newpc);
1482: fprintf (f, "\n");
1.1 root 1483: }
1.1.1.4 root 1484: if (nextpc)
1485: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1486: }
1487:
1.1.1.11 root 1488: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1.1 root 1489: {
1490: int i;
1.1.1.3 root 1491: for (i = 0; i < 8; i++){
1.1.1.11 root 1492: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1493: if ((i & 3) == 3) fprintf (f, "\n");
1.1.1.3 root 1494: }
1495: for (i = 0; i < 8; i++){
1.1.1.11 root 1496: fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i));
1497: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1498: }
1.1.1.2 root 1499: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1500: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1501: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.11 root 1502: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1503: regs.usp,regs.isp,regs.msp,regs.vbr);
1504: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1505: regs.t1, regs.t0, regs.s, regs.m,
1506: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1507: for (i = 0; i < 8; i++){
1.1.1.11 root 1508: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1509: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1510: }
1.1.1.11 root 1511: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1512: (regs.fpsr & 0x8000000) != 0,
1513: (regs.fpsr & 0x4000000) != 0,
1514: (regs.fpsr & 0x2000000) != 0,
1515: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1516: if (currprefs.cpu_compatible)
1.1.1.11 root 1517: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1.1.1.3 root 1518:
1.1.1.11 root 1519: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1.1.1.4 root 1520: if (nextpc)
1.1.1.11 root 1521: fprintf (f, "next PC: %08lx\n", *nextpc);
1.1 root 1522: }
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