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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
1.1 root 16: #include "memory.h"
17: #include "custom.h"
18: #include "newcpu.h"
19: #include "autoconf.h"
20: #include "ersatz.h"
21: #include "debug.h"
22: #include "compiler.h"
1.1.1.3 root 23: #include "gui.h"
1.1.1.14 root 24: #include "savestate.h"
1.1.1.3 root 25:
26: /* Opcode of faulting instruction */
27: uae_u16 last_op_for_exception_3;
28: /* PC at fault time */
29: uaecptr last_addr_for_exception_3;
30: /* Address that generated the exception */
31: uaecptr last_fault_for_exception_3;
1.1 root 32:
33: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
34: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
35:
36: int movem_index1[256];
37: int movem_index2[256];
38: int movem_next[256];
39:
40: int fpp_movem_index1[256];
41: int fpp_movem_index2[256];
42: int fpp_movem_next[256];
43:
44: cpuop_func *cpufunctbl[65536];
45:
1.1.1.3 root 46: #define COUNT_INSTRS 0
1.1 root 47:
48: #if COUNT_INSTRS
49: static unsigned long int instrcount[65536];
1.1.1.3 root 50: static uae_u16 opcodenums[65536];
1.1 root 51:
1.1.1.4 root 52: static int compfn (const void *el1, const void *el2)
1.1 root 53: {
1.1.1.3 root 54: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
55: }
56:
57: static char *icountfilename (void)
58: {
59: char *name = getenv ("INSNCOUNT");
60: if (name)
61: return name;
62: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 63: }
64:
1.1.1.4 root 65: void dump_counts (void)
1.1 root 66: {
1.1.1.4 root 67: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 68: unsigned long int total;
1.1 root 69: int i;
1.1.1.3 root 70:
71: write_log ("Writing instruction count file...\n");
1.1.1.4 root 72: for (i = 0; i < 65536; i++) {
1.1 root 73: opcodenums[i] = i;
1.1.1.3 root 74: total += instrcount[i];
1.1 root 75: }
1.1.1.4 root 76: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 77:
78: fprintf (f, "Total: %lu\n", total);
79: for (i=0; i < 65536; i++) {
1.1 root 80: unsigned long int cnt = instrcount[opcodenums[i]];
81: struct instr *dp;
82: struct mnemolookup *lookup;
83: if (!cnt)
84: break;
85: dp = table68k + opcodenums[i];
1.1.1.4 root 86: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
87: ;
1.1.1.3 root 88: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 89: }
1.1.1.4 root 90: fclose (f);
1.1 root 91: }
92: #else
1.1.1.4 root 93: void dump_counts (void)
1.1 root 94: {
95: }
96: #endif
97:
98: int broken_in;
99:
1.1.1.4 root 100: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
101:
102: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
103: {
1.1.1.8 root 104: op_illg (opcode);
1.1.1.4 root 105: return 4;
106: }
107:
1.1.1.3 root 108: static void build_cpufunctbl (void)
109: {
110: int i;
111: unsigned long opcode;
1.1.1.12 root 112: struct cputbl *tbl = (currprefs.cpu_level == 4 ? op_smalltbl_0_ff
113: : currprefs.cpu_level == 3 ? op_smalltbl_1_ff
114: : currprefs.cpu_level == 2 ? op_smalltbl_2_ff
115: : currprefs.cpu_level == 1 ? op_smalltbl_3_ff
116: : ! currprefs.cpu_compatible ? op_smalltbl_4_ff
117: : op_smalltbl_5_ff);
1.1.1.3 root 118:
1.1.1.4 root 119: write_log ("Building CPU function table (%d %d %d).\n",
120: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 121:
122: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.8 root 123: cpufunctbl[opcode] = op_illg_1;
1.1.1.3 root 124: for (i = 0; tbl[i].handler != NULL; i++) {
125: if (! tbl[i].specific)
1.1.1.8 root 126: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.3 root 127: }
128: for (opcode = 0; opcode < 65536; opcode++) {
129: cpuop_func *f;
130:
131: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
132: continue;
133:
134: if (table68k[opcode].handler != -1) {
1.1.1.8 root 135: f = cpufunctbl[table68k[opcode].handler];
1.1.1.4 root 136: if (f == op_illg_1)
1.1.1.3 root 137: abort();
1.1.1.8 root 138: cpufunctbl[opcode] = f;
1.1.1.3 root 139: }
140: }
141: for (i = 0; tbl[i].handler != NULL; i++) {
142: if (tbl[i].specific)
1.1.1.8 root 143: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.4 root 144: }
145: }
146:
147: unsigned long cycles_mask, cycles_val;
148:
149: static void update_68k_cycles (void)
150: {
151: cycles_mask = 0;
152: cycles_val = currprefs.m68k_speed;
153: if (currprefs.m68k_speed < 1) {
154: cycles_mask = 0xFFFFFFFF;
155: cycles_val = 0;
1.1.1.3 root 156: }
157: }
158:
159: void check_prefs_changed_cpu (void)
160: {
161: if (currprefs.cpu_level != changed_prefs.cpu_level
162: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
163: currprefs.cpu_level = changed_prefs.cpu_level;
164: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
165: build_cpufunctbl ();
166: }
1.1.1.4 root 167: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
168: currprefs.m68k_speed = changed_prefs.m68k_speed;
169: reset_frame_rate_hack ();
170: update_68k_cycles ();
171: }
1.1.1.3 root 172: }
173:
1.1 root 174: void init_m68k (void)
175: {
1.1.1.3 root 176: int i;
177:
1.1.1.4 root 178: update_68k_cycles ();
179:
1.1 root 180: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 181: int j;
1.1 root 182: for (j = 0 ; j < 8 ; j++) {
183: if (i & (1 << j)) break;
184: }
185: movem_index1[i] = j;
186: movem_index2[i] = 7-j;
187: movem_next[i] = i & (~(1 << j));
188: }
189: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 190: int j;
1.1 root 191: for (j = 7 ; j >= 0 ; j--) {
192: if (i & (1 << j)) break;
193: }
1.1.1.8 root 194: fpp_movem_index1[i] = 7-j;
195: fpp_movem_index2[i] = j;
1.1 root 196: fpp_movem_next[i] = i & (~(1 << j));
197: }
198: #if COUNT_INSTRS
199: {
1.1.1.4 root 200: FILE *f = fopen (icountfilename (), "r");
201: memset (instrcount, 0, sizeof instrcount);
1.1 root 202: if (f) {
1.1.1.3 root 203: uae_u32 opcode, count, total;
1.1 root 204: char name[20];
1.1.1.3 root 205: write_log ("Reading instruction count file...\n");
1.1.1.4 root 206: fscanf (f, "Total: %lu\n", &total);
207: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 208: instrcount[opcode] = count;
209: }
210: fclose(f);
211: }
212: }
213: #endif
1.1.1.5 root 214: write_log ("Building CPU table for configuration: 68");
215: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
216: write_log ("EC");
217: switch (currprefs.cpu_level) {
1.1.1.12 root 218: case 1:
1.1.1.5 root 219: write_log ("010");
220: break;
1.1.1.12 root 221: case 2:
1.1.1.5 root 222: write_log ("020");
223: break;
1.1.1.12 root 224: case 3:
1.1.1.5 root 225: write_log ("020/881");
226: break;
1.1.1.12 root 227: case 4:
228: /* Who is going to miss the MMU anyway...? :-) */
229: write_log ("040");
230: break;
231: default:
1.1.1.5 root 232: write_log ("000");
233: break;
234: }
235: if (currprefs.cpu_compatible)
236: write_log (" (compatible mode)");
237: write_log ("\n");
238:
1.1 root 239: read_table68k ();
240: do_merges ();
1.1.1.2 root 241:
1.1.1.4 root 242: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 243:
1.1.1.3 root 244: build_cpufunctbl ();
245: }
1.1.1.4 root 246:
1.1 root 247: struct regstruct regs, lastint_regs;
248: static struct regstruct regs_backup[16];
249: static int backup_pointer = 0;
1.1.1.3 root 250: static long int m68kpc_offset;
1.1 root 251: int lastint_no;
252:
1.1.1.3 root 253: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
254: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
255: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
256:
1.1.1.11 root 257: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 258: {
259: uae_u16 dp;
260: uae_s8 disp8;
261: uae_s16 disp16;
1.1 root 262: int r;
1.1.1.3 root 263: uae_u32 dispreg;
264: uaecptr addr;
265: uae_s32 offset = 0;
1.1.1.2 root 266: char buffer[80];
1.1.1.3 root 267:
268: switch (mode){
1.1 root 269: case Dreg:
1.1.1.3 root 270: sprintf (buffer,"D%d", reg);
1.1 root 271: break;
272: case Areg:
1.1.1.3 root 273: sprintf (buffer,"A%d", reg);
1.1 root 274: break;
275: case Aind:
1.1.1.3 root 276: sprintf (buffer,"(A%d)", reg);
1.1 root 277: break;
278: case Aipi:
1.1.1.3 root 279: sprintf (buffer,"(A%d)+", reg);
1.1 root 280: break;
281: case Apdi:
1.1.1.3 root 282: sprintf (buffer,"-(A%d)", reg);
1.1 root 283: break;
284: case Ad16:
1.1.1.4 root 285: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 286: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
287: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1.1.8 root 288: (unsigned long)addr);
1.1 root 289: break;
290: case Ad8r:
1.1.1.4 root 291: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 292: disp8 = dp & 0xFF;
293: r = (dp & 0x7000) >> 12;
1.1.1.3 root 294: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
295: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 296: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 297:
1.1 root 298: if (dp & 0x100) {
1.1.1.3 root 299: uae_s32 outer = 0, disp = 0;
300: uae_s32 base = m68k_areg(regs,reg);
301: char name[10];
302: sprintf (name,"A%d, ",reg);
303: if (dp & 0x80) { base = 0; name[0] = 0; }
304: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 305: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
306: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 307: base += disp;
308:
1.1.1.4 root 309: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
310: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 311:
312: if (!(dp & 4)) base += dispreg;
313: if (dp & 3) base = get_long (base);
314: if (dp & 4) base += dispreg;
315:
316: addr = base + outer;
317: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
318: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
319: 1 << ((dp >> 9) & 3),
320: disp,outer,
1.1.1.8 root 321: (unsigned long)addr);
1.1.1.3 root 322: } else {
323: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
324: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 325: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
326: 1 << ((dp >> 9) & 3), disp8,
1.1.1.8 root 327: (unsigned long)addr);
1.1 root 328: }
329: break;
330: case PC16:
1.1.1.4 root 331: addr = m68k_getpc () + m68kpc_offset;
332: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 333: addr += (uae_s16)disp16;
1.1.1.8 root 334: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
1.1 root 335: break;
336: case PC8r:
1.1.1.4 root 337: addr = m68k_getpc () + m68kpc_offset;
338: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 339: disp8 = dp & 0xFF;
340: r = (dp & 0x7000) >> 12;
1.1.1.2 root 341: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 342: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 343: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 344:
1.1 root 345: if (dp & 0x100) {
1.1.1.3 root 346: uae_s32 outer = 0,disp = 0;
347: uae_s32 base = addr;
348: char name[10];
349: sprintf (name,"PC, ");
350: if (dp & 0x80) { base = 0; name[0] = 0; }
351: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 352: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
353: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 354: base += disp;
355:
1.1.1.4 root 356: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
357: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 358:
359: if (!(dp & 4)) base += dispreg;
360: if (dp & 3) base = get_long (base);
361: if (dp & 4) base += dispreg;
362:
363: addr = base + outer;
364: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
365: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
366: 1 << ((dp >> 9) & 3),
367: disp,outer,
1.1.1.8 root 368: (unsigned long)addr);
1.1.1.2 root 369: } else {
1.1.1.3 root 370: addr += (uae_s32)((uae_s8)disp8) + dispreg;
371: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 372: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
1.1.1.8 root 373: disp8, (unsigned long)addr);
1.1 root 374: }
375: break;
376: case absw:
1.1.1.8 root 377: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 378: m68kpc_offset += 2;
1.1 root 379: break;
380: case absl:
1.1.1.8 root 381: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 382: m68kpc_offset += 4;
1.1 root 383: break;
384: case imm:
1.1.1.3 root 385: switch (size){
1.1 root 386: case sz_byte:
1.1.1.4 root 387: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 388: m68kpc_offset += 2;
389: break;
1.1 root 390: case sz_word:
1.1.1.4 root 391: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 392: m68kpc_offset += 2;
393: break;
1.1 root 394: case sz_long:
1.1.1.8 root 395: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 396: m68kpc_offset += 4;
397: break;
1.1 root 398: default:
399: break;
400: }
401: break;
402: case imm0:
1.1.1.4 root 403: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 404: m68kpc_offset += 2;
405: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 406: break;
407: case imm1:
1.1.1.4 root 408: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 409: m68kpc_offset += 2;
410: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 411: break;
412: case imm2:
1.1.1.4 root 413: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 414: m68kpc_offset += 4;
1.1.1.8 root 415: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 416: break;
417: case immi:
1.1.1.3 root 418: offset = (uae_s32)(uae_s8)(reg & 0xff);
1.1.1.8 root 419: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 420: break;
421: default:
422: break;
423: }
1.1.1.2 root 424: if (buf == 0)
1.1.1.11 root 425: fprintf (f, "%s", buffer);
1.1.1.2 root 426: else
1.1.1.4 root 427: strcat (buf, buffer);
1.1.1.2 root 428: return offset;
1.1 root 429: }
430:
1.1.1.3 root 431: /* The plan is that this will take over the job of exception 3 handling -
432: * the CPU emulation functions will just do a longjmp to m68k_go whenever
433: * they hit an odd address. */
1.1.1.4 root 434: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 435: {
436: uae_u16 dp;
437: uae_s8 disp8;
438: uae_s16 disp16;
439: int r;
440: uae_u32 dispreg;
441: uaecptr addr;
442: uae_s32 offset = 0;
443:
444: switch (mode){
445: case Dreg:
446: *val = m68k_dreg (regs, reg);
447: return 1;
448: case Areg:
449: *val = m68k_areg (regs, reg);
450: return 1;
451:
452: case Aind:
453: case Aipi:
454: addr = m68k_areg (regs, reg);
455: break;
456: case Apdi:
457: addr = m68k_areg (regs, reg);
458: break;
459: case Ad16:
1.1.1.4 root 460: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 461: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
462: break;
463: case Ad8r:
464: addr = m68k_areg (regs, reg);
465: d8r_common:
1.1.1.4 root 466: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 467: disp8 = dp & 0xFF;
468: r = (dp & 0x7000) >> 12;
469: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
470: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
471: dispreg <<= (dp >> 9) & 3;
472:
473: if (dp & 0x100) {
474: uae_s32 outer = 0, disp = 0;
475: uae_s32 base = addr;
476: if (dp & 0x80) base = 0;
477: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 478: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
479: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 480: base += disp;
481:
1.1.1.4 root 482: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
483: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 484:
485: if (!(dp & 4)) base += dispreg;
486: if (dp & 3) base = get_long (base);
487: if (dp & 4) base += dispreg;
488:
489: addr = base + outer;
490: } else {
491: addr += (uae_s32)((uae_s8)disp8) + dispreg;
492: }
493: break;
494: case PC16:
1.1.1.4 root 495: addr = m68k_getpc () + m68kpc_offset;
496: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 497: addr += (uae_s16)disp16;
498: break;
499: case PC8r:
1.1.1.4 root 500: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 501: goto d8r_common;
502: case absw:
1.1.1.4 root 503: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 504: m68kpc_offset += 2;
505: break;
506: case absl:
1.1.1.4 root 507: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 508: m68kpc_offset += 4;
509: break;
510: case imm:
511: switch (size){
512: case sz_byte:
1.1.1.4 root 513: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 514: m68kpc_offset += 2;
515: break;
516: case sz_word:
1.1.1.4 root 517: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 518: m68kpc_offset += 2;
519: break;
520: case sz_long:
1.1.1.4 root 521: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 522: m68kpc_offset += 4;
523: break;
524: default:
525: break;
526: }
527: return 1;
528: case imm0:
529: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
530: m68kpc_offset += 2;
531: return 1;
532: case imm1:
533: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
534: m68kpc_offset += 2;
535: return 1;
536: case imm2:
537: *val = get_ilong_1 (m68kpc_offset);
538: m68kpc_offset += 4;
539: return 1;
540: case immi:
541: *val = (uae_s32)(uae_s8)(reg & 0xff);
542: return 1;
543: default:
544: addr = 0;
545: break;
546: }
547: if ((addr & 1) == 0)
548: return 1;
549:
1.1.1.4 root 550: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 551: last_fault_for_exception_3 = addr;
552: return 0;
553: }
554:
1.1.1.5 root 555: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
556: {
557: int reg = (dp >> 12) & 15;
558: uae_s32 regd = regs.regs[reg];
559: if ((dp & 0x800) == 0)
560: regd = (uae_s32)(uae_s16)regd;
561: regd <<= (dp >> 9) & 3;
562: if (dp & 0x100) {
563: uae_s32 outer = 0;
564: if (dp & 0x80) base = 0;
565: if (dp & 0x40) regd = 0;
566:
567: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
568: if ((dp & 0x30) == 0x30) base += next_ilong();
569:
570: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
571: if ((dp & 0x3) == 0x3) outer = next_ilong();
572:
573: if ((dp & 0x4) == 0) base += regd;
574: if (dp & 0x3) base = get_long (base);
575: if (dp & 0x4) base += regd;
576:
577: return base + outer;
578: } else {
579: return base + (uae_s32)((uae_s8)dp) + regd;
580: }
581: }
582:
583: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
584: {
585: int reg = (dp >> 12) & 15;
586: uae_s32 regd = regs.regs[reg];
587: #if 1
588: if ((dp & 0x800) == 0)
589: regd = (uae_s32)(uae_s16)regd;
590: return base + (uae_s8)dp + regd;
591: #else
592: /* Branch-free code... benchmark this again now that
593: * things are no longer inline. */
594: uae_s32 regd16;
595: uae_u32 mask;
596: mask = ((dp & 0x800) >> 11) - 1;
597: regd16 = (uae_s32)(uae_s16)regd;
598: regd16 &= mask;
599: mask = ~mask;
600: base += (uae_s8)dp;
601: regd &= mask;
602: regd |= regd16;
603: return base + regd;
604: #endif
605: }
606:
1.1.1.4 root 607: void MakeSR (void)
1.1 root 608: {
609: #if 0
610: assert((regs.t1 & 1) == regs.t1);
611: assert((regs.t0 & 1) == regs.t0);
612: assert((regs.s & 1) == regs.s);
613: assert((regs.m & 1) == regs.m);
614: assert((XFLG & 1) == XFLG);
615: assert((NFLG & 1) == NFLG);
616: assert((ZFLG & 1) == ZFLG);
617: assert((VFLG & 1) == VFLG);
618: assert((CFLG & 1) == CFLG);
619: #endif
620: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
621: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 root 622: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
623: | GET_CFLG);
1.1 root 624: }
625:
1.1.1.4 root 626: void MakeFromSR (void)
1.1 root 627: {
628: int oldm = regs.m;
629: int olds = regs.s;
630:
631: regs.t1 = (regs.sr >> 15) & 1;
632: regs.t0 = (regs.sr >> 14) & 1;
633: regs.s = (regs.sr >> 13) & 1;
634: regs.m = (regs.sr >> 12) & 1;
635: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 root 636: SET_XFLG ((regs.sr >> 4) & 1);
637: SET_NFLG ((regs.sr >> 3) & 1);
638: SET_ZFLG ((regs.sr >> 2) & 1);
639: SET_VFLG ((regs.sr >> 1) & 1);
640: SET_CFLG (regs.sr & 1);
1.1.1.3 root 641: if (currprefs.cpu_level >= 2) {
1.1 root 642: if (olds != regs.s) {
1.1.1.3 root 643: if (olds) {
644: if (oldm)
645: regs.msp = m68k_areg(regs, 7);
646: else
647: regs.isp = m68k_areg(regs, 7);
648: m68k_areg(regs, 7) = regs.usp;
649: } else {
650: regs.usp = m68k_areg(regs, 7);
651: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
652: }
1.1 root 653: } else if (olds && oldm != regs.m) {
654: if (oldm) {
1.1.1.2 root 655: regs.msp = m68k_areg(regs, 7);
656: m68k_areg(regs, 7) = regs.isp;
657: } else {
658: regs.isp = m68k_areg(regs, 7);
659: m68k_areg(regs, 7) = regs.msp;
1.1 root 660: }
661: }
662: } else {
663: if (olds != regs.s) {
1.1.1.3 root 664: if (olds) {
665: regs.isp = m68k_areg(regs, 7);
666: m68k_areg(regs, 7) = regs.usp;
667: } else {
668: regs.usp = m68k_areg(regs, 7);
669: m68k_areg(regs, 7) = regs.isp;
670: }
671: }
1.1 root 672: }
1.1.1.3 root 673:
1.1.1.12 root 674: set_special (SPCFLAG_INT);
1.1 root 675: if (regs.t1 || regs.t0)
1.1.1.12 root 676: set_special (SPCFLAG_TRACE);
1.1 root 677: else
1.1.1.16! root 678: /* Keep SPCFLAG_DOTRACE, we still want a trace exception for
! 679: SR-modifying instructions (including STOP). */
! 680: unset_special (SPCFLAG_TRACE);
1.1 root 681: }
682:
1.1.1.3 root 683: void Exception(int nr, uaecptr oldpc)
1.1 root 684: {
1.1.1.12 root 685: uae_u32 currpc = m68k_getpc ();
686:
1.1.1.2 root 687: compiler_flush_jsr_stack();
1.1 root 688: MakeSR();
1.1.1.12 root 689:
1.1 root 690: if (!regs.s) {
1.1.1.2 root 691: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 692: if (currprefs.cpu_level >= 2)
693: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
694: else
695: m68k_areg(regs, 7) = regs.isp;
1.1 root 696: regs.s = 1;
697: }
1.1.1.3 root 698: if (currprefs.cpu_level > 0) {
1.1 root 699: if (nr == 2 || nr == 3) {
700: int i;
1.1.1.3 root 701: /* @@@ this is probably wrong (?) */
1.1 root 702: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 703: m68k_areg(regs, 7) -= 2;
704: put_word (m68k_areg(regs, 7), 0);
1.1 root 705: }
1.1.1.2 root 706: m68k_areg(regs, 7) -= 2;
707: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 708: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 709: m68k_areg(regs, 7) -= 4;
710: put_long (m68k_areg(regs, 7), oldpc);
711: m68k_areg(regs, 7) -= 2;
712: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
713: } else if (regs.m && nr >= 24 && nr < 32) {
714: m68k_areg(regs, 7) -= 2;
715: put_word (m68k_areg(regs, 7), nr * 4);
716: m68k_areg(regs, 7) -= 4;
1.1.1.12 root 717: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 718: m68k_areg(regs, 7) -= 2;
719: put_word (m68k_areg(regs, 7), regs.sr);
720: regs.sr |= (1 << 13);
721: regs.msp = m68k_areg(regs, 7);
722: m68k_areg(regs, 7) = regs.isp;
723: m68k_areg(regs, 7) -= 2;
724: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
725: } else {
726: m68k_areg(regs, 7) -= 2;
727: put_word (m68k_areg(regs, 7), nr * 4);
728: }
729: } else {
730: if (nr == 2 || nr == 3) {
731: m68k_areg(regs, 7) -= 12;
732: /* ??????? */
733: if (nr == 3) {
734: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
735: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
736: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
737: }
738: write_log ("Exception!\n");
739: goto kludge_me_do;
740: }
1.1 root 741: }
1.1.1.2 root 742: m68k_areg(regs, 7) -= 4;
1.1.1.12 root 743: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 744: kludge_me_do:
1.1.1.2 root 745: m68k_areg(regs, 7) -= 2;
746: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 747: m68k_setpc (get_long (regs.vbr + 4*nr));
748: fill_prefetch_0 ();
1.1 root 749: regs.t1 = regs.t0 = regs.m = 0;
1.1.1.12 root 750: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 751: }
752:
753: static void Interrupt(int nr)
754: {
755: assert(nr < 8 && nr >= 0);
756: lastint_regs = regs;
757: lastint_no = nr;
758: Exception(nr+24, 0);
1.1.1.3 root 759:
1.1 root 760: regs.intmask = nr;
1.1.1.12 root 761: set_special (SPCFLAG_INT);
1.1 root 762: }
763:
1.1.1.15 root 764: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp;
1.1 root 765:
1.1.1.9 root 766: int m68k_move2c (int regno, uae_u32 *regp)
1.1 root 767: {
1.1.1.12 root 768: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
769: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
770: || (currprefs.cpu_level == 4 && regno == 0x802))
771: {
1.1 root 772: op_illg (0x4E7B);
1.1.1.9 root 773: return 0;
1.1.1.12 root 774: } else {
1.1 root 775: switch (regno) {
1.1.1.12 root 776: case 0: regs.sfc = *regp & 7; break;
777: case 1: regs.dfc = *regp & 7; break;
778: case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break;
779: case 3: tc = *regp & 0xc000; break;
1.1.1.15 root 780: /* Mask out fields that should be zero. */
1.1.1.12 root 781: case 4: itt0 = *regp & 0xffffe364; break;
782: case 5: itt1 = *regp & 0xffffe364; break;
783: case 6: dtt0 = *regp & 0xffffe364; break;
784: case 7: dtt1 = *regp & 0xffffe364; break;
785:
786: case 0x800: regs.usp = *regp; break;
787: case 0x801: regs.vbr = *regp; break;
788: case 0x802: caar = *regp & 0xfc; break;
789: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
790: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1.1.15 root 791: case 0x805: mmusr = *regp; break;
792: case 0x806: urp = *regp; break;
793: case 0x807: srp = *regp; break;
1.1.1.12 root 794: default:
1.1 root 795: op_illg (0x4E7B);
1.1.1.9 root 796: return 0;
1.1 root 797: }
1.1.1.12 root 798: }
1.1.1.9 root 799: return 1;
1.1 root 800: }
801:
1.1.1.9 root 802: int m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 803: {
1.1.1.12 root 804: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
805: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
806: || (currprefs.cpu_level == 4 && regno == 0x802))
807: {
1.1 root 808: op_illg (0x4E7A);
1.1.1.9 root 809: return 0;
1.1.1.12 root 810: } else {
1.1 root 811: switch (regno) {
1.1.1.12 root 812: case 0: *regp = regs.sfc; break;
813: case 1: *regp = regs.dfc; break;
814: case 2: *regp = cacr; break;
815: case 3: *regp = tc; break;
816: case 4: *regp = itt0; break;
817: case 5: *regp = itt1; break;
818: case 6: *regp = dtt0; break;
819: case 7: *regp = dtt1; break;
820: case 0x800: *regp = regs.usp; break;
821: case 0x801: *regp = regs.vbr; break;
822: case 0x802: *regp = caar; break;
823: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
824: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
825: case 0x805: *regp = mmusr; break;
1.1.1.15 root 826: case 0x806: *regp = urp; break;
827: case 0x807: *regp = srp; break;
1.1.1.12 root 828: default:
1.1 root 829: op_illg (0x4E7A);
1.1.1.9 root 830: return 0;
1.1 root 831: }
1.1.1.12 root 832: }
1.1.1.9 root 833: return 1;
1.1 root 834: }
835:
1.1.1.8 root 836: STATIC_INLINE int
1.1.1.3 root 837: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 838: {
1.1.1.3 root 839: uae_u32 q = 0, cbit = 0;
1.1 root 840: int i;
841:
842: if (div <= src_hi) {
1.1.1.4 root 843: return 1;
1.1 root 844: }
845: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 846: cbit = src_hi & 0x80000000ul;
1.1 root 847: src_hi <<= 1;
1.1.1.2 root 848: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 849: src_lo <<= 1;
850: q = q << 1;
851: if (cbit || div <= src_hi) {
852: q |= 1;
853: src_hi -= div;
854: }
855: }
856: *quot = q;
857: *rem = src_hi;
1.1.1.4 root 858: return 0;
1.1 root 859: }
860:
1.1.1.3 root 861: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 862: {
1.1.1.3 root 863: #if defined(uae_s64)
1.1 root 864: if (src == 0) {
1.1.1.4 root 865: Exception (5, oldpc);
1.1 root 866: return;
867: }
868: if (extra & 0x800) {
869: /* signed variant */
1.1.1.3 root 870: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
871: uae_s64 quot, rem;
872:
1.1 root 873: if (extra & 0x400) {
1.1.1.3 root 874: a &= 0xffffffffu;
875: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 876: }
1.1.1.3 root 877: rem = a % (uae_s64)(uae_s32)src;
878: quot = a / (uae_s64)(uae_s32)src;
879: if ((quot & UVAL64(0xffffffff80000000)) != 0
880: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
881: {
1.1.1.6 root 882: SET_VFLG (1);
883: SET_NFLG (1);
884: SET_CFLG (0);
1.1.1.4 root 885: } else {
1.1.1.3 root 886: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 root 887: SET_VFLG (0);
888: SET_CFLG (0);
889: SET_ZFLG (((uae_s32)quot) == 0);
890: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 891: m68k_dreg(regs, extra & 7) = rem;
892: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 893: }
894: } else {
895: /* unsigned */
1.1.1.3 root 896: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
897: uae_u64 quot, rem;
898:
1.1 root 899: if (extra & 0x400) {
1.1.1.3 root 900: a &= 0xffffffffu;
901: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 902: }
1.1.1.3 root 903: rem = a % (uae_u64)src;
904: quot = a / (uae_u64)src;
905: if (quot > 0xffffffffu) {
1.1.1.6 root 906: SET_VFLG (1);
907: SET_NFLG (1);
908: SET_CFLG (0);
1.1.1.4 root 909: } else {
1.1.1.6 root 910: SET_VFLG (0);
911: SET_CFLG (0);
912: SET_ZFLG (((uae_s32)quot) == 0);
913: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 914: m68k_dreg(regs, extra & 7) = rem;
915: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 916: }
917: }
918: #else
919: if (src == 0) {
1.1.1.4 root 920: Exception (5, oldpc);
1.1 root 921: return;
922: }
923: if (extra & 0x800) {
924: /* signed variant */
1.1.1.3 root 925: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
926: uae_s32 hi = lo < 0 ? -1 : 0;
927: uae_s32 save_high;
928: uae_u32 quot, rem;
929: uae_u32 sign;
930:
1.1 root 931: if (extra & 0x400) {
1.1.1.3 root 932: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 933: }
934: save_high = hi;
935: sign = (hi ^ src);
936: if (hi < 0) {
1.1.1.4 root 937: hi = ~hi;
938: lo = -lo;
939: if (lo == 0) hi++;
1.1 root 940: }
1.1.1.3 root 941: if ((uae_s32)src < 0) src = -src;
1.1 root 942: if (div_unsigned(hi, lo, src, ", &rem) ||
943: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 root 944: SET_VFLG (1);
945: SET_NFLG (1);
946: SET_CFLG (0);
1.1.1.4 root 947: } else {
1.1 root 948: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 949: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 root 950: SET_VFLG (0);
951: SET_CFLG (0);
952: SET_ZFLG (((uae_s32)quot) == 0);
953: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 954: m68k_dreg(regs, extra & 7) = rem;
955: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 956: }
957: } else {
958: /* unsigned */
1.1.1.3 root 959: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
960: uae_u32 hi = 0;
961: uae_u32 quot, rem;
962:
1.1 root 963: if (extra & 0x400) {
1.1.1.3 root 964: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 965: }
966: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 root 967: SET_VFLG (1);
968: SET_NFLG (1);
969: SET_CFLG (0);
1.1.1.4 root 970: } else {
1.1.1.6 root 971: SET_VFLG (0);
972: SET_CFLG (0);
973: SET_ZFLG (((uae_s32)quot) == 0);
974: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 975: m68k_dreg(regs, extra & 7) = rem;
976: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 977: }
978: }
979: #endif
980: }
981:
1.1.1.8 root 982: STATIC_INLINE void
1.1.1.3 root 983: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 984: {
1.1.1.3 root 985: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
986: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
987: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
988: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
989: uae_u32 lo;
990:
991: lo = r0 + ((r1 << 16) & 0xffff0000ul);
992: if (lo < r0) r3++;
993: r0 = lo;
994: lo = r0 + ((r2 << 16) & 0xffff0000ul);
995: if (lo < r0) r3++;
996: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 997: *dst_lo = lo;
998: *dst_hi = r3;
999: }
1000:
1.1.1.3 root 1001: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 1002: {
1.1.1.3 root 1003: #if defined(uae_s64)
1.1 root 1004: if (extra & 0x800) {
1005: /* signed variant */
1.1.1.3 root 1006: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1007:
1.1.1.3 root 1008: a *= (uae_s64)(uae_s32)src;
1.1.1.6 root 1009: SET_VFLG (0);
1010: SET_CFLG (0);
1011: SET_ZFLG (a == 0);
1012: SET_NFLG (a < 0);
1.1 root 1013: if (extra & 0x400)
1.1.1.2 root 1014: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1015: else if ((a & UVAL64(0xffffffff80000000)) != 0
1016: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1017: {
1.1.1.6 root 1018: SET_VFLG (1);
1.1 root 1019: }
1.1.1.3 root 1020: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1021: } else {
1022: /* unsigned */
1.1.1.3 root 1023: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1024:
1025: a *= (uae_u64)src;
1.1.1.6 root 1026: SET_VFLG (0);
1027: SET_CFLG (0);
1028: SET_ZFLG (a == 0);
1029: SET_NFLG (((uae_s64)a) < 0);
1.1 root 1030: if (extra & 0x400)
1.1.1.2 root 1031: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1032: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 root 1033: SET_VFLG (1);
1.1 root 1034: }
1.1.1.3 root 1035: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1036: }
1037: #else
1038: if (extra & 0x800) {
1039: /* signed variant */
1.1.1.3 root 1040: uae_s32 src1,src2;
1041: uae_u32 dst_lo,dst_hi;
1042: uae_u32 sign;
1.1 root 1043:
1.1.1.3 root 1044: src1 = (uae_s32)src;
1045: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1046: sign = (src1 ^ src2);
1047: if (src1 < 0) src1 = -src1;
1048: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1049: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1050: if (sign & 0x80000000) {
1051: dst_hi = ~dst_hi;
1052: dst_lo = -dst_lo;
1053: if (dst_lo == 0) dst_hi++;
1054: }
1.1.1.6 root 1055: SET_VFLG (0);
1056: SET_CFLG (0);
1057: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1058: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1059: if (extra & 0x400)
1.1.1.2 root 1060: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1061: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1062: && ((dst_hi & 0xffffffff) != 0xffffffff
1063: || (dst_lo & 0x80000000) != 0x80000000))
1064: {
1.1.1.6 root 1065: SET_VFLG (1);
1.1 root 1066: }
1.1.1.2 root 1067: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1068: } else {
1069: /* unsigned */
1.1.1.3 root 1070: uae_u32 dst_lo,dst_hi;
1071:
1072: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1073:
1.1.1.6 root 1074: SET_VFLG (0);
1075: SET_CFLG (0);
1076: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1077: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1078: if (extra & 0x400)
1.1.1.2 root 1079: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1080: else if (dst_hi != 0) {
1.1.1.6 root 1081: SET_VFLG (1);
1.1 root 1082: }
1.1.1.2 root 1083: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1084: }
1085: #endif
1086: }
1087: static char* ccnames[] =
1088: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1089: "VC","VS","PL","MI","GE","LT","GT","LE" };
1090:
1.1.1.4 root 1091: void m68k_reset (void)
1.1 root 1092: {
1.1.1.14 root 1093: regs.kick_mask = 0x00F80000;
1094: regs.spcflags = 0;
1095: if (savestate_state == STATE_RESTORE) {
1096: m68k_setpc (regs.pc);
1097: /* MakeFromSR() must not swap stack pointer */
1098: regs.s = (regs.sr >> 13) & 1;
1099: MakeFromSR();
1100: /* set stack pointer */
1101: if (regs.s)
1102: m68k_areg(regs, 7) = regs.isp;
1103: else
1104: m68k_areg(regs, 7) = regs.usp;
1105: return;
1106: }
1107:
1.1.1.3 root 1108: m68k_areg (regs, 7) = get_long (0x00f80000);
1109: m68k_setpc (get_long (0x00f80004));
1.1.1.16! root 1110: refill_prefetch (m68k_getpc (), 0);
1.1.1.3 root 1111: fill_prefetch_0 ();
1.1 root 1112: regs.s = 1;
1113: regs.m = 0;
1114: regs.stopped = 0;
1115: regs.t1 = 0;
1116: regs.t0 = 0;
1.1.1.6 root 1117: SET_ZFLG (0);
1118: SET_XFLG (0);
1119: SET_CFLG (0);
1120: SET_VFLG (0);
1121: SET_NFLG (0);
1.1 root 1122: regs.intmask = 7;
1123: regs.vbr = regs.sfc = regs.dfc = 0;
1124: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1125: }
1126:
1.1.1.4 root 1127: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1128: {
1.1.1.3 root 1129: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1130:
1.1.1.3 root 1131: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1132: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1133: m68k_incpc (2);
1134: fill_prefetch_0 ();
1.1.1.4 root 1135: return 4;
1.1.1.3 root 1136: }
1137:
1138: compiler_flush_jsr_stack ();
1139: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1140: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1141: broken_in = 1;
1.1.1.12 root 1142: set_special (SPCFLAG_BRK);
1.1 root 1143: quit_program = 1;
1144: }
1.1.1.2 root 1145: if (opcode == 0xFF0D) {
1.1.1.3 root 1146: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1147: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1148: uae_u16 arg = get_iword (2);
1149: m68k_incpc (4);
1150: ersatz_perform (arg);
1151: fill_prefetch_0 ();
1.1.1.4 root 1152: return 4;
1.1.1.3 root 1153: } else if ((pc & 0xF80000) == 0xF00000) {
1.1.1.2 root 1154: /* User-mode STOP replacement */
1.1.1.3 root 1155: m68k_setstopped (1);
1.1.1.4 root 1156: return 4;
1.1.1.2 root 1157: }
1.1 root 1158: }
1.1.1.3 root 1159:
1160: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1161: /* Calltrap. */
1162: m68k_incpc(2);
1163: call_calltrap (opcode & 0xFFF);
1164: fill_prefetch_0 ();
1.1.1.4 root 1165: return 4;
1.1.1.3 root 1166: }
1167:
1.1 root 1168: if ((opcode & 0xF000) == 0xF000) {
1169: Exception(0xB,0);
1.1.1.4 root 1170: return 4;
1.1 root 1171: }
1172: if ((opcode & 0xF000) == 0xA000) {
1.1.1.3 root 1173: if ((pc & 0xF80000) == 0xF00000) {
1174: /* Calltrap. */
1175: call_calltrap (opcode & 0xFFF);
1176: }
1177: Exception(0xA,0);
1.1.1.4 root 1178: return 4;
1.1 root 1179: }
1.1.1.12 root 1180: #if 1
1.1.1.4 root 1181: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.10 root 1182: #endif
1.1.1.3 root 1183: Exception (4,0);
1.1.1.4 root 1184: return 4;
1.1 root 1185: }
1186:
1.1.1.3 root 1187: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1188: {
1.1.1.12 root 1189: if ((opcode & 0xFE0) == 0x0500) {
1190: /* PFLUSH */
1191: mmusr = 0;
1192: write_log ("PFLUSH\n");
1193: } else if ((opcode & 0x0FD8) == 0x548) {
1194: /* PTEST */
1195: write_log ("PTEST\n");
1.1 root 1196: } else
1.1.1.3 root 1197: op_illg (opcode);
1.1 root 1198: }
1199:
1.1.1.4 root 1200: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1201:
1.1.1.3 root 1202: static uaecptr last_trace_ad = 0;
1.1 root 1203:
1.1.1.7 root 1204: static void do_trace (void)
1.1 root 1205: {
1.1.1.11 root 1206: if (regs.t0 && currprefs.cpu_level >= 2) {
1.1.1.7 root 1207: uae_u16 opcode;
1208: /* should also include TRAP, CHK, SR modification FPcc */
1209: /* probably never used so why bother */
1210: /* We can afford this to be inefficient... */
1211: m68k_setpc (m68k_getpc ());
1212: fill_prefetch_0 ();
1213: opcode = get_word (regs.pc);
1214: if (opcode == 0x4e72 /* RTE */
1215: || opcode == 0x4e74 /* RTD */
1216: || opcode == 0x4e75 /* RTS */
1217: || opcode == 0x4e77 /* RTR */
1218: || opcode == 0x4e76 /* TRAPV */
1219: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1220: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1221: || (opcode & 0xff00) == 0x6100 /* BSR */
1222: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1223: && cctrue((opcode >> 8) & 0xf))
1224: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1225: && !cctrue((opcode >> 8) & 0xf)
1226: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1227: {
1.1.1.4 root 1228: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1229: unset_special (SPCFLAG_TRACE);
1230: set_special (SPCFLAG_DOTRACE);
1.1 root 1231: }
1.1.1.7 root 1232: } else if (regs.t1) {
1233: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1234: unset_special (SPCFLAG_TRACE);
1235: set_special (SPCFLAG_DOTRACE);
1.1 root 1236: }
1237: }
1238:
1.1.1.7 root 1239:
1.1.1.3 root 1240: static int do_specialties (void)
1.1 root 1241: {
1.1.1.9 root 1242: if (regs.spcflags & SPCFLAG_COPPER)
1243: do_copper ();
1244:
1.1.1.3 root 1245: /*n_spcinsns++;*/
1246: while (regs.spcflags & SPCFLAG_BLTNASTY) {
1.1.1.13 root 1247: do_cycles (4 * CYCLE_UNIT);
1.1.1.9 root 1248: if (regs.spcflags & SPCFLAG_COPPER)
1249: do_copper ();
1.1.1.3 root 1250: }
1.1.1.9 root 1251:
1.1.1.3 root 1252: run_compiled_code();
1253: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1254: Exception (9,last_trace_ad);
1.1.1.3 root 1255: }
1256: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.13 root 1257: do_cycles (4 * CYCLE_UNIT);
1.1.1.9 root 1258: if (regs.spcflags & SPCFLAG_COPPER)
1259: do_copper ();
1.1.1.3 root 1260: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1261: int intr = intlev ();
1.1.1.12 root 1262: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1263: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1264: Interrupt (intr);
1.1.1.3 root 1265: regs.stopped = 0;
1.1.1.12 root 1266: unset_special (SPCFLAG_STOP);
1.1.1.2 root 1267: }
1.1.1.3 root 1268: }
1269: }
1.1.1.7 root 1270: if (regs.spcflags & SPCFLAG_TRACE)
1271: do_trace ();
1.1.1.4 root 1272:
1.1.1.3 root 1273: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1274: int intr = intlev ();
1.1.1.12 root 1275: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1276: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1277: Interrupt (intr);
1.1.1.3 root 1278: regs.stopped = 0;
1279: }
1280: }
1281: if (regs.spcflags & SPCFLAG_INT) {
1.1.1.12 root 1282: unset_special (SPCFLAG_INT);
1283: set_special (SPCFLAG_DOINT);
1.1.1.3 root 1284: }
1.1.1.4 root 1285: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1.1.1.12 root 1286: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1287: return 1;
1.1.1.2 root 1288: }
1.1.1.3 root 1289: return 0;
1.1.1.2 root 1290: }
1291:
1.1.1.8 root 1292: /* It's really sad to have two almost identical functions for this, but we
1293: do it all for performance... :( */
1.1.1.4 root 1294: static void m68k_run_1 (void)
1.1.1.2 root 1295: {
1.1.1.12 root 1296: #ifdef DEBUG_PREFETCH
1297: uae_u8 saved_bytes[20];
1298: uae_u16 *oldpcp;
1299: #endif
1.1.1.3 root 1300: for (;;) {
1.1.1.4 root 1301: int cycles;
1.1.1.8 root 1302: uae_u32 opcode = get_iword_prefetch (0);
1.1.1.12 root 1303: #ifdef DEBUG_PREFETCH
1.1.1.8 root 1304: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1.1.1.12 root 1305: fprintf (stderr, "Prefetch differs from memory.\n");
1.1.1.8 root 1306: debugging = 1;
1307: return;
1308: }
1.1.1.12 root 1309: oldpcp = regs.pc_p;
1310: memcpy (saved_bytes, regs.pc_p, 20);
1.1.1.8 root 1311: #endif
1312: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1313: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1314: #if COUNT_INSTRS == 2
1315: if (table68k[opcode].handler != -1)
1316: instrcount[table68k[opcode].handler]++;
1317: #elif COUNT_INSTRS == 1
1318: instrcount[opcode]++;
1319: #endif
1320: #if defined X86_ASSEMBLY
1321: __asm__ __volatile__("\tcall *%%ebx"
1322: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1323: : "%edx", "%ecx",
1324: "%esi", "%edi", "%ebp", "memory", "cc");
1325: #else
1326: cycles = (*cpufunctbl[opcode])(opcode);
1327: #endif
1.1.1.12 root 1328: #ifdef DEBUG_PREFETCH
1329: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1330: fprintf (stderr, "Self-modifying code detected.\n");
1331: set_special (SPCFLAG_BRK);
1332: debugging = 1;
1333: }
1334: #endif
1.1.1.8 root 1335: /*n_insns++;*/
1336: cycles &= cycles_mask;
1337: cycles |= cycles_val;
1338: do_cycles (cycles);
1339: if (regs.spcflags) {
1340: if (do_specialties ())
1341: return;
1342: }
1343: }
1344: }
1345:
1.1.1.12 root 1346: #define DEBUG_PREFETCH
1347:
1.1.1.8 root 1348: /* Same thing, but don't use prefetch to get opcode. */
1349: static void m68k_run_2 (void)
1350: {
1351: for (;;) {
1352: int cycles;
1353: uae_u32 opcode = get_iword (0);
1.1.1.12 root 1354:
1.1.1.2 root 1355: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1356: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1357: #if COUNT_INSTRS == 2
1.1.1.8 root 1358: if (table68k[opcode].handler != -1)
1359: instrcount[table68k[opcode].handler]++;
1.1.1.3 root 1360: #elif COUNT_INSTRS == 1
1.1.1.2 root 1361: instrcount[opcode]++;
1362: #endif
1.1.1.8 root 1363: #if defined X86_ASSEMBLY
1.1.1.3 root 1364: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1365: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1366: : "%edx", "%ecx",
1367: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1368: #else
1.1.1.4 root 1369: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1370: #endif
1.1.1.12 root 1371:
1.1.1.2 root 1372: /*n_insns++;*/
1.1.1.4 root 1373: cycles &= cycles_mask;
1374: cycles |= cycles_val;
1375: do_cycles (cycles);
1.1.1.2 root 1376: if (regs.spcflags) {
1.1.1.4 root 1377: if (do_specialties ())
1.1 root 1378: return;
1379: }
1380: }
1381: }
1382:
1383: #ifdef X86_ASSEMBLY
1.1.1.9 root 1384: STATIC_INLINE void m68k_run1 (void (*func)(void))
1.1 root 1385: {
1386: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.8 root 1387: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp"
1388: : : "r" (func) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1389: }
1.1.1.2 root 1390: #else
1.1.1.13 root 1391: #define m68k_run1(F) (F) ()
1.1.1.2 root 1392: #endif
1393:
1.1.1.3 root 1394: int in_m68k_go = 0;
1.1 root 1395:
1.1.1.4 root 1396: void m68k_go (int may_quit)
1.1 root 1397: {
1.1.1.3 root 1398: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1399: write_log ("Bug! m68k_go is not reentrant.\n");
1400: abort ();
1.1.1.3 root 1401: }
1.1.1.4 root 1402:
1403: reset_frame_rate_hack ();
1404: update_68k_cycles ();
1405:
1.1.1.3 root 1406: in_m68k_go++;
1407: for (;;) {
1408: if (quit_program > 0) {
1409: if (quit_program == 1)
1.1 root 1410: break;
1.1.1.3 root 1411: quit_program = 0;
1.1.1.4 root 1412: m68k_reset ();
1413: reset_all_systems ();
1414: customreset ();
1.1.1.14 root 1415: /* We may have been restoring state, but we're done now. */
1416: savestate_restore_finish ();
1417: handle_active_events ();
1.1 root 1418: }
1.1.1.14 root 1419:
1.1.1.3 root 1420: if (debugging)
1.1.1.4 root 1421: debug ();
1.1.1.8 root 1422: m68k_run1 (currprefs.cpu_compatible ? m68k_run_1 : m68k_run_2);
1.1 root 1423: }
1.1.1.3 root 1424: in_m68k_go--;
1.1 root 1425: }
1426:
1.1.1.4 root 1427: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1428: {
1.1.1.3 root 1429: uae_u32 opcode, val;
1430: struct instr *dp;
1431:
1432: opcode = get_iword_1(0);
1433: last_op_for_exception_3 = opcode;
1434: m68kpc_offset = 2;
1435:
1.1.1.8 root 1436: if (cpufunctbl[opcode] == op_illg_1) {
1.1.1.3 root 1437: opcode = 0x4AFC;
1438: }
1439: dp = table68k + opcode;
1440:
1441: if (dp->suse) {
1442: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1443: Exception (3, 0);
1444: return;
1445: }
1446: }
1447: if (dp->duse) {
1448: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1449: Exception (3, 0);
1450: return;
1451: }
1452: }
1453: }
1454:
1.1.1.11 root 1455: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1456: {
1457: uaecptr newpc = 0;
1.1.1.4 root 1458: m68kpc_offset = addr - m68k_getpc ();
1459: while (cnt-- > 0) {
1.1 root 1460: char instrname[20],*ccpt;
1461: int opwords;
1.1.1.3 root 1462: uae_u32 opcode;
1.1 root 1463: struct mnemolookup *lookup;
1464: struct instr *dp;
1.1.1.11 root 1465: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1466: for (opwords = 0; opwords < 5; opwords++){
1.1.1.11 root 1467: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1468: }
1.1.1.4 root 1469: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1470: m68kpc_offset += 2;
1.1.1.8 root 1471: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1472: opcode = 0x4AFC;
1473: }
1474: dp = table68k + opcode;
1475: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1476: ;
1.1.1.3 root 1477:
1.1.1.4 root 1478: strcpy (instrname, lookup->name);
1479: ccpt = strstr (instrname, "cc");
1.1 root 1480: if (ccpt != 0) {
1.1.1.4 root 1481: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1482: }
1.1.1.11 root 1483: fprintf (f, "%s", instrname);
1.1.1.3 root 1484: switch (dp->size){
1.1.1.11 root 1485: case sz_byte: fprintf (f, ".B "); break;
1486: case sz_word: fprintf (f, ".W "); break;
1487: case sz_long: fprintf (f, ".L "); break;
1488: default: fprintf (f, " "); break;
1.1 root 1489: }
1490:
1491: if (dp->suse) {
1.1.1.4 root 1492: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1493: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1.1 root 1494: }
1495: if (dp->suse && dp->duse)
1.1.1.11 root 1496: fprintf (f, ",");
1.1 root 1497: if (dp->duse) {
1.1.1.4 root 1498: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1499: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1500: }
1501: if (ccpt != 0) {
1502: if (cctrue(dp->cc))
1.1.1.11 root 1503: fprintf (f, " == %08lx (TRUE)", newpc);
1.1.1.3 root 1504: else
1.1.1.11 root 1505: fprintf (f, " == %08lx (FALSE)", newpc);
1.1 root 1506: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.11 root 1507: fprintf (f, " == %08lx", newpc);
1508: fprintf (f, "\n");
1.1 root 1509: }
1.1.1.4 root 1510: if (nextpc)
1511: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1512: }
1513:
1.1.1.11 root 1514: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1.1 root 1515: {
1516: int i;
1.1.1.3 root 1517: for (i = 0; i < 8; i++){
1.1.1.11 root 1518: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1519: if ((i & 3) == 3) fprintf (f, "\n");
1.1.1.3 root 1520: }
1521: for (i = 0; i < 8; i++){
1.1.1.11 root 1522: fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i));
1523: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1524: }
1.1.1.2 root 1525: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1526: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1527: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.11 root 1528: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1529: regs.usp,regs.isp,regs.msp,regs.vbr);
1530: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1531: regs.t1, regs.t0, regs.s, regs.m,
1532: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1533: for (i = 0; i < 8; i++){
1.1.1.11 root 1534: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1535: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1536: }
1.1.1.11 root 1537: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1538: (regs.fpsr & 0x8000000) != 0,
1539: (regs.fpsr & 0x4000000) != 0,
1540: (regs.fpsr & 0x2000000) != 0,
1541: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1542: if (currprefs.cpu_compatible)
1.1.1.11 root 1543: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1.1.1.3 root 1544:
1.1.1.11 root 1545: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1.1.1.4 root 1546: if (nextpc)
1.1.1.11 root 1547: fprintf (f, "next PC: %08lx\n", *nextpc);
1.1 root 1548: }
1.1.1.14 root 1549:
1550:
1551: /* CPU save/restore code */
1552:
1553: #define CPUTYPE_EC 1
1554: #define CPUMODE_HALT 1
1555:
1556: uae_u8 *restore_cpu (uae_u8 *src)
1557: {
1558: int i,model,flags;
1559: uae_u32 l;
1560:
1561: model = restore_u32();
1562: switch (model) {
1563: case 68000:
1564: currprefs.cpu_level = 0;
1565: break;
1566: case 68010:
1567: currprefs.cpu_level = 1;
1568: break;
1569: case 68020:
1570: currprefs.cpu_level = 2;
1571: break;
1572: default:
1573: write_log ("Unknown cpu type %d\n", model);
1574: break;
1575: }
1576:
1577: flags = restore_u32();
1578: currprefs.address_space_24 = 0;
1579: if (flags & CPUTYPE_EC)
1580: currprefs.address_space_24 = 1;
1581: for (i = 0; i < 15; i++)
1582: regs.regs[i] = restore_u32 ();
1583: regs.pc = restore_u32 ();
1584: regs.prefetch = restore_u32 ();
1585: regs.usp = restore_u32 ();
1586: regs.isp = restore_u32 ();
1587: regs.sr = restore_u16 ();
1588: l = restore_u32();
1589: if (l & CPUMODE_HALT)
1590: regs.stopped = 1;
1591: else
1592: regs.stopped = 0;
1593: if (model >= 68010) {
1594: regs.dfc = restore_u32 ();
1595: regs.sfc = restore_u32 ();
1596: regs.vbr = restore_u32 ();
1597: }
1598: if (model >= 68020) {
1599: caar = restore_u32 ();
1600: cacr = restore_u32 ();
1601: regs.msp = restore_u32 ();
1602: }
1603: write_log ("CPU %d%s%03d, PC=%08.8X\n",
1604: model/1000, flags & 1 ? "EC" : "", model % 1000, regs.pc);
1605:
1606: return src;
1607: }
1608:
1609: static int cpumodel[] = { 68000, 68010, 68020, 68020 };
1610:
1611: uae_u8 *save_cpu (int *len)
1612: {
1613: uae_u8 *dstbak,*dst;
1614: int model,i;
1615:
1616: dstbak = dst = malloc(4+4+15*4+4+4+4+4+2+4+4+4+4+4+4+4);
1617: model = cpumodel[currprefs.cpu_level];
1618: save_u32 (model); /* MODEL */
1619: save_u32 (currprefs.address_space_24 ? 1 : 0); /* FLAGS */
1620: for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */
1621: save_u32 (m68k_getpc ()); /* PC */
1622: save_u32 (regs.prefetch); /* prefetch */
1623: MakeSR ();
1624: save_u32 (!regs.s ? regs.regs[15] : regs.usp); /* USP */
1625: save_u32 (regs.s ? regs.regs[15] : regs.isp); /* ISP */
1626: save_u16 (regs.sr); /* SR/CCR */
1627: save_u32 (regs.stopped ? CPUMODE_HALT : 0); /* flags */
1628: if(model >= 68010) {
1629: save_u32 (regs.dfc); /* DFC */
1630: save_u32 (regs.sfc); /* SFC */
1631: save_u32 (regs.vbr); /* VBR */
1632: }
1633: if(model >= 68020) {
1634: save_u32 (caar); /* CAAR */
1635: save_u32 (cacr); /* CACR */
1636: save_u32 (regs.msp); /* MSP */
1637: }
1638: *len = dst - dstbak;
1639: return dstbak;
1640: }
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