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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
1.1 root 16: #include "memory.h"
17: #include "custom.h"
18: #include "newcpu.h"
19: #include "autoconf.h"
20: #include "ersatz.h"
21: #include "debug.h"
22: #include "compiler.h"
1.1.1.3 root 23: #include "gui.h"
1.1.1.14 root 24: #include "savestate.h"
1.1.1.18 root 25: #include "blitter.h"
1.1.1.3 root 26:
27: /* Opcode of faulting instruction */
28: uae_u16 last_op_for_exception_3;
29: /* PC at fault time */
30: uaecptr last_addr_for_exception_3;
31: /* Address that generated the exception */
32: uaecptr last_fault_for_exception_3;
1.1 root 33:
34: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
35: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
36:
37: int movem_index1[256];
38: int movem_index2[256];
39: int movem_next[256];
40:
41: int fpp_movem_index1[256];
42: int fpp_movem_index2[256];
43: int fpp_movem_next[256];
44:
45: cpuop_func *cpufunctbl[65536];
46:
1.1.1.3 root 47: #define COUNT_INSTRS 0
1.1 root 48:
49: #if COUNT_INSTRS
50: static unsigned long int instrcount[65536];
1.1.1.3 root 51: static uae_u16 opcodenums[65536];
1.1 root 52:
1.1.1.4 root 53: static int compfn (const void *el1, const void *el2)
1.1 root 54: {
1.1.1.3 root 55: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
56: }
57:
58: static char *icountfilename (void)
59: {
60: char *name = getenv ("INSNCOUNT");
61: if (name)
62: return name;
63: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 64: }
65:
1.1.1.4 root 66: void dump_counts (void)
1.1 root 67: {
1.1.1.4 root 68: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 69: unsigned long int total;
1.1 root 70: int i;
1.1.1.3 root 71:
72: write_log ("Writing instruction count file...\n");
1.1.1.4 root 73: for (i = 0; i < 65536; i++) {
1.1 root 74: opcodenums[i] = i;
1.1.1.3 root 75: total += instrcount[i];
1.1 root 76: }
1.1.1.4 root 77: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 78:
79: fprintf (f, "Total: %lu\n", total);
80: for (i=0; i < 65536; i++) {
1.1 root 81: unsigned long int cnt = instrcount[opcodenums[i]];
82: struct instr *dp;
83: struct mnemolookup *lookup;
84: if (!cnt)
85: break;
86: dp = table68k + opcodenums[i];
1.1.1.4 root 87: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
88: ;
1.1.1.3 root 89: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 90: }
1.1.1.4 root 91: fclose (f);
1.1 root 92: }
93: #else
1.1.1.4 root 94: void dump_counts (void)
1.1 root 95: {
96: }
97: #endif
98:
99: int broken_in;
100:
1.1.1.4 root 101: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
102:
103: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
104: {
1.1.1.8 root 105: op_illg (opcode);
1.1.1.4 root 106: return 4;
107: }
108:
1.1.1.3 root 109: static void build_cpufunctbl (void)
110: {
111: int i;
112: unsigned long opcode;
1.1.1.12 root 113: struct cputbl *tbl = (currprefs.cpu_level == 4 ? op_smalltbl_0_ff
114: : currprefs.cpu_level == 3 ? op_smalltbl_1_ff
115: : currprefs.cpu_level == 2 ? op_smalltbl_2_ff
116: : currprefs.cpu_level == 1 ? op_smalltbl_3_ff
117: : ! currprefs.cpu_compatible ? op_smalltbl_4_ff
118: : op_smalltbl_5_ff);
1.1.1.3 root 119:
1.1.1.4 root 120: write_log ("Building CPU function table (%d %d %d).\n",
121: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 122:
123: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.8 root 124: cpufunctbl[opcode] = op_illg_1;
1.1.1.3 root 125: for (i = 0; tbl[i].handler != NULL; i++) {
126: if (! tbl[i].specific)
1.1.1.8 root 127: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.3 root 128: }
129: for (opcode = 0; opcode < 65536; opcode++) {
130: cpuop_func *f;
131:
132: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
133: continue;
134:
135: if (table68k[opcode].handler != -1) {
1.1.1.8 root 136: f = cpufunctbl[table68k[opcode].handler];
1.1.1.4 root 137: if (f == op_illg_1)
1.1.1.3 root 138: abort();
1.1.1.8 root 139: cpufunctbl[opcode] = f;
1.1.1.3 root 140: }
141: }
142: for (i = 0; tbl[i].handler != NULL; i++) {
143: if (tbl[i].specific)
1.1.1.8 root 144: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.4 root 145: }
146: }
147:
148: unsigned long cycles_mask, cycles_val;
149:
150: static void update_68k_cycles (void)
151: {
152: cycles_mask = 0;
153: cycles_val = currprefs.m68k_speed;
154: if (currprefs.m68k_speed < 1) {
155: cycles_mask = 0xFFFFFFFF;
156: cycles_val = 0;
1.1.1.3 root 157: }
158: }
159:
160: void check_prefs_changed_cpu (void)
161: {
162: if (currprefs.cpu_level != changed_prefs.cpu_level
163: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
164: currprefs.cpu_level = changed_prefs.cpu_level;
165: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
166: build_cpufunctbl ();
167: }
1.1.1.4 root 168: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
169: currprefs.m68k_speed = changed_prefs.m68k_speed;
170: reset_frame_rate_hack ();
171: update_68k_cycles ();
172: }
1.1.1.3 root 173: }
174:
1.1 root 175: void init_m68k (void)
176: {
1.1.1.3 root 177: int i;
178:
1.1.1.4 root 179: update_68k_cycles ();
180:
1.1 root 181: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 182: int j;
1.1 root 183: for (j = 0 ; j < 8 ; j++) {
184: if (i & (1 << j)) break;
185: }
186: movem_index1[i] = j;
187: movem_index2[i] = 7-j;
188: movem_next[i] = i & (~(1 << j));
189: }
190: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 191: int j;
1.1 root 192: for (j = 7 ; j >= 0 ; j--) {
193: if (i & (1 << j)) break;
194: }
1.1.1.8 root 195: fpp_movem_index1[i] = 7-j;
196: fpp_movem_index2[i] = j;
1.1 root 197: fpp_movem_next[i] = i & (~(1 << j));
198: }
199: #if COUNT_INSTRS
200: {
1.1.1.4 root 201: FILE *f = fopen (icountfilename (), "r");
202: memset (instrcount, 0, sizeof instrcount);
1.1 root 203: if (f) {
1.1.1.3 root 204: uae_u32 opcode, count, total;
1.1 root 205: char name[20];
1.1.1.3 root 206: write_log ("Reading instruction count file...\n");
1.1.1.4 root 207: fscanf (f, "Total: %lu\n", &total);
208: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 209: instrcount[opcode] = count;
210: }
211: fclose(f);
212: }
213: }
214: #endif
1.1.1.5 root 215: write_log ("Building CPU table for configuration: 68");
216: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
217: write_log ("EC");
218: switch (currprefs.cpu_level) {
1.1.1.12 root 219: case 1:
1.1.1.5 root 220: write_log ("010");
221: break;
1.1.1.12 root 222: case 2:
1.1.1.5 root 223: write_log ("020");
224: break;
1.1.1.12 root 225: case 3:
1.1.1.5 root 226: write_log ("020/881");
227: break;
1.1.1.12 root 228: case 4:
229: /* Who is going to miss the MMU anyway...? :-) */
230: write_log ("040");
231: break;
232: default:
1.1.1.5 root 233: write_log ("000");
234: break;
235: }
236: if (currprefs.cpu_compatible)
237: write_log (" (compatible mode)");
238: write_log ("\n");
239:
1.1 root 240: read_table68k ();
241: do_merges ();
1.1.1.2 root 242:
1.1.1.4 root 243: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 244:
1.1.1.3 root 245: build_cpufunctbl ();
246: }
1.1.1.4 root 247:
1.1 root 248: struct regstruct regs, lastint_regs;
249: static struct regstruct regs_backup[16];
250: static int backup_pointer = 0;
1.1.1.3 root 251: static long int m68kpc_offset;
1.1 root 252: int lastint_no;
253:
1.1.1.3 root 254: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
255: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
256: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
257:
1.1.1.11 root 258: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 259: {
260: uae_u16 dp;
261: uae_s8 disp8;
262: uae_s16 disp16;
1.1 root 263: int r;
1.1.1.3 root 264: uae_u32 dispreg;
265: uaecptr addr;
266: uae_s32 offset = 0;
1.1.1.2 root 267: char buffer[80];
1.1.1.3 root 268:
269: switch (mode){
1.1 root 270: case Dreg:
1.1.1.3 root 271: sprintf (buffer,"D%d", reg);
1.1 root 272: break;
273: case Areg:
1.1.1.3 root 274: sprintf (buffer,"A%d", reg);
1.1 root 275: break;
276: case Aind:
1.1.1.3 root 277: sprintf (buffer,"(A%d)", reg);
1.1 root 278: break;
279: case Aipi:
1.1.1.3 root 280: sprintf (buffer,"(A%d)+", reg);
1.1 root 281: break;
282: case Apdi:
1.1.1.3 root 283: sprintf (buffer,"-(A%d)", reg);
1.1 root 284: break;
285: case Ad16:
1.1.1.4 root 286: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 287: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
288: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1.1.8 root 289: (unsigned long)addr);
1.1 root 290: break;
291: case Ad8r:
1.1.1.4 root 292: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 293: disp8 = dp & 0xFF;
294: r = (dp & 0x7000) >> 12;
1.1.1.3 root 295: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
296: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 297: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 298:
1.1 root 299: if (dp & 0x100) {
1.1.1.3 root 300: uae_s32 outer = 0, disp = 0;
301: uae_s32 base = m68k_areg(regs,reg);
302: char name[10];
303: sprintf (name,"A%d, ",reg);
304: if (dp & 0x80) { base = 0; name[0] = 0; }
305: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 306: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
307: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 308: base += disp;
309:
1.1.1.4 root 310: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
311: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 312:
313: if (!(dp & 4)) base += dispreg;
314: if (dp & 3) base = get_long (base);
315: if (dp & 4) base += dispreg;
316:
317: addr = base + outer;
318: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
319: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
320: 1 << ((dp >> 9) & 3),
321: disp,outer,
1.1.1.8 root 322: (unsigned long)addr);
1.1.1.3 root 323: } else {
324: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
325: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 326: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
327: 1 << ((dp >> 9) & 3), disp8,
1.1.1.8 root 328: (unsigned long)addr);
1.1 root 329: }
330: break;
331: case PC16:
1.1.1.4 root 332: addr = m68k_getpc () + m68kpc_offset;
333: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 334: addr += (uae_s16)disp16;
1.1.1.8 root 335: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
1.1 root 336: break;
337: case PC8r:
1.1.1.4 root 338: addr = m68k_getpc () + m68kpc_offset;
339: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 340: disp8 = dp & 0xFF;
341: r = (dp & 0x7000) >> 12;
1.1.1.2 root 342: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 343: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 344: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 345:
1.1 root 346: if (dp & 0x100) {
1.1.1.3 root 347: uae_s32 outer = 0,disp = 0;
348: uae_s32 base = addr;
349: char name[10];
350: sprintf (name,"PC, ");
351: if (dp & 0x80) { base = 0; name[0] = 0; }
352: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 353: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
354: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 355: base += disp;
356:
1.1.1.4 root 357: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
358: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 359:
360: if (!(dp & 4)) base += dispreg;
361: if (dp & 3) base = get_long (base);
362: if (dp & 4) base += dispreg;
363:
364: addr = base + outer;
365: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
366: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
367: 1 << ((dp >> 9) & 3),
368: disp,outer,
1.1.1.8 root 369: (unsigned long)addr);
1.1.1.2 root 370: } else {
1.1.1.3 root 371: addr += (uae_s32)((uae_s8)disp8) + dispreg;
372: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 373: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
1.1.1.8 root 374: disp8, (unsigned long)addr);
1.1 root 375: }
376: break;
377: case absw:
1.1.1.8 root 378: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 379: m68kpc_offset += 2;
1.1 root 380: break;
381: case absl:
1.1.1.8 root 382: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 383: m68kpc_offset += 4;
1.1 root 384: break;
385: case imm:
1.1.1.3 root 386: switch (size){
1.1 root 387: case sz_byte:
1.1.1.4 root 388: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 389: m68kpc_offset += 2;
390: break;
1.1 root 391: case sz_word:
1.1.1.4 root 392: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 393: m68kpc_offset += 2;
394: break;
1.1 root 395: case sz_long:
1.1.1.8 root 396: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 397: m68kpc_offset += 4;
398: break;
1.1 root 399: default:
400: break;
401: }
402: break;
403: case imm0:
1.1.1.4 root 404: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 405: m68kpc_offset += 2;
406: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 407: break;
408: case imm1:
1.1.1.4 root 409: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 410: m68kpc_offset += 2;
411: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 412: break;
413: case imm2:
1.1.1.4 root 414: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 415: m68kpc_offset += 4;
1.1.1.8 root 416: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 417: break;
418: case immi:
1.1.1.3 root 419: offset = (uae_s32)(uae_s8)(reg & 0xff);
1.1.1.8 root 420: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 421: break;
422: default:
423: break;
424: }
1.1.1.2 root 425: if (buf == 0)
1.1.1.11 root 426: fprintf (f, "%s", buffer);
1.1.1.2 root 427: else
1.1.1.4 root 428: strcat (buf, buffer);
1.1.1.2 root 429: return offset;
1.1 root 430: }
431:
1.1.1.3 root 432: /* The plan is that this will take over the job of exception 3 handling -
433: * the CPU emulation functions will just do a longjmp to m68k_go whenever
434: * they hit an odd address. */
1.1.1.4 root 435: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 436: {
437: uae_u16 dp;
438: uae_s8 disp8;
439: uae_s16 disp16;
440: int r;
441: uae_u32 dispreg;
442: uaecptr addr;
443: uae_s32 offset = 0;
444:
445: switch (mode){
446: case Dreg:
447: *val = m68k_dreg (regs, reg);
448: return 1;
449: case Areg:
450: *val = m68k_areg (regs, reg);
451: return 1;
452:
453: case Aind:
454: case Aipi:
455: addr = m68k_areg (regs, reg);
456: break;
457: case Apdi:
458: addr = m68k_areg (regs, reg);
459: break;
460: case Ad16:
1.1.1.4 root 461: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 462: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
463: break;
464: case Ad8r:
465: addr = m68k_areg (regs, reg);
466: d8r_common:
1.1.1.4 root 467: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 468: disp8 = dp & 0xFF;
469: r = (dp & 0x7000) >> 12;
470: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
471: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
472: dispreg <<= (dp >> 9) & 3;
473:
474: if (dp & 0x100) {
475: uae_s32 outer = 0, disp = 0;
476: uae_s32 base = addr;
477: if (dp & 0x80) base = 0;
478: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 479: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
480: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 481: base += disp;
482:
1.1.1.4 root 483: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
484: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 485:
486: if (!(dp & 4)) base += dispreg;
487: if (dp & 3) base = get_long (base);
488: if (dp & 4) base += dispreg;
489:
490: addr = base + outer;
491: } else {
492: addr += (uae_s32)((uae_s8)disp8) + dispreg;
493: }
494: break;
495: case PC16:
1.1.1.4 root 496: addr = m68k_getpc () + m68kpc_offset;
497: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 498: addr += (uae_s16)disp16;
499: break;
500: case PC8r:
1.1.1.4 root 501: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 502: goto d8r_common;
503: case absw:
1.1.1.4 root 504: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 505: m68kpc_offset += 2;
506: break;
507: case absl:
1.1.1.4 root 508: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 509: m68kpc_offset += 4;
510: break;
511: case imm:
512: switch (size){
513: case sz_byte:
1.1.1.4 root 514: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 515: m68kpc_offset += 2;
516: break;
517: case sz_word:
1.1.1.4 root 518: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 519: m68kpc_offset += 2;
520: break;
521: case sz_long:
1.1.1.4 root 522: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 523: m68kpc_offset += 4;
524: break;
525: default:
526: break;
527: }
528: return 1;
529: case imm0:
530: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
531: m68kpc_offset += 2;
532: return 1;
533: case imm1:
534: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
535: m68kpc_offset += 2;
536: return 1;
537: case imm2:
538: *val = get_ilong_1 (m68kpc_offset);
539: m68kpc_offset += 4;
540: return 1;
541: case immi:
542: *val = (uae_s32)(uae_s8)(reg & 0xff);
543: return 1;
544: default:
545: addr = 0;
546: break;
547: }
548: if ((addr & 1) == 0)
549: return 1;
550:
1.1.1.4 root 551: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 552: last_fault_for_exception_3 = addr;
553: return 0;
554: }
555:
1.1.1.5 root 556: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
557: {
558: int reg = (dp >> 12) & 15;
559: uae_s32 regd = regs.regs[reg];
560: if ((dp & 0x800) == 0)
561: regd = (uae_s32)(uae_s16)regd;
562: regd <<= (dp >> 9) & 3;
563: if (dp & 0x100) {
564: uae_s32 outer = 0;
565: if (dp & 0x80) base = 0;
566: if (dp & 0x40) regd = 0;
567:
568: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
569: if ((dp & 0x30) == 0x30) base += next_ilong();
570:
571: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
572: if ((dp & 0x3) == 0x3) outer = next_ilong();
573:
574: if ((dp & 0x4) == 0) base += regd;
575: if (dp & 0x3) base = get_long (base);
576: if (dp & 0x4) base += regd;
577:
578: return base + outer;
579: } else {
580: return base + (uae_s32)((uae_s8)dp) + regd;
581: }
582: }
583:
584: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
585: {
586: int reg = (dp >> 12) & 15;
587: uae_s32 regd = regs.regs[reg];
588: #if 1
589: if ((dp & 0x800) == 0)
590: regd = (uae_s32)(uae_s16)regd;
591: return base + (uae_s8)dp + regd;
592: #else
593: /* Branch-free code... benchmark this again now that
594: * things are no longer inline. */
595: uae_s32 regd16;
596: uae_u32 mask;
597: mask = ((dp & 0x800) >> 11) - 1;
598: regd16 = (uae_s32)(uae_s16)regd;
599: regd16 &= mask;
600: mask = ~mask;
601: base += (uae_s8)dp;
602: regd &= mask;
603: regd |= regd16;
604: return base + regd;
605: #endif
606: }
607:
1.1.1.4 root 608: void MakeSR (void)
1.1 root 609: {
610: #if 0
611: assert((regs.t1 & 1) == regs.t1);
612: assert((regs.t0 & 1) == regs.t0);
613: assert((regs.s & 1) == regs.s);
614: assert((regs.m & 1) == regs.m);
615: assert((XFLG & 1) == XFLG);
616: assert((NFLG & 1) == NFLG);
617: assert((ZFLG & 1) == ZFLG);
618: assert((VFLG & 1) == VFLG);
619: assert((CFLG & 1) == CFLG);
620: #endif
621: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
622: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 root 623: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
624: | GET_CFLG);
1.1 root 625: }
626:
1.1.1.4 root 627: void MakeFromSR (void)
1.1 root 628: {
629: int oldm = regs.m;
630: int olds = regs.s;
631:
632: regs.t1 = (regs.sr >> 15) & 1;
633: regs.t0 = (regs.sr >> 14) & 1;
634: regs.s = (regs.sr >> 13) & 1;
635: regs.m = (regs.sr >> 12) & 1;
636: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 root 637: SET_XFLG ((regs.sr >> 4) & 1);
638: SET_NFLG ((regs.sr >> 3) & 1);
639: SET_ZFLG ((regs.sr >> 2) & 1);
640: SET_VFLG ((regs.sr >> 1) & 1);
641: SET_CFLG (regs.sr & 1);
1.1.1.3 root 642: if (currprefs.cpu_level >= 2) {
1.1 root 643: if (olds != regs.s) {
1.1.1.3 root 644: if (olds) {
645: if (oldm)
646: regs.msp = m68k_areg(regs, 7);
647: else
648: regs.isp = m68k_areg(regs, 7);
649: m68k_areg(regs, 7) = regs.usp;
650: } else {
651: regs.usp = m68k_areg(regs, 7);
652: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
653: }
1.1 root 654: } else if (olds && oldm != regs.m) {
655: if (oldm) {
1.1.1.2 root 656: regs.msp = m68k_areg(regs, 7);
657: m68k_areg(regs, 7) = regs.isp;
658: } else {
659: regs.isp = m68k_areg(regs, 7);
660: m68k_areg(regs, 7) = regs.msp;
1.1 root 661: }
662: }
663: } else {
664: if (olds != regs.s) {
1.1.1.3 root 665: if (olds) {
666: regs.isp = m68k_areg(regs, 7);
667: m68k_areg(regs, 7) = regs.usp;
668: } else {
669: regs.usp = m68k_areg(regs, 7);
670: m68k_areg(regs, 7) = regs.isp;
671: }
672: }
1.1 root 673: }
1.1.1.3 root 674:
1.1.1.12 root 675: set_special (SPCFLAG_INT);
1.1 root 676: if (regs.t1 || regs.t0)
1.1.1.12 root 677: set_special (SPCFLAG_TRACE);
1.1 root 678: else
1.1.1.16 root 679: /* Keep SPCFLAG_DOTRACE, we still want a trace exception for
680: SR-modifying instructions (including STOP). */
681: unset_special (SPCFLAG_TRACE);
1.1 root 682: }
683:
1.1.1.3 root 684: void Exception(int nr, uaecptr oldpc)
1.1 root 685: {
1.1.1.12 root 686: uae_u32 currpc = m68k_getpc ();
687:
1.1.1.2 root 688: compiler_flush_jsr_stack();
1.1 root 689: MakeSR();
1.1.1.12 root 690:
1.1 root 691: if (!regs.s) {
1.1.1.2 root 692: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 693: if (currprefs.cpu_level >= 2)
694: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
695: else
696: m68k_areg(regs, 7) = regs.isp;
1.1 root 697: regs.s = 1;
698: }
1.1.1.3 root 699: if (currprefs.cpu_level > 0) {
1.1 root 700: if (nr == 2 || nr == 3) {
701: int i;
1.1.1.3 root 702: /* @@@ this is probably wrong (?) */
1.1 root 703: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 704: m68k_areg(regs, 7) -= 2;
705: put_word (m68k_areg(regs, 7), 0);
1.1 root 706: }
1.1.1.2 root 707: m68k_areg(regs, 7) -= 2;
708: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 709: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 710: m68k_areg(regs, 7) -= 4;
711: put_long (m68k_areg(regs, 7), oldpc);
712: m68k_areg(regs, 7) -= 2;
713: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
714: } else if (regs.m && nr >= 24 && nr < 32) {
715: m68k_areg(regs, 7) -= 2;
716: put_word (m68k_areg(regs, 7), nr * 4);
717: m68k_areg(regs, 7) -= 4;
1.1.1.12 root 718: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 719: m68k_areg(regs, 7) -= 2;
720: put_word (m68k_areg(regs, 7), regs.sr);
721: regs.sr |= (1 << 13);
722: regs.msp = m68k_areg(regs, 7);
723: m68k_areg(regs, 7) = regs.isp;
724: m68k_areg(regs, 7) -= 2;
725: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
726: } else {
727: m68k_areg(regs, 7) -= 2;
728: put_word (m68k_areg(regs, 7), nr * 4);
729: }
730: } else {
731: if (nr == 2 || nr == 3) {
732: m68k_areg(regs, 7) -= 12;
733: /* ??????? */
734: if (nr == 3) {
735: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
736: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
737: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
738: }
739: write_log ("Exception!\n");
740: goto kludge_me_do;
741: }
1.1 root 742: }
1.1.1.2 root 743: m68k_areg(regs, 7) -= 4;
1.1.1.12 root 744: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 745: kludge_me_do:
1.1.1.2 root 746: m68k_areg(regs, 7) -= 2;
747: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 748: m68k_setpc (get_long (regs.vbr + 4*nr));
749: fill_prefetch_0 ();
1.1 root 750: regs.t1 = regs.t0 = regs.m = 0;
1.1.1.12 root 751: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 752: }
753:
1.1.1.17 root 754: static void Interrupt (int nr)
1.1 root 755: {
756: assert(nr < 8 && nr >= 0);
757: lastint_regs = regs;
758: lastint_no = nr;
759: Exception(nr+24, 0);
1.1.1.3 root 760:
1.1 root 761: regs.intmask = nr;
1.1.1.12 root 762: set_special (SPCFLAG_INT);
1.1 root 763: }
764:
1.1.1.15 root 765: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp;
1.1 root 766:
1.1.1.9 root 767: int m68k_move2c (int regno, uae_u32 *regp)
1.1 root 768: {
1.1.1.12 root 769: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
770: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
771: || (currprefs.cpu_level == 4 && regno == 0x802))
772: {
1.1 root 773: op_illg (0x4E7B);
1.1.1.9 root 774: return 0;
1.1.1.12 root 775: } else {
1.1 root 776: switch (regno) {
1.1.1.12 root 777: case 0: regs.sfc = *regp & 7; break;
778: case 1: regs.dfc = *regp & 7; break;
779: case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break;
780: case 3: tc = *regp & 0xc000; break;
1.1.1.15 root 781: /* Mask out fields that should be zero. */
1.1.1.12 root 782: case 4: itt0 = *regp & 0xffffe364; break;
783: case 5: itt1 = *regp & 0xffffe364; break;
784: case 6: dtt0 = *regp & 0xffffe364; break;
785: case 7: dtt1 = *regp & 0xffffe364; break;
786:
787: case 0x800: regs.usp = *regp; break;
788: case 0x801: regs.vbr = *regp; break;
789: case 0x802: caar = *regp & 0xfc; break;
790: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
791: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1.1.15 root 792: case 0x805: mmusr = *regp; break;
793: case 0x806: urp = *regp; break;
794: case 0x807: srp = *regp; break;
1.1.1.12 root 795: default:
1.1 root 796: op_illg (0x4E7B);
1.1.1.9 root 797: return 0;
1.1 root 798: }
1.1.1.12 root 799: }
1.1.1.9 root 800: return 1;
1.1 root 801: }
802:
1.1.1.9 root 803: int m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 804: {
1.1.1.12 root 805: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
806: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
807: || (currprefs.cpu_level == 4 && regno == 0x802))
808: {
1.1 root 809: op_illg (0x4E7A);
1.1.1.9 root 810: return 0;
1.1.1.12 root 811: } else {
1.1 root 812: switch (regno) {
1.1.1.12 root 813: case 0: *regp = regs.sfc; break;
814: case 1: *regp = regs.dfc; break;
815: case 2: *regp = cacr; break;
816: case 3: *regp = tc; break;
817: case 4: *regp = itt0; break;
818: case 5: *regp = itt1; break;
819: case 6: *regp = dtt0; break;
820: case 7: *regp = dtt1; break;
821: case 0x800: *regp = regs.usp; break;
822: case 0x801: *regp = regs.vbr; break;
823: case 0x802: *regp = caar; break;
824: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
825: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
826: case 0x805: *regp = mmusr; break;
1.1.1.15 root 827: case 0x806: *regp = urp; break;
828: case 0x807: *regp = srp; break;
1.1.1.12 root 829: default:
1.1 root 830: op_illg (0x4E7A);
1.1.1.9 root 831: return 0;
1.1 root 832: }
1.1.1.12 root 833: }
1.1.1.9 root 834: return 1;
1.1 root 835: }
836:
1.1.1.8 root 837: STATIC_INLINE int
1.1.1.3 root 838: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 839: {
1.1.1.3 root 840: uae_u32 q = 0, cbit = 0;
1.1 root 841: int i;
842:
843: if (div <= src_hi) {
1.1.1.4 root 844: return 1;
1.1 root 845: }
846: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 847: cbit = src_hi & 0x80000000ul;
1.1 root 848: src_hi <<= 1;
1.1.1.2 root 849: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 850: src_lo <<= 1;
851: q = q << 1;
852: if (cbit || div <= src_hi) {
853: q |= 1;
854: src_hi -= div;
855: }
856: }
857: *quot = q;
858: *rem = src_hi;
1.1.1.4 root 859: return 0;
1.1 root 860: }
861:
1.1.1.3 root 862: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 863: {
1.1.1.3 root 864: #if defined(uae_s64)
1.1 root 865: if (src == 0) {
1.1.1.4 root 866: Exception (5, oldpc);
1.1 root 867: return;
868: }
869: if (extra & 0x800) {
870: /* signed variant */
1.1.1.3 root 871: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
872: uae_s64 quot, rem;
873:
1.1 root 874: if (extra & 0x400) {
1.1.1.3 root 875: a &= 0xffffffffu;
876: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 877: }
1.1.1.3 root 878: rem = a % (uae_s64)(uae_s32)src;
879: quot = a / (uae_s64)(uae_s32)src;
880: if ((quot & UVAL64(0xffffffff80000000)) != 0
881: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
882: {
1.1.1.6 root 883: SET_VFLG (1);
884: SET_NFLG (1);
885: SET_CFLG (0);
1.1.1.4 root 886: } else {
1.1.1.3 root 887: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 root 888: SET_VFLG (0);
889: SET_CFLG (0);
890: SET_ZFLG (((uae_s32)quot) == 0);
891: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 892: m68k_dreg(regs, extra & 7) = rem;
893: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 894: }
895: } else {
896: /* unsigned */
1.1.1.3 root 897: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
898: uae_u64 quot, rem;
899:
1.1 root 900: if (extra & 0x400) {
1.1.1.3 root 901: a &= 0xffffffffu;
902: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 903: }
1.1.1.3 root 904: rem = a % (uae_u64)src;
905: quot = a / (uae_u64)src;
906: if (quot > 0xffffffffu) {
1.1.1.6 root 907: SET_VFLG (1);
908: SET_NFLG (1);
909: SET_CFLG (0);
1.1.1.4 root 910: } else {
1.1.1.6 root 911: SET_VFLG (0);
912: SET_CFLG (0);
913: SET_ZFLG (((uae_s32)quot) == 0);
914: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 915: m68k_dreg(regs, extra & 7) = rem;
916: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 917: }
918: }
919: #else
920: if (src == 0) {
1.1.1.4 root 921: Exception (5, oldpc);
1.1 root 922: return;
923: }
924: if (extra & 0x800) {
925: /* signed variant */
1.1.1.3 root 926: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
927: uae_s32 hi = lo < 0 ? -1 : 0;
928: uae_s32 save_high;
929: uae_u32 quot, rem;
930: uae_u32 sign;
931:
1.1 root 932: if (extra & 0x400) {
1.1.1.3 root 933: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 934: }
935: save_high = hi;
936: sign = (hi ^ src);
937: if (hi < 0) {
1.1.1.4 root 938: hi = ~hi;
939: lo = -lo;
940: if (lo == 0) hi++;
1.1 root 941: }
1.1.1.3 root 942: if ((uae_s32)src < 0) src = -src;
1.1 root 943: if (div_unsigned(hi, lo, src, ", &rem) ||
944: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 root 945: SET_VFLG (1);
946: SET_NFLG (1);
947: SET_CFLG (0);
1.1.1.4 root 948: } else {
1.1 root 949: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 950: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 root 951: SET_VFLG (0);
952: SET_CFLG (0);
953: SET_ZFLG (((uae_s32)quot) == 0);
954: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 955: m68k_dreg(regs, extra & 7) = rem;
956: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 957: }
958: } else {
959: /* unsigned */
1.1.1.3 root 960: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
961: uae_u32 hi = 0;
962: uae_u32 quot, rem;
963:
1.1 root 964: if (extra & 0x400) {
1.1.1.3 root 965: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 966: }
967: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 root 968: SET_VFLG (1);
969: SET_NFLG (1);
970: SET_CFLG (0);
1.1.1.4 root 971: } else {
1.1.1.6 root 972: SET_VFLG (0);
973: SET_CFLG (0);
974: SET_ZFLG (((uae_s32)quot) == 0);
975: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 976: m68k_dreg(regs, extra & 7) = rem;
977: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 978: }
979: }
980: #endif
981: }
982:
1.1.1.8 root 983: STATIC_INLINE void
1.1.1.3 root 984: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 985: {
1.1.1.3 root 986: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
987: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
988: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
989: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
990: uae_u32 lo;
991:
992: lo = r0 + ((r1 << 16) & 0xffff0000ul);
993: if (lo < r0) r3++;
994: r0 = lo;
995: lo = r0 + ((r2 << 16) & 0xffff0000ul);
996: if (lo < r0) r3++;
997: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 998: *dst_lo = lo;
999: *dst_hi = r3;
1000: }
1001:
1.1.1.3 root 1002: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 1003: {
1.1.1.3 root 1004: #if defined(uae_s64)
1.1 root 1005: if (extra & 0x800) {
1006: /* signed variant */
1.1.1.3 root 1007: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1008:
1.1.1.3 root 1009: a *= (uae_s64)(uae_s32)src;
1.1.1.6 root 1010: SET_VFLG (0);
1011: SET_CFLG (0);
1012: SET_ZFLG (a == 0);
1013: SET_NFLG (a < 0);
1.1 root 1014: if (extra & 0x400)
1.1.1.2 root 1015: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1016: else if ((a & UVAL64(0xffffffff80000000)) != 0
1017: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1018: {
1.1.1.6 root 1019: SET_VFLG (1);
1.1 root 1020: }
1.1.1.3 root 1021: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1022: } else {
1023: /* unsigned */
1.1.1.3 root 1024: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1025:
1026: a *= (uae_u64)src;
1.1.1.6 root 1027: SET_VFLG (0);
1028: SET_CFLG (0);
1029: SET_ZFLG (a == 0);
1030: SET_NFLG (((uae_s64)a) < 0);
1.1 root 1031: if (extra & 0x400)
1.1.1.2 root 1032: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1033: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 root 1034: SET_VFLG (1);
1.1 root 1035: }
1.1.1.3 root 1036: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1037: }
1038: #else
1039: if (extra & 0x800) {
1040: /* signed variant */
1.1.1.3 root 1041: uae_s32 src1,src2;
1042: uae_u32 dst_lo,dst_hi;
1043: uae_u32 sign;
1.1 root 1044:
1.1.1.3 root 1045: src1 = (uae_s32)src;
1046: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1047: sign = (src1 ^ src2);
1048: if (src1 < 0) src1 = -src1;
1049: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1050: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1051: if (sign & 0x80000000) {
1052: dst_hi = ~dst_hi;
1053: dst_lo = -dst_lo;
1054: if (dst_lo == 0) dst_hi++;
1055: }
1.1.1.6 root 1056: SET_VFLG (0);
1057: SET_CFLG (0);
1058: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1059: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1060: if (extra & 0x400)
1.1.1.2 root 1061: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1062: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1063: && ((dst_hi & 0xffffffff) != 0xffffffff
1064: || (dst_lo & 0x80000000) != 0x80000000))
1065: {
1.1.1.6 root 1066: SET_VFLG (1);
1.1 root 1067: }
1.1.1.2 root 1068: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1069: } else {
1070: /* unsigned */
1.1.1.3 root 1071: uae_u32 dst_lo,dst_hi;
1072:
1073: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1074:
1.1.1.6 root 1075: SET_VFLG (0);
1076: SET_CFLG (0);
1077: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1078: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1079: if (extra & 0x400)
1.1.1.2 root 1080: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1081: else if (dst_hi != 0) {
1.1.1.6 root 1082: SET_VFLG (1);
1.1 root 1083: }
1.1.1.2 root 1084: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1085: }
1086: #endif
1087: }
1088: static char* ccnames[] =
1089: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1090: "VC","VS","PL","MI","GE","LT","GT","LE" };
1091:
1.1.1.4 root 1092: void m68k_reset (void)
1.1 root 1093: {
1.1.1.14 root 1094: regs.kick_mask = 0x00F80000;
1095: regs.spcflags = 0;
1096: if (savestate_state == STATE_RESTORE) {
1097: m68k_setpc (regs.pc);
1098: /* MakeFromSR() must not swap stack pointer */
1099: regs.s = (regs.sr >> 13) & 1;
1100: MakeFromSR();
1101: /* set stack pointer */
1102: if (regs.s)
1103: m68k_areg(regs, 7) = regs.isp;
1104: else
1105: m68k_areg(regs, 7) = regs.usp;
1106: return;
1107: }
1108:
1.1.1.3 root 1109: m68k_areg (regs, 7) = get_long (0x00f80000);
1110: m68k_setpc (get_long (0x00f80004));
1.1.1.16 root 1111: refill_prefetch (m68k_getpc (), 0);
1.1.1.3 root 1112: fill_prefetch_0 ();
1.1 root 1113: regs.s = 1;
1114: regs.m = 0;
1115: regs.stopped = 0;
1116: regs.t1 = 0;
1117: regs.t0 = 0;
1.1.1.6 root 1118: SET_ZFLG (0);
1119: SET_XFLG (0);
1120: SET_CFLG (0);
1121: SET_VFLG (0);
1122: SET_NFLG (0);
1.1 root 1123: regs.intmask = 7;
1124: regs.vbr = regs.sfc = regs.dfc = 0;
1125: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1126: }
1127:
1.1.1.4 root 1128: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1129: {
1.1.1.3 root 1130: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1131:
1.1.1.3 root 1132: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1133: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1134: m68k_incpc (2);
1135: fill_prefetch_0 ();
1.1.1.4 root 1136: return 4;
1.1.1.3 root 1137: }
1138:
1139: compiler_flush_jsr_stack ();
1140: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1141: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1142: broken_in = 1;
1.1.1.12 root 1143: set_special (SPCFLAG_BRK);
1.1 root 1144: quit_program = 1;
1145: }
1.1.1.2 root 1146: if (opcode == 0xFF0D) {
1.1.1.3 root 1147: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1148: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1149: uae_u16 arg = get_iword (2);
1150: m68k_incpc (4);
1151: ersatz_perform (arg);
1152: fill_prefetch_0 ();
1.1.1.4 root 1153: return 4;
1.1.1.17 root 1154: } else if ((pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.2 root 1155: /* User-mode STOP replacement */
1.1.1.3 root 1156: m68k_setstopped (1);
1.1.1.4 root 1157: return 4;
1.1.1.2 root 1158: }
1.1 root 1159: }
1.1.1.3 root 1160:
1.1.1.17 root 1161: if ((opcode & 0xF000) == 0xA000 && (pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.3 root 1162: /* Calltrap. */
1163: m68k_incpc(2);
1164: call_calltrap (opcode & 0xFFF);
1165: fill_prefetch_0 ();
1.1.1.4 root 1166: return 4;
1.1.1.3 root 1167: }
1168:
1.1 root 1169: if ((opcode & 0xF000) == 0xF000) {
1170: Exception(0xB,0);
1.1.1.4 root 1171: return 4;
1.1 root 1172: }
1173: if ((opcode & 0xF000) == 0xA000) {
1.1.1.17 root 1174: if ((pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.3 root 1175: /* Calltrap. */
1176: call_calltrap (opcode & 0xFFF);
1177: }
1178: Exception(0xA,0);
1.1.1.4 root 1179: return 4;
1.1 root 1180: }
1.1.1.12 root 1181: #if 1
1.1.1.4 root 1182: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.10 root 1183: #endif
1.1.1.3 root 1184: Exception (4,0);
1.1.1.4 root 1185: return 4;
1.1 root 1186: }
1187:
1.1.1.3 root 1188: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1189: {
1.1.1.12 root 1190: if ((opcode & 0xFE0) == 0x0500) {
1191: /* PFLUSH */
1192: mmusr = 0;
1193: write_log ("PFLUSH\n");
1194: } else if ((opcode & 0x0FD8) == 0x548) {
1195: /* PTEST */
1196: write_log ("PTEST\n");
1.1 root 1197: } else
1.1.1.3 root 1198: op_illg (opcode);
1.1 root 1199: }
1200:
1.1.1.4 root 1201: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1202:
1.1.1.3 root 1203: static uaecptr last_trace_ad = 0;
1.1 root 1204:
1.1.1.7 root 1205: static void do_trace (void)
1.1 root 1206: {
1.1.1.11 root 1207: if (regs.t0 && currprefs.cpu_level >= 2) {
1.1.1.7 root 1208: uae_u16 opcode;
1209: /* should also include TRAP, CHK, SR modification FPcc */
1210: /* probably never used so why bother */
1211: /* We can afford this to be inefficient... */
1212: m68k_setpc (m68k_getpc ());
1213: fill_prefetch_0 ();
1214: opcode = get_word (regs.pc);
1215: if (opcode == 0x4e72 /* RTE */
1216: || opcode == 0x4e74 /* RTD */
1217: || opcode == 0x4e75 /* RTS */
1218: || opcode == 0x4e77 /* RTR */
1219: || opcode == 0x4e76 /* TRAPV */
1220: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1221: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1222: || (opcode & 0xff00) == 0x6100 /* BSR */
1223: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1224: && cctrue((opcode >> 8) & 0xf))
1225: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1226: && !cctrue((opcode >> 8) & 0xf)
1227: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1228: {
1.1.1.4 root 1229: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1230: unset_special (SPCFLAG_TRACE);
1231: set_special (SPCFLAG_DOTRACE);
1.1 root 1232: }
1.1.1.7 root 1233: } else if (regs.t1) {
1234: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1235: unset_special (SPCFLAG_TRACE);
1236: set_special (SPCFLAG_DOTRACE);
1.1 root 1237: }
1238: }
1239:
1.1.1.19! root 1240: static int do_specialties (int cycles)
1.1 root 1241: {
1.1.1.9 root 1242: if (regs.spcflags & SPCFLAG_COPPER)
1243: do_copper ();
1244:
1.1.1.3 root 1245: /*n_spcinsns++;*/
1.1.1.19! root 1246: while ((regs.spcflags & SPCFLAG_BLTNASTY) && cycles > 0) {
1.1.1.18 root 1247: int c = blitnasty();
1.1.1.19! root 1248: if (!c) {
! 1249: cycles -= 2 * CYCLE_UNIT;
! 1250: if (cycles < CYCLE_UNIT)
! 1251: cycles = 0;
! 1252: c = 1;
! 1253: }
1.1.1.18 root 1254: do_cycles (c * CYCLE_UNIT);
1.1.1.9 root 1255: if (regs.spcflags & SPCFLAG_COPPER)
1256: do_copper ();
1.1.1.3 root 1257: }
1.1.1.9 root 1258:
1.1.1.3 root 1259: run_compiled_code();
1260: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1261: Exception (9,last_trace_ad);
1.1.1.3 root 1262: }
1263: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.13 root 1264: do_cycles (4 * CYCLE_UNIT);
1.1.1.9 root 1265: if (regs.spcflags & SPCFLAG_COPPER)
1266: do_copper ();
1.1.1.3 root 1267: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1268: int intr = intlev ();
1.1.1.12 root 1269: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1270: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1271: Interrupt (intr);
1.1.1.3 root 1272: regs.stopped = 0;
1.1.1.12 root 1273: unset_special (SPCFLAG_STOP);
1.1.1.2 root 1274: }
1.1.1.3 root 1275: }
1276: }
1.1.1.7 root 1277: if (regs.spcflags & SPCFLAG_TRACE)
1278: do_trace ();
1.1.1.4 root 1279:
1.1.1.3 root 1280: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1281: int intr = intlev ();
1.1.1.12 root 1282: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1283: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1284: Interrupt (intr);
1.1.1.3 root 1285: regs.stopped = 0;
1286: }
1287: }
1288: if (regs.spcflags & SPCFLAG_INT) {
1.1.1.12 root 1289: unset_special (SPCFLAG_INT);
1290: set_special (SPCFLAG_DOINT);
1.1.1.3 root 1291: }
1.1.1.4 root 1292: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1.1.1.12 root 1293: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1294: return 1;
1.1.1.2 root 1295: }
1.1.1.3 root 1296: return 0;
1.1.1.2 root 1297: }
1298:
1.1.1.8 root 1299: /* It's really sad to have two almost identical functions for this, but we
1300: do it all for performance... :( */
1.1.1.4 root 1301: static void m68k_run_1 (void)
1.1.1.2 root 1302: {
1.1.1.12 root 1303: #ifdef DEBUG_PREFETCH
1304: uae_u8 saved_bytes[20];
1305: uae_u16 *oldpcp;
1306: #endif
1.1.1.3 root 1307: for (;;) {
1.1.1.4 root 1308: int cycles;
1.1.1.8 root 1309: uae_u32 opcode = get_iword_prefetch (0);
1.1.1.12 root 1310: #ifdef DEBUG_PREFETCH
1.1.1.8 root 1311: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1.1.1.17 root 1312: write_log ("Prefetch differs from memory.\n");
1.1.1.8 root 1313: debugging = 1;
1314: return;
1315: }
1.1.1.12 root 1316: oldpcp = regs.pc_p;
1317: memcpy (saved_bytes, regs.pc_p, 20);
1.1.1.8 root 1318: #endif
1319: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1320: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1321: #if COUNT_INSTRS == 2
1322: if (table68k[opcode].handler != -1)
1323: instrcount[table68k[opcode].handler]++;
1324: #elif COUNT_INSTRS == 1
1325: instrcount[opcode]++;
1326: #endif
1327: #if defined X86_ASSEMBLY
1328: __asm__ __volatile__("\tcall *%%ebx"
1329: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1330: : "%edx", "%ecx",
1331: "%esi", "%edi", "%ebp", "memory", "cc");
1332: #else
1333: cycles = (*cpufunctbl[opcode])(opcode);
1334: #endif
1.1.1.12 root 1335: #ifdef DEBUG_PREFETCH
1336: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1.1.1.17 root 1337: write_log ("Self-modifying code detected.\n");
1.1.1.12 root 1338: set_special (SPCFLAG_BRK);
1339: debugging = 1;
1340: }
1341: #endif
1.1.1.8 root 1342: /*n_insns++;*/
1343: cycles &= cycles_mask;
1344: cycles |= cycles_val;
1345: do_cycles (cycles);
1346: if (regs.spcflags) {
1.1.1.19! root 1347: if (do_specialties (cycles))
1.1.1.8 root 1348: return;
1349: }
1350: }
1351: }
1352:
1.1.1.12 root 1353: #define DEBUG_PREFETCH
1354:
1.1.1.8 root 1355: /* Same thing, but don't use prefetch to get opcode. */
1356: static void m68k_run_2 (void)
1357: {
1358: for (;;) {
1359: int cycles;
1360: uae_u32 opcode = get_iword (0);
1.1.1.12 root 1361:
1.1.1.2 root 1362: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1363: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1364: #if COUNT_INSTRS == 2
1.1.1.8 root 1365: if (table68k[opcode].handler != -1)
1366: instrcount[table68k[opcode].handler]++;
1.1.1.3 root 1367: #elif COUNT_INSTRS == 1
1.1.1.2 root 1368: instrcount[opcode]++;
1369: #endif
1.1.1.8 root 1370: #if defined X86_ASSEMBLY
1.1.1.3 root 1371: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1372: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1373: : "%edx", "%ecx",
1374: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1375: #else
1.1.1.4 root 1376: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1377: #endif
1.1.1.12 root 1378:
1.1.1.2 root 1379: /*n_insns++;*/
1.1.1.4 root 1380: cycles &= cycles_mask;
1381: cycles |= cycles_val;
1.1.1.19! root 1382: do_cycles (cycles);
1.1.1.2 root 1383: if (regs.spcflags) {
1.1.1.19! root 1384: if (do_specialties (cycles))
1.1 root 1385: return;
1386: }
1387: }
1388: }
1389:
1390: #ifdef X86_ASSEMBLY
1.1.1.9 root 1391: STATIC_INLINE void m68k_run1 (void (*func)(void))
1.1 root 1392: {
1393: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.8 root 1394: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp"
1395: : : "r" (func) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1396: }
1.1.1.2 root 1397: #else
1.1.1.13 root 1398: #define m68k_run1(F) (F) ()
1.1.1.2 root 1399: #endif
1400:
1.1.1.3 root 1401: int in_m68k_go = 0;
1.1 root 1402:
1.1.1.4 root 1403: void m68k_go (int may_quit)
1.1 root 1404: {
1.1.1.3 root 1405: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1406: write_log ("Bug! m68k_go is not reentrant.\n");
1407: abort ();
1.1.1.3 root 1408: }
1.1.1.4 root 1409:
1410: reset_frame_rate_hack ();
1411: update_68k_cycles ();
1412:
1.1.1.3 root 1413: in_m68k_go++;
1414: for (;;) {
1415: if (quit_program > 0) {
1416: if (quit_program == 1)
1.1 root 1417: break;
1.1.1.3 root 1418: quit_program = 0;
1.1.1.18 root 1419: if (savestate_state == STATE_RESTORE) {
1420: restore_state (savestate_filename);
1421: #if 0
1422: activate_debugger ();
1423: #endif
1424: }
1.1.1.4 root 1425: m68k_reset ();
1426: reset_all_systems ();
1427: customreset ();
1.1.1.14 root 1428: /* We may have been restoring state, but we're done now. */
1429: savestate_restore_finish ();
1430: handle_active_events ();
1.1.1.18 root 1431: if (regs.spcflags)
1.1.1.19! root 1432: do_specialties (0);
1.1 root 1433: }
1.1.1.14 root 1434:
1.1.1.3 root 1435: if (debugging)
1.1.1.4 root 1436: debug ();
1.1.1.8 root 1437: m68k_run1 (currprefs.cpu_compatible ? m68k_run_1 : m68k_run_2);
1.1 root 1438: }
1.1.1.3 root 1439: in_m68k_go--;
1.1 root 1440: }
1441:
1.1.1.4 root 1442: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1443: {
1.1.1.3 root 1444: uae_u32 opcode, val;
1445: struct instr *dp;
1446:
1447: opcode = get_iword_1(0);
1448: last_op_for_exception_3 = opcode;
1449: m68kpc_offset = 2;
1450:
1.1.1.8 root 1451: if (cpufunctbl[opcode] == op_illg_1) {
1.1.1.3 root 1452: opcode = 0x4AFC;
1453: }
1454: dp = table68k + opcode;
1455:
1456: if (dp->suse) {
1457: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1458: Exception (3, 0);
1459: return;
1460: }
1461: }
1462: if (dp->duse) {
1463: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1464: Exception (3, 0);
1465: return;
1466: }
1467: }
1468: }
1469:
1.1.1.11 root 1470: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1471: {
1472: uaecptr newpc = 0;
1.1.1.4 root 1473: m68kpc_offset = addr - m68k_getpc ();
1474: while (cnt-- > 0) {
1.1 root 1475: char instrname[20],*ccpt;
1476: int opwords;
1.1.1.3 root 1477: uae_u32 opcode;
1.1 root 1478: struct mnemolookup *lookup;
1479: struct instr *dp;
1.1.1.11 root 1480: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1481: for (opwords = 0; opwords < 5; opwords++){
1.1.1.11 root 1482: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1483: }
1.1.1.4 root 1484: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1485: m68kpc_offset += 2;
1.1.1.8 root 1486: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1487: opcode = 0x4AFC;
1488: }
1489: dp = table68k + opcode;
1490: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1491: ;
1.1.1.3 root 1492:
1.1.1.4 root 1493: strcpy (instrname, lookup->name);
1494: ccpt = strstr (instrname, "cc");
1.1 root 1495: if (ccpt != 0) {
1.1.1.4 root 1496: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1497: }
1.1.1.11 root 1498: fprintf (f, "%s", instrname);
1.1.1.3 root 1499: switch (dp->size){
1.1.1.11 root 1500: case sz_byte: fprintf (f, ".B "); break;
1501: case sz_word: fprintf (f, ".W "); break;
1502: case sz_long: fprintf (f, ".L "); break;
1503: default: fprintf (f, " "); break;
1.1 root 1504: }
1505:
1506: if (dp->suse) {
1.1.1.4 root 1507: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1508: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1.1 root 1509: }
1510: if (dp->suse && dp->duse)
1.1.1.11 root 1511: fprintf (f, ",");
1.1 root 1512: if (dp->duse) {
1.1.1.4 root 1513: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1514: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1515: }
1516: if (ccpt != 0) {
1517: if (cctrue(dp->cc))
1.1.1.11 root 1518: fprintf (f, " == %08lx (TRUE)", newpc);
1.1.1.3 root 1519: else
1.1.1.11 root 1520: fprintf (f, " == %08lx (FALSE)", newpc);
1.1 root 1521: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.11 root 1522: fprintf (f, " == %08lx", newpc);
1523: fprintf (f, "\n");
1.1 root 1524: }
1.1.1.4 root 1525: if (nextpc)
1526: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1527: }
1528:
1.1.1.11 root 1529: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1.1 root 1530: {
1531: int i;
1.1.1.3 root 1532: for (i = 0; i < 8; i++){
1.1.1.11 root 1533: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1534: if ((i & 3) == 3) fprintf (f, "\n");
1.1.1.3 root 1535: }
1536: for (i = 0; i < 8; i++){
1.1.1.11 root 1537: fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i));
1538: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1539: }
1.1.1.2 root 1540: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1541: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1542: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.11 root 1543: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1544: regs.usp,regs.isp,regs.msp,regs.vbr);
1545: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1546: regs.t1, regs.t0, regs.s, regs.m,
1547: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1548: for (i = 0; i < 8; i++){
1.1.1.11 root 1549: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1550: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1551: }
1.1.1.11 root 1552: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1553: (regs.fpsr & 0x8000000) != 0,
1554: (regs.fpsr & 0x4000000) != 0,
1555: (regs.fpsr & 0x2000000) != 0,
1556: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1557: if (currprefs.cpu_compatible)
1.1.1.11 root 1558: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1.1.1.3 root 1559:
1.1.1.11 root 1560: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1.1.1.4 root 1561: if (nextpc)
1.1.1.11 root 1562: fprintf (f, "next PC: %08lx\n", *nextpc);
1.1 root 1563: }
1.1.1.14 root 1564:
1565:
1566: /* CPU save/restore code */
1567:
1568: #define CPUTYPE_EC 1
1569: #define CPUMODE_HALT 1
1570:
1571: uae_u8 *restore_cpu (uae_u8 *src)
1572: {
1573: int i,model,flags;
1574: uae_u32 l;
1575:
1576: model = restore_u32();
1577: switch (model) {
1578: case 68000:
1579: currprefs.cpu_level = 0;
1580: break;
1581: case 68010:
1582: currprefs.cpu_level = 1;
1583: break;
1584: case 68020:
1585: currprefs.cpu_level = 2;
1586: break;
1587: default:
1588: write_log ("Unknown cpu type %d\n", model);
1589: break;
1590: }
1591:
1592: flags = restore_u32();
1593: currprefs.address_space_24 = 0;
1594: if (flags & CPUTYPE_EC)
1595: currprefs.address_space_24 = 1;
1596: for (i = 0; i < 15; i++)
1597: regs.regs[i] = restore_u32 ();
1598: regs.pc = restore_u32 ();
1.1.1.18 root 1599: /* We don't actually use this - we deliberately set prefetch_pc to a
1600: zero so that prefetch isn't used for the first insn after a state
1601: restore. */
1.1.1.14 root 1602: regs.prefetch = restore_u32 ();
1.1.1.18 root 1603: regs.prefetch_pc = regs.pc + 128;
1.1.1.14 root 1604: regs.usp = restore_u32 ();
1605: regs.isp = restore_u32 ();
1606: regs.sr = restore_u16 ();
1607: l = restore_u32();
1.1.1.18 root 1608: if (l & CPUMODE_HALT) {
1.1.1.14 root 1609: regs.stopped = 1;
1.1.1.18 root 1610: set_special (SPCFLAG_STOP);
1611: } else
1.1.1.14 root 1612: regs.stopped = 0;
1613: if (model >= 68010) {
1614: regs.dfc = restore_u32 ();
1615: regs.sfc = restore_u32 ();
1616: regs.vbr = restore_u32 ();
1617: }
1618: if (model >= 68020) {
1619: caar = restore_u32 ();
1620: cacr = restore_u32 ();
1621: regs.msp = restore_u32 ();
1622: }
1623: write_log ("CPU %d%s%03d, PC=%08.8X\n",
1624: model/1000, flags & 1 ? "EC" : "", model % 1000, regs.pc);
1625:
1626: return src;
1627: }
1628:
1629: static int cpumodel[] = { 68000, 68010, 68020, 68020 };
1630:
1631: uae_u8 *save_cpu (int *len)
1632: {
1633: uae_u8 *dstbak,*dst;
1634: int model,i;
1635:
1636: dstbak = dst = malloc(4+4+15*4+4+4+4+4+2+4+4+4+4+4+4+4);
1637: model = cpumodel[currprefs.cpu_level];
1638: save_u32 (model); /* MODEL */
1639: save_u32 (currprefs.address_space_24 ? 1 : 0); /* FLAGS */
1640: for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */
1641: save_u32 (m68k_getpc ()); /* PC */
1642: save_u32 (regs.prefetch); /* prefetch */
1643: MakeSR ();
1644: save_u32 (!regs.s ? regs.regs[15] : regs.usp); /* USP */
1645: save_u32 (regs.s ? regs.regs[15] : regs.isp); /* ISP */
1646: save_u16 (regs.sr); /* SR/CCR */
1647: save_u32 (regs.stopped ? CPUMODE_HALT : 0); /* flags */
1648: if(model >= 68010) {
1649: save_u32 (regs.dfc); /* DFC */
1650: save_u32 (regs.sfc); /* SFC */
1651: save_u32 (regs.vbr); /* VBR */
1652: }
1653: if(model >= 68020) {
1654: save_u32 (caar); /* CAAR */
1655: save_u32 (cacr); /* CACR */
1656: save_u32 (regs.msp); /* MSP */
1657: }
1658: *len = dst - dstbak;
1659: return dstbak;
1660: }
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