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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "options.h"
13: #include "events.h"
1.1.1.3 root 14: #include "uae.h"
1.1 root 15: #include "memory.h"
16: #include "custom.h"
17: #include "newcpu.h"
18: #include "autoconf.h"
1.1.1.23! root 19: #include "traps.h"
1.1 root 20: #include "ersatz.h"
21: #include "debug.h"
1.1.1.3 root 22: #include "gui.h"
1.1.1.14 root 23: #include "savestate.h"
1.1.1.18 root 24: #include "blitter.h"
1.1.1.3 root 25:
26: /* Opcode of faulting instruction */
1.1.1.20 root 27: static uae_u16 last_op_for_exception_3;
1.1.1.3 root 28: /* PC at fault time */
1.1.1.20 root 29: static uaecptr last_addr_for_exception_3;
1.1.1.3 root 30: /* Address that generated the exception */
1.1.1.20 root 31: static uaecptr last_fault_for_exception_3;
32: /* read (0) or write (1) access */
33: static int last_writeaccess_for_exception_3;
34: /* instruction (1) or data (0) access */
35: static int last_instructionaccess_for_exception_3;
1.1 root 36:
1.1.1.23! root 37: const int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
! 38: const int imm8_table[] = { 8,1,2,3,4,5,6,7 };
1.1 root 39:
40: int movem_index1[256];
41: int movem_index2[256];
42: int movem_next[256];
43:
44: int fpp_movem_index1[256];
45: int fpp_movem_index2[256];
46: int fpp_movem_next[256];
47:
48: cpuop_func *cpufunctbl[65536];
49:
1.1.1.3 root 50: #define COUNT_INSTRS 0
1.1 root 51:
52: #if COUNT_INSTRS
53: static unsigned long int instrcount[65536];
1.1.1.3 root 54: static uae_u16 opcodenums[65536];
1.1 root 55:
1.1.1.4 root 56: static int compfn (const void *el1, const void *el2)
1.1 root 57: {
1.1.1.3 root 58: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
59: }
60:
61: static char *icountfilename (void)
62: {
63: char *name = getenv ("INSNCOUNT");
64: if (name)
65: return name;
66: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 67: }
68:
1.1.1.4 root 69: void dump_counts (void)
1.1 root 70: {
1.1.1.4 root 71: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 72: unsigned long int total;
1.1 root 73: int i;
1.1.1.3 root 74:
75: write_log ("Writing instruction count file...\n");
1.1.1.4 root 76: for (i = 0; i < 65536; i++) {
1.1 root 77: opcodenums[i] = i;
1.1.1.3 root 78: total += instrcount[i];
1.1 root 79: }
1.1.1.4 root 80: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 81:
82: fprintf (f, "Total: %lu\n", total);
83: for (i=0; i < 65536; i++) {
1.1 root 84: unsigned long int cnt = instrcount[opcodenums[i]];
85: struct instr *dp;
86: struct mnemolookup *lookup;
87: if (!cnt)
88: break;
89: dp = table68k + opcodenums[i];
1.1.1.4 root 90: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
91: ;
1.1.1.3 root 92: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 93: }
1.1.1.4 root 94: fclose (f);
1.1 root 95: }
96: #else
1.1.1.4 root 97: void dump_counts (void)
1.1 root 98: {
99: }
100: #endif
101:
102: int broken_in;
103:
1.1.1.4 root 104: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
105:
106: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
107: {
1.1.1.8 root 108: op_illg (opcode);
1.1.1.4 root 109: return 4;
110: }
111:
1.1.1.3 root 112: static void build_cpufunctbl (void)
113: {
114: int i;
115: unsigned long opcode;
1.1.1.12 root 116: struct cputbl *tbl = (currprefs.cpu_level == 4 ? op_smalltbl_0_ff
117: : currprefs.cpu_level == 3 ? op_smalltbl_1_ff
118: : currprefs.cpu_level == 2 ? op_smalltbl_2_ff
119: : currprefs.cpu_level == 1 ? op_smalltbl_3_ff
120: : op_smalltbl_5_ff);
1.1.1.3 root 121:
1.1.1.22 root 122: write_log ("Building CPU function table (%d %d).\n",
123: currprefs.cpu_level, currprefs.address_space_24);
1.1.1.3 root 124:
125: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.8 root 126: cpufunctbl[opcode] = op_illg_1;
1.1.1.3 root 127: for (i = 0; tbl[i].handler != NULL; i++) {
128: if (! tbl[i].specific)
1.1.1.8 root 129: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.3 root 130: }
131: for (opcode = 0; opcode < 65536; opcode++) {
132: cpuop_func *f;
133:
134: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
135: continue;
136:
137: if (table68k[opcode].handler != -1) {
1.1.1.8 root 138: f = cpufunctbl[table68k[opcode].handler];
1.1.1.4 root 139: if (f == op_illg_1)
1.1.1.3 root 140: abort();
1.1.1.8 root 141: cpufunctbl[opcode] = f;
1.1.1.3 root 142: }
143: }
144: for (i = 0; tbl[i].handler != NULL; i++) {
145: if (tbl[i].specific)
1.1.1.8 root 146: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.4 root 147: }
148: }
149:
1.1.1.20 root 150: void fill_prefetch_slow (void)
151: {
152: #ifdef CPUEMU_6
153: if (currprefs.cpu_cycle_exact) {
154: regs.ir = get_word_ce (m68k_getpc ());
155: regs.irc = get_word_ce (m68k_getpc () + 2);
156: } else {
157: #endif
158: regs.ir = get_word (m68k_getpc ());
159: regs.irc = get_word (m68k_getpc () + 2);
160: #ifdef CPUEMU_6
161: }
162: #endif
163: }
164:
1.1.1.4 root 165: unsigned long cycles_mask, cycles_val;
166:
167: static void update_68k_cycles (void)
168: {
169: cycles_mask = 0;
170: cycles_val = currprefs.m68k_speed;
171: if (currprefs.m68k_speed < 1) {
172: cycles_mask = 0xFFFFFFFF;
173: cycles_val = 0;
1.1.1.3 root 174: }
175: }
176:
177: void check_prefs_changed_cpu (void)
178: {
1.1.1.4 root 179: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
180: currprefs.m68k_speed = changed_prefs.m68k_speed;
181: reset_frame_rate_hack ();
182: update_68k_cycles ();
183: }
1.1.1.3 root 184: }
185:
1.1 root 186: void init_m68k (void)
187: {
1.1.1.3 root 188: int i;
189:
1.1.1.4 root 190: update_68k_cycles ();
191:
1.1 root 192: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 193: int j;
1.1 root 194: for (j = 0 ; j < 8 ; j++) {
195: if (i & (1 << j)) break;
196: }
197: movem_index1[i] = j;
198: movem_index2[i] = 7-j;
199: movem_next[i] = i & (~(1 << j));
200: }
201: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 202: int j;
1.1 root 203: for (j = 7 ; j >= 0 ; j--) {
204: if (i & (1 << j)) break;
205: }
1.1.1.8 root 206: fpp_movem_index1[i] = 7-j;
207: fpp_movem_index2[i] = j;
1.1 root 208: fpp_movem_next[i] = i & (~(1 << j));
209: }
210: #if COUNT_INSTRS
211: {
1.1.1.4 root 212: FILE *f = fopen (icountfilename (), "r");
213: memset (instrcount, 0, sizeof instrcount);
1.1 root 214: if (f) {
1.1.1.3 root 215: uae_u32 opcode, count, total;
1.1 root 216: char name[20];
1.1.1.3 root 217: write_log ("Reading instruction count file...\n");
1.1.1.4 root 218: fscanf (f, "Total: %lu\n", &total);
219: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 220: instrcount[opcode] = count;
221: }
222: fclose(f);
223: }
224: }
225: #endif
1.1.1.5 root 226: write_log ("Building CPU table for configuration: 68");
1.1.1.20 root 227: regs.address_space_mask = 0xffffffff;
1.1.1.5 root 228: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
1.1.1.21 root 229: write_log ("EC");
1.1.1.5 root 230: switch (currprefs.cpu_level) {
1.1.1.12 root 231: case 1:
1.1.1.21 root 232: write_log ("010");
233: break;
1.1.1.12 root 234: case 2:
1.1.1.21 root 235: write_log ("020");
236: break;
1.1.1.12 root 237: case 3:
1.1.1.21 root 238: write_log ("020/881");
239: break;
1.1.1.12 root 240: case 4:
1.1.1.21 root 241: /* Who is going to miss the MMU anyway...? :-) */
242: write_log ("040");
243: break;
1.1.1.12 root 244: default:
1.1.1.21 root 245: write_log ("000");
246: break;
1.1.1.5 root 247: }
1.1.1.20 root 248: if (currprefs.address_space_24) {
249: regs.address_space_mask = 0x00ffffff;
250: write_log (" 24-bit addressing");
251: }
1.1.1.5 root 252: write_log ("\n");
1.1.1.22 root 253:
1.1 root 254: read_table68k ();
255: do_merges ();
1.1.1.2 root 256:
1.1.1.4 root 257: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 258:
1.1.1.3 root 259: build_cpufunctbl ();
260: }
1.1.1.4 root 261:
1.1 root 262: struct regstruct regs, lastint_regs;
263: static struct regstruct regs_backup[16];
264: static int backup_pointer = 0;
1.1.1.3 root 265: static long int m68kpc_offset;
1.1 root 266: int lastint_no;
267:
1.1.1.3 root 268: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
269: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
270: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
271:
1.1.1.11 root 272: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 273: {
274: uae_u16 dp;
275: uae_s8 disp8;
276: uae_s16 disp16;
1.1 root 277: int r;
1.1.1.3 root 278: uae_u32 dispreg;
279: uaecptr addr;
280: uae_s32 offset = 0;
1.1.1.2 root 281: char buffer[80];
1.1.1.3 root 282:
283: switch (mode){
1.1 root 284: case Dreg:
1.1.1.3 root 285: sprintf (buffer,"D%d", reg);
1.1 root 286: break;
287: case Areg:
1.1.1.3 root 288: sprintf (buffer,"A%d", reg);
1.1 root 289: break;
290: case Aind:
1.1.1.3 root 291: sprintf (buffer,"(A%d)", reg);
1.1 root 292: break;
293: case Aipi:
1.1.1.3 root 294: sprintf (buffer,"(A%d)+", reg);
1.1 root 295: break;
296: case Apdi:
1.1.1.3 root 297: sprintf (buffer,"-(A%d)", reg);
1.1 root 298: break;
299: case Ad16:
1.1.1.4 root 300: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.23! root 301: addr = m68k_areg (regs,reg) + (uae_s16)disp16;
1.1.1.3 root 302: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1.1.8 root 303: (unsigned long)addr);
1.1 root 304: break;
305: case Ad8r:
1.1.1.4 root 306: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 307: disp8 = dp & 0xFF;
308: r = (dp & 0x7000) >> 12;
1.1.1.23! root 309: dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 310: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 311: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 312:
1.1 root 313: if (dp & 0x100) {
1.1.1.3 root 314: uae_s32 outer = 0, disp = 0;
1.1.1.23! root 315: uae_s32 base = m68k_areg (regs,reg);
1.1.1.3 root 316: char name[10];
317: sprintf (name,"A%d, ",reg);
318: if (dp & 0x80) { base = 0; name[0] = 0; }
319: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 320: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
321: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 322: base += disp;
323:
1.1.1.4 root 324: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
325: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 326:
327: if (!(dp & 4)) base += dispreg;
328: if (dp & 3) base = get_long (base);
329: if (dp & 4) base += dispreg;
330:
331: addr = base + outer;
332: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
333: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
334: 1 << ((dp >> 9) & 3),
335: disp,outer,
1.1.1.8 root 336: (unsigned long)addr);
1.1.1.3 root 337: } else {
1.1.1.23! root 338: addr = m68k_areg (regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
1.1.1.3 root 339: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 340: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
341: 1 << ((dp >> 9) & 3), disp8,
1.1.1.8 root 342: (unsigned long)addr);
1.1 root 343: }
344: break;
345: case PC16:
1.1.1.4 root 346: addr = m68k_getpc () + m68kpc_offset;
347: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 348: addr += (uae_s16)disp16;
1.1.1.8 root 349: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
1.1 root 350: break;
351: case PC8r:
1.1.1.4 root 352: addr = m68k_getpc () + m68kpc_offset;
353: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 354: disp8 = dp & 0xFF;
355: r = (dp & 0x7000) >> 12;
1.1.1.23! root 356: dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 357: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 358: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 359:
1.1 root 360: if (dp & 0x100) {
1.1.1.3 root 361: uae_s32 outer = 0,disp = 0;
362: uae_s32 base = addr;
363: char name[10];
364: sprintf (name,"PC, ");
365: if (dp & 0x80) { base = 0; name[0] = 0; }
366: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 367: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
368: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 369: base += disp;
370:
1.1.1.4 root 371: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
372: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 373:
374: if (!(dp & 4)) base += dispreg;
375: if (dp & 3) base = get_long (base);
376: if (dp & 4) base += dispreg;
377:
378: addr = base + outer;
379: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
380: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
381: 1 << ((dp >> 9) & 3),
382: disp,outer,
1.1.1.8 root 383: (unsigned long)addr);
1.1.1.2 root 384: } else {
1.1.1.3 root 385: addr += (uae_s32)((uae_s8)disp8) + dispreg;
386: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 387: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
1.1.1.8 root 388: disp8, (unsigned long)addr);
1.1 root 389: }
390: break;
391: case absw:
1.1.1.8 root 392: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 393: m68kpc_offset += 2;
1.1 root 394: break;
395: case absl:
1.1.1.8 root 396: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 397: m68kpc_offset += 4;
1.1 root 398: break;
399: case imm:
1.1.1.3 root 400: switch (size){
1.1 root 401: case sz_byte:
1.1.1.4 root 402: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 403: m68kpc_offset += 2;
404: break;
1.1 root 405: case sz_word:
1.1.1.4 root 406: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 407: m68kpc_offset += 2;
408: break;
1.1 root 409: case sz_long:
1.1.1.8 root 410: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 411: m68kpc_offset += 4;
412: break;
1.1 root 413: default:
414: break;
415: }
416: break;
417: case imm0:
1.1.1.4 root 418: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 419: m68kpc_offset += 2;
420: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 421: break;
422: case imm1:
1.1.1.4 root 423: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 424: m68kpc_offset += 2;
425: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 426: break;
427: case imm2:
1.1.1.4 root 428: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 429: m68kpc_offset += 4;
1.1.1.8 root 430: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 431: break;
432: case immi:
1.1.1.3 root 433: offset = (uae_s32)(uae_s8)(reg & 0xff);
1.1.1.8 root 434: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 435: break;
436: default:
437: break;
438: }
1.1.1.2 root 439: if (buf == 0)
1.1.1.11 root 440: fprintf (f, "%s", buffer);
1.1.1.2 root 441: else
1.1.1.4 root 442: strcat (buf, buffer);
1.1.1.2 root 443: return offset;
1.1 root 444: }
445:
1.1.1.3 root 446: /* The plan is that this will take over the job of exception 3 handling -
447: * the CPU emulation functions will just do a longjmp to m68k_go whenever
448: * they hit an odd address. */
1.1.1.4 root 449: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 450: {
451: uae_u16 dp;
452: uae_s8 disp8;
453: uae_s16 disp16;
454: int r;
455: uae_u32 dispreg;
456: uaecptr addr;
457: uae_s32 offset = 0;
458:
459: switch (mode){
460: case Dreg:
461: *val = m68k_dreg (regs, reg);
462: return 1;
463: case Areg:
464: *val = m68k_areg (regs, reg);
465: return 1;
466:
467: case Aind:
468: case Aipi:
469: addr = m68k_areg (regs, reg);
470: break;
471: case Apdi:
472: addr = m68k_areg (regs, reg);
473: break;
474: case Ad16:
1.1.1.4 root 475: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.23! root 476: addr = m68k_areg (regs,reg) + (uae_s16)disp16;
1.1.1.3 root 477: break;
478: case Ad8r:
479: addr = m68k_areg (regs, reg);
480: d8r_common:
1.1.1.4 root 481: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 482: disp8 = dp & 0xFF;
483: r = (dp & 0x7000) >> 12;
1.1.1.23! root 484: dispreg = dp & 0x8000 ? m68k_areg (regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 485: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
486: dispreg <<= (dp >> 9) & 3;
487:
488: if (dp & 0x100) {
489: uae_s32 outer = 0, disp = 0;
490: uae_s32 base = addr;
491: if (dp & 0x80) base = 0;
492: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 493: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
494: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 495: base += disp;
496:
1.1.1.4 root 497: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
498: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 499:
500: if (!(dp & 4)) base += dispreg;
501: if (dp & 3) base = get_long (base);
502: if (dp & 4) base += dispreg;
503:
504: addr = base + outer;
505: } else {
506: addr += (uae_s32)((uae_s8)disp8) + dispreg;
507: }
508: break;
509: case PC16:
1.1.1.4 root 510: addr = m68k_getpc () + m68kpc_offset;
511: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 512: addr += (uae_s16)disp16;
513: break;
514: case PC8r:
1.1.1.4 root 515: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 516: goto d8r_common;
517: case absw:
1.1.1.4 root 518: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 519: m68kpc_offset += 2;
520: break;
521: case absl:
1.1.1.4 root 522: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 523: m68kpc_offset += 4;
524: break;
525: case imm:
526: switch (size){
527: case sz_byte:
1.1.1.4 root 528: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 529: m68kpc_offset += 2;
530: break;
531: case sz_word:
1.1.1.4 root 532: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 533: m68kpc_offset += 2;
534: break;
535: case sz_long:
1.1.1.4 root 536: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 537: m68kpc_offset += 4;
538: break;
539: default:
540: break;
541: }
542: return 1;
543: case imm0:
544: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
545: m68kpc_offset += 2;
546: return 1;
547: case imm1:
548: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
549: m68kpc_offset += 2;
550: return 1;
551: case imm2:
552: *val = get_ilong_1 (m68kpc_offset);
553: m68kpc_offset += 4;
554: return 1;
555: case immi:
556: *val = (uae_s32)(uae_s8)(reg & 0xff);
557: return 1;
558: default:
559: addr = 0;
560: break;
561: }
562: if ((addr & 1) == 0)
563: return 1;
564:
1.1.1.4 root 565: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 566: last_fault_for_exception_3 = addr;
1.1.1.20 root 567: last_writeaccess_for_exception_3 = 0;
568: last_instructionaccess_for_exception_3 = 0;
1.1.1.3 root 569: return 0;
570: }
571:
1.1.1.5 root 572: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
573: {
574: int reg = (dp >> 12) & 15;
575: uae_s32 regd = regs.regs[reg];
576: if ((dp & 0x800) == 0)
577: regd = (uae_s32)(uae_s16)regd;
578: regd <<= (dp >> 9) & 3;
579: if (dp & 0x100) {
580: uae_s32 outer = 0;
581: if (dp & 0x80) base = 0;
582: if (dp & 0x40) regd = 0;
583:
584: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
585: if ((dp & 0x30) == 0x30) base += next_ilong();
586:
587: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
588: if ((dp & 0x3) == 0x3) outer = next_ilong();
589:
590: if ((dp & 0x4) == 0) base += regd;
591: if (dp & 0x3) base = get_long (base);
592: if (dp & 0x4) base += regd;
593:
594: return base + outer;
595: } else {
596: return base + (uae_s32)((uae_s8)dp) + regd;
597: }
598: }
599:
600: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
601: {
602: int reg = (dp >> 12) & 15;
603: uae_s32 regd = regs.regs[reg];
604: #if 1
605: if ((dp & 0x800) == 0)
606: regd = (uae_s32)(uae_s16)regd;
607: return base + (uae_s8)dp + regd;
608: #else
609: /* Branch-free code... benchmark this again now that
610: * things are no longer inline. */
611: uae_s32 regd16;
612: uae_u32 mask;
613: mask = ((dp & 0x800) >> 11) - 1;
614: regd16 = (uae_s32)(uae_s16)regd;
615: regd16 &= mask;
616: mask = ~mask;
617: base += (uae_s8)dp;
618: regd &= mask;
619: regd |= regd16;
620: return base + regd;
621: #endif
622: }
623:
1.1.1.4 root 624: void MakeSR (void)
1.1 root 625: {
626: #if 0
627: assert((regs.t1 & 1) == regs.t1);
628: assert((regs.t0 & 1) == regs.t0);
629: assert((regs.s & 1) == regs.s);
630: assert((regs.m & 1) == regs.m);
631: assert((XFLG & 1) == XFLG);
632: assert((NFLG & 1) == NFLG);
633: assert((ZFLG & 1) == ZFLG);
634: assert((VFLG & 1) == VFLG);
635: assert((CFLG & 1) == CFLG);
636: #endif
637: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
638: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 root 639: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
640: | GET_CFLG);
1.1 root 641: }
642:
1.1.1.4 root 643: void MakeFromSR (void)
1.1 root 644: {
645: int oldm = regs.m;
646: int olds = regs.s;
647:
648: regs.t1 = (regs.sr >> 15) & 1;
649: regs.t0 = (regs.sr >> 14) & 1;
650: regs.s = (regs.sr >> 13) & 1;
651: regs.m = (regs.sr >> 12) & 1;
652: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 root 653: SET_XFLG ((regs.sr >> 4) & 1);
654: SET_NFLG ((regs.sr >> 3) & 1);
655: SET_ZFLG ((regs.sr >> 2) & 1);
656: SET_VFLG ((regs.sr >> 1) & 1);
657: SET_CFLG (regs.sr & 1);
1.1.1.3 root 658: if (currprefs.cpu_level >= 2) {
1.1 root 659: if (olds != regs.s) {
1.1.1.3 root 660: if (olds) {
661: if (oldm)
1.1.1.23! root 662: regs.msp = m68k_areg (regs, 7);
1.1.1.3 root 663: else
1.1.1.23! root 664: regs.isp = m68k_areg (regs, 7);
! 665: m68k_areg (regs, 7) = regs.usp;
1.1.1.3 root 666: } else {
1.1.1.23! root 667: regs.usp = m68k_areg (regs, 7);
! 668: m68k_areg (regs, 7) = regs.m ? regs.msp : regs.isp;
1.1.1.3 root 669: }
1.1 root 670: } else if (olds && oldm != regs.m) {
671: if (oldm) {
1.1.1.23! root 672: regs.msp = m68k_areg (regs, 7);
! 673: m68k_areg (regs, 7) = regs.isp;
1.1.1.2 root 674: } else {
1.1.1.23! root 675: regs.isp = m68k_areg (regs, 7);
! 676: m68k_areg (regs, 7) = regs.msp;
1.1 root 677: }
678: }
679: } else {
680: if (olds != regs.s) {
1.1.1.3 root 681: if (olds) {
1.1.1.23! root 682: regs.isp = m68k_areg (regs, 7);
! 683: m68k_areg (regs, 7) = regs.usp;
1.1.1.3 root 684: } else {
1.1.1.23! root 685: regs.usp = m68k_areg (regs, 7);
! 686: m68k_areg (regs, 7) = regs.isp;
1.1.1.3 root 687: }
688: }
1.1 root 689: }
1.1.1.3 root 690:
1.1.1.12 root 691: set_special (SPCFLAG_INT);
1.1 root 692: if (regs.t1 || regs.t0)
1.1.1.12 root 693: set_special (SPCFLAG_TRACE);
1.1 root 694: else
1.1.1.22 root 695: /* Keep SPCFLAG_DOTRACE, we still want a trace exception for
1.1.1.16 root 696: SR-modifying instructions (including STOP). */
697: unset_special (SPCFLAG_TRACE);
1.1 root 698: }
699:
1.1.1.20 root 700: static void exception_trace (int nr)
1.1 root 701: {
1.1.1.20 root 702: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
703: if (regs.t1 && !regs.t0) {
704: /* trace stays pending if exception is div by zero, chk,
705: * trapv or trap #x
706: */
707: if (nr == 5 || nr == 6 || nr == 7 || (nr >= 32 && nr <= 47))
708: set_special (SPCFLAG_DOTRACE);
709: }
710: regs.t1 = regs.t0 = regs.m = 0;
711: }
1.1.1.12 root 712:
1.1.1.20 root 713: static void exception_debug (int nr)
714: {
715: #ifdef DEBUGGER
716: if (!exception_debugging)
717: return;
1.1.1.22 root 718: console_out ("Exception %d, PC=%08.8X\n", nr, m68k_getpc());
1.1.1.20 root 719: #endif
720: }
721:
722: void Exception_normal (int nr, uaecptr oldpc)
723: {
724: uae_u32 currpc = m68k_getpc (), newpc;
725: int sv = regs.s;
726:
727: exception_debug (nr);
1.1 root 728: MakeSR();
1.1.1.12 root 729:
1.1 root 730: if (!regs.s) {
1.1.1.23! root 731: regs.usp = m68k_areg (regs, 7);
1.1.1.3 root 732: if (currprefs.cpu_level >= 2)
1.1.1.23! root 733: m68k_areg (regs, 7) = regs.m ? regs.msp : regs.isp;
1.1.1.3 root 734: else
1.1.1.23! root 735: m68k_areg (regs, 7) = regs.isp;
1.1 root 736: regs.s = 1;
737: }
1.1.1.3 root 738: if (currprefs.cpu_level > 0) {
1.1 root 739: if (nr == 2 || nr == 3) {
740: int i;
1.1.1.20 root 741: if (currprefs.cpu_level >= 4) { /* 68040 */
742: if (nr == 2) {
743: for (i = 0 ; i < 18 ; i++) {
1.1.1.23! root 744: m68k_areg (regs, 7) -= 2;
! 745: put_word (m68k_areg (regs, 7), 0);
1.1.1.20 root 746: }
1.1.1.23! root 747: m68k_areg (regs, 7) -= 4;
! 748: put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
! 749: m68k_areg (regs, 7) -= 2;
! 750: put_word (m68k_areg (regs, 7), 0);
! 751: m68k_areg (regs, 7) -= 2;
! 752: put_word (m68k_areg (regs, 7), 0);
! 753: m68k_areg (regs, 7) -= 2;
! 754: put_word (m68k_areg (regs, 7), 0);
! 755: m68k_areg (regs, 7) -= 2;
! 756: put_word (m68k_areg (regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */
! 757: m68k_areg (regs, 7) -= 4;
! 758: put_long (m68k_areg (regs, 7), last_addr_for_exception_3);
! 759: m68k_areg (regs, 7) -= 2;
! 760: put_word (m68k_areg (regs, 7), 0x7000 + nr * 4);
1.1.1.20 root 761: } else {
1.1.1.23! root 762: m68k_areg (regs, 7) -= 4;
! 763: put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
! 764: m68k_areg (regs, 7) -= 2;
! 765: put_word (m68k_areg (regs, 7), 0x2000 + nr * 4);
1.1.1.20 root 766: }
767: } else {
768: uae_u16 ssw = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1);
769: ssw |= last_writeaccess_for_exception_3 ? 0 : 0x40;
770: ssw |= 0x20;
771: for (i = 0 ; i < 36; i++) {
1.1.1.23! root 772: m68k_areg (regs, 7) -= 2;
! 773: put_word (m68k_areg (regs, 7), 0);
1.1.1.20 root 774: }
1.1.1.23! root 775: m68k_areg (regs, 7) -= 4;
! 776: put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
! 777: m68k_areg (regs, 7) -= 2;
! 778: put_word (m68k_areg (regs, 7), 0);
! 779: m68k_areg (regs, 7) -= 2;
! 780: put_word (m68k_areg (regs, 7), 0);
! 781: m68k_areg (regs, 7) -= 2;
! 782: put_word (m68k_areg (regs, 7), 0);
! 783: m68k_areg (regs, 7) -= 2;
! 784: put_word (m68k_areg (regs, 7), ssw);
! 785: m68k_areg (regs, 7) -= 2;
! 786: put_word (m68k_areg (regs, 7), 0xb000 + nr * 4);
1.1 root 787: }
1.1.1.22 root 788: #if 0
1.1.1.20 root 789: write_log ("Exception %d (%x) at %x -> %x!\n", nr, oldpc, currpc, get_long (regs.vbr + 4*nr));
1.1.1.22 root 790: #endif
791:
1.1 root 792: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.23! root 793: m68k_areg (regs, 7) -= 4;
! 794: put_long (m68k_areg (regs, 7), oldpc);
! 795: m68k_areg (regs, 7) -= 2;
! 796: put_word (m68k_areg (regs, 7), 0x2000 + nr * 4);
1.1.1.20 root 797: } else if (regs.m && nr >= 24 && nr < 32) { /* M + Interrupt */
1.1.1.23! root 798: m68k_areg (regs, 7) -= 2;
! 799: put_word (m68k_areg (regs, 7), nr * 4);
! 800: m68k_areg (regs, 7) -= 4;
! 801: put_long (m68k_areg (regs, 7), currpc);
! 802: m68k_areg (regs, 7) -= 2;
! 803: put_word (m68k_areg (regs, 7), regs.sr);
1.1.1.3 root 804: regs.sr |= (1 << 13);
1.1.1.23! root 805: regs.msp = m68k_areg (regs, 7);
! 806: m68k_areg (regs, 7) = regs.isp;
! 807: m68k_areg (regs, 7) -= 2;
! 808: put_word (m68k_areg (regs, 7), 0x1000 + nr * 4);
1.1.1.3 root 809: } else {
1.1.1.23! root 810: m68k_areg (regs, 7) -= 2;
! 811: put_word (m68k_areg (regs, 7), nr * 4);
1.1.1.3 root 812: }
1.1.1.20 root 813: } else if (nr == 2 || nr == 3) {
814: uae_u16 mode = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1);
1.1.1.21 root 815: mode |= last_writeaccess_for_exception_3 ? 0 : 16;
1.1.1.23! root 816: m68k_areg (regs, 7) -= 14;
1.1.1.20 root 817: /* fixme: bit3=I/N */
1.1.1.23! root 818: put_word (m68k_areg (regs, 7) + 0, mode);
! 819: put_long (m68k_areg (regs, 7) + 2, last_fault_for_exception_3);
! 820: put_word (m68k_areg (regs, 7) + 6, last_op_for_exception_3);
! 821: put_word (m68k_areg (regs, 7) + 8, regs.sr);
! 822: put_long (m68k_areg (regs, 7) + 10, last_addr_for_exception_3);
1.1.1.21 root 823: write_log ("Exception %d (%x) at %x -> %x!\n", nr, oldpc, currpc, get_long (regs.vbr + 4*nr));
1.1.1.20 root 824: goto kludge_me_do;
1.1 root 825: }
1.1.1.23! root 826: m68k_areg (regs, 7) -= 4;
! 827: put_long (m68k_areg (regs, 7), currpc);
! 828: m68k_areg (regs, 7) -= 2;
! 829: put_word (m68k_areg (regs, 7), regs.sr);
1.1.1.20 root 830: kludge_me_do:
831: newpc = get_long (regs.vbr + 4 * nr);
832: if (newpc & 1) {
833: if (nr == 2 || nr == 3)
1.1.1.22 root 834: uae_reset (1); /* there is nothing else we can do.. */
1.1.1.20 root 835: else
836: exception3 (regs.ir, m68k_getpc(), newpc);
837: return;
838: }
839: m68k_setpc (newpc);
840: fill_prefetch_slow ();
841: exception_trace (nr);
842: }
843:
844: void Exception (int nr, uaecptr oldpc)
845: {
846: Exception_normal (nr, oldpc);
1.1 root 847: }
848:
1.1.1.17 root 849: static void Interrupt (int nr)
1.1 root 850: {
1.1.1.20 root 851: regs.stopped = 0;
852: unset_special (SPCFLAG_STOP);
1.1 root 853: assert(nr < 8 && nr >= 0);
854: lastint_regs = regs;
855: lastint_no = nr;
1.1.1.20 root 856: Exception (nr + 24, 0);
1.1.1.3 root 857:
1.1 root 858: regs.intmask = nr;
1.1.1.12 root 859: set_special (SPCFLAG_INT);
1.1 root 860: }
861:
1.1.1.15 root 862: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp;
1.1 root 863:
1.1.1.9 root 864: int m68k_move2c (int regno, uae_u32 *regp)
1.1 root 865: {
1.1.1.12 root 866: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
867: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
868: || (currprefs.cpu_level == 4 && regno == 0x802))
869: {
1.1 root 870: op_illg (0x4E7B);
1.1.1.9 root 871: return 0;
1.1.1.12 root 872: } else {
1.1 root 873: switch (regno) {
1.1.1.12 root 874: case 0: regs.sfc = *regp & 7; break;
875: case 1: regs.dfc = *regp & 7; break;
876: case 2: cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : 0x80008000); break;
877: case 3: tc = *regp & 0xc000; break;
1.1.1.15 root 878: /* Mask out fields that should be zero. */
1.1.1.12 root 879: case 4: itt0 = *regp & 0xffffe364; break;
880: case 5: itt1 = *regp & 0xffffe364; break;
881: case 6: dtt0 = *regp & 0xffffe364; break;
882: case 7: dtt1 = *regp & 0xffffe364; break;
1.1.1.22 root 883:
1.1.1.12 root 884: case 0x800: regs.usp = *regp; break;
885: case 0x801: regs.vbr = *regp; break;
886: case 0x802: caar = *regp & 0xfc; break;
1.1.1.23! root 887: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg (regs, 7) = regs.msp; break;
! 888: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg (regs, 7) = regs.isp; break;
1.1.1.15 root 889: case 0x805: mmusr = *regp; break;
890: case 0x806: urp = *regp; break;
891: case 0x807: srp = *regp; break;
1.1.1.12 root 892: default:
1.1 root 893: op_illg (0x4E7B);
1.1.1.9 root 894: return 0;
1.1 root 895: }
1.1.1.12 root 896: }
1.1.1.9 root 897: return 1;
1.1 root 898: }
899:
1.1.1.9 root 900: int m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 901: {
1.1.1.12 root 902: if ((currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
903: || (currprefs.cpu_level < 4 && (regno & 0x7FF) > 2)
904: || (currprefs.cpu_level == 4 && regno == 0x802))
905: {
1.1 root 906: op_illg (0x4E7A);
1.1.1.9 root 907: return 0;
1.1.1.12 root 908: } else {
1.1 root 909: switch (regno) {
1.1.1.12 root 910: case 0: *regp = regs.sfc; break;
911: case 1: *regp = regs.dfc; break;
912: case 2: *regp = cacr; break;
913: case 3: *regp = tc; break;
914: case 4: *regp = itt0; break;
915: case 5: *regp = itt1; break;
916: case 6: *regp = dtt0; break;
917: case 7: *regp = dtt1; break;
918: case 0x800: *regp = regs.usp; break;
919: case 0x801: *regp = regs.vbr; break;
920: case 0x802: *regp = caar; break;
1.1.1.23! root 921: case 0x803: *regp = regs.m == 1 ? m68k_areg (regs, 7) : regs.msp; break;
! 922: case 0x804: *regp = regs.m == 0 ? m68k_areg (regs, 7) : regs.isp; break;
1.1.1.12 root 923: case 0x805: *regp = mmusr; break;
1.1.1.15 root 924: case 0x806: *regp = urp; break;
925: case 0x807: *regp = srp; break;
1.1.1.12 root 926: default:
1.1 root 927: op_illg (0x4E7A);
1.1.1.9 root 928: return 0;
1.1 root 929: }
1.1.1.12 root 930: }
1.1.1.9 root 931: return 1;
1.1 root 932: }
933:
1.1.1.8 root 934: STATIC_INLINE int
1.1.1.3 root 935: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 936: {
1.1.1.3 root 937: uae_u32 q = 0, cbit = 0;
1.1 root 938: int i;
939:
940: if (div <= src_hi) {
1.1.1.4 root 941: return 1;
1.1 root 942: }
943: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 944: cbit = src_hi & 0x80000000ul;
1.1 root 945: src_hi <<= 1;
1.1.1.2 root 946: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 947: src_lo <<= 1;
948: q = q << 1;
949: if (cbit || div <= src_hi) {
950: q |= 1;
951: src_hi -= div;
952: }
953: }
954: *quot = q;
955: *rem = src_hi;
1.1.1.4 root 956: return 0;
1.1 root 957: }
958:
1.1.1.3 root 959: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 960: {
1.1.1.3 root 961: #if defined(uae_s64)
1.1 root 962: if (src == 0) {
1.1.1.4 root 963: Exception (5, oldpc);
1.1 root 964: return;
965: }
966: if (extra & 0x800) {
967: /* signed variant */
1.1.1.3 root 968: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
969: uae_s64 quot, rem;
970:
1.1 root 971: if (extra & 0x400) {
1.1.1.3 root 972: a &= 0xffffffffu;
973: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 974: }
1.1.1.3 root 975: rem = a % (uae_s64)(uae_s32)src;
976: quot = a / (uae_s64)(uae_s32)src;
977: if ((quot & UVAL64(0xffffffff80000000)) != 0
978: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
979: {
1.1.1.6 root 980: SET_VFLG (1);
981: SET_NFLG (1);
982: SET_CFLG (0);
1.1.1.4 root 983: } else {
1.1.1.3 root 984: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 root 985: SET_VFLG (0);
986: SET_CFLG (0);
987: SET_ZFLG (((uae_s32)quot) == 0);
988: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 989: m68k_dreg(regs, extra & 7) = rem;
990: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 991: }
992: } else {
993: /* unsigned */
1.1.1.3 root 994: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
995: uae_u64 quot, rem;
996:
1.1 root 997: if (extra & 0x400) {
1.1.1.3 root 998: a &= 0xffffffffu;
999: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 1000: }
1.1.1.3 root 1001: rem = a % (uae_u64)src;
1002: quot = a / (uae_u64)src;
1003: if (quot > 0xffffffffu) {
1.1.1.6 root 1004: SET_VFLG (1);
1005: SET_NFLG (1);
1006: SET_CFLG (0);
1.1.1.4 root 1007: } else {
1.1.1.6 root 1008: SET_VFLG (0);
1009: SET_CFLG (0);
1010: SET_ZFLG (((uae_s32)quot) == 0);
1011: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 1012: m68k_dreg(regs, extra & 7) = rem;
1013: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 1014: }
1015: }
1016: #else
1017: if (src == 0) {
1.1.1.4 root 1018: Exception (5, oldpc);
1.1 root 1019: return;
1020: }
1021: if (extra & 0x800) {
1022: /* signed variant */
1.1.1.3 root 1023: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1024: uae_s32 hi = lo < 0 ? -1 : 0;
1025: uae_s32 save_high;
1026: uae_u32 quot, rem;
1027: uae_u32 sign;
1028:
1.1 root 1029: if (extra & 0x400) {
1.1.1.3 root 1030: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 1031: }
1032: save_high = hi;
1033: sign = (hi ^ src);
1034: if (hi < 0) {
1.1.1.4 root 1035: hi = ~hi;
1036: lo = -lo;
1037: if (lo == 0) hi++;
1.1 root 1038: }
1.1.1.3 root 1039: if ((uae_s32)src < 0) src = -src;
1.1 root 1040: if (div_unsigned(hi, lo, src, ", &rem) ||
1041: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 root 1042: SET_VFLG (1);
1043: SET_NFLG (1);
1044: SET_CFLG (0);
1.1.1.4 root 1045: } else {
1.1 root 1046: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 1047: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 root 1048: SET_VFLG (0);
1049: SET_CFLG (0);
1050: SET_ZFLG (((uae_s32)quot) == 0);
1051: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 1052: m68k_dreg(regs, extra & 7) = rem;
1053: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 1054: }
1055: } else {
1056: /* unsigned */
1.1.1.3 root 1057: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1058: uae_u32 hi = 0;
1059: uae_u32 quot, rem;
1060:
1.1 root 1061: if (extra & 0x400) {
1.1.1.3 root 1062: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 1063: }
1064: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 root 1065: SET_VFLG (1);
1066: SET_NFLG (1);
1067: SET_CFLG (0);
1.1.1.4 root 1068: } else {
1.1.1.6 root 1069: SET_VFLG (0);
1070: SET_CFLG (0);
1071: SET_ZFLG (((uae_s32)quot) == 0);
1072: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 1073: m68k_dreg(regs, extra & 7) = rem;
1074: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 1075: }
1076: }
1077: #endif
1078: }
1079:
1.1.1.8 root 1080: STATIC_INLINE void
1.1.1.3 root 1081: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 1082: {
1.1.1.3 root 1083: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
1084: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
1085: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
1086: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
1087: uae_u32 lo;
1088:
1089: lo = r0 + ((r1 << 16) & 0xffff0000ul);
1090: if (lo < r0) r3++;
1091: r0 = lo;
1092: lo = r0 + ((r2 << 16) & 0xffff0000ul);
1093: if (lo < r0) r3++;
1094: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 1095: *dst_lo = lo;
1096: *dst_hi = r3;
1097: }
1098:
1.1.1.3 root 1099: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 1100: {
1.1.1.3 root 1101: #if defined(uae_s64)
1.1 root 1102: if (extra & 0x800) {
1103: /* signed variant */
1.1.1.3 root 1104: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1105:
1.1.1.3 root 1106: a *= (uae_s64)(uae_s32)src;
1.1.1.6 root 1107: SET_VFLG (0);
1108: SET_CFLG (0);
1109: SET_ZFLG (a == 0);
1110: SET_NFLG (a < 0);
1.1 root 1111: if (extra & 0x400)
1.1.1.2 root 1112: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1113: else if ((a & UVAL64(0xffffffff80000000)) != 0
1114: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1115: {
1.1.1.6 root 1116: SET_VFLG (1);
1.1 root 1117: }
1.1.1.3 root 1118: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1119: } else {
1120: /* unsigned */
1.1.1.3 root 1121: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1122:
1123: a *= (uae_u64)src;
1.1.1.6 root 1124: SET_VFLG (0);
1125: SET_CFLG (0);
1126: SET_ZFLG (a == 0);
1127: SET_NFLG (((uae_s64)a) < 0);
1.1 root 1128: if (extra & 0x400)
1.1.1.2 root 1129: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1130: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 root 1131: SET_VFLG (1);
1.1 root 1132: }
1.1.1.3 root 1133: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1134: }
1135: #else
1136: if (extra & 0x800) {
1137: /* signed variant */
1.1.1.3 root 1138: uae_s32 src1,src2;
1139: uae_u32 dst_lo,dst_hi;
1140: uae_u32 sign;
1.1 root 1141:
1.1.1.3 root 1142: src1 = (uae_s32)src;
1143: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1144: sign = (src1 ^ src2);
1145: if (src1 < 0) src1 = -src1;
1146: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1147: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1148: if (sign & 0x80000000) {
1149: dst_hi = ~dst_hi;
1150: dst_lo = -dst_lo;
1151: if (dst_lo == 0) dst_hi++;
1152: }
1.1.1.6 root 1153: SET_VFLG (0);
1154: SET_CFLG (0);
1155: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1156: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1157: if (extra & 0x400)
1.1.1.2 root 1158: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1159: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1160: && ((dst_hi & 0xffffffff) != 0xffffffff
1161: || (dst_lo & 0x80000000) != 0x80000000))
1162: {
1.1.1.6 root 1163: SET_VFLG (1);
1.1 root 1164: }
1.1.1.2 root 1165: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1166: } else {
1167: /* unsigned */
1.1.1.3 root 1168: uae_u32 dst_lo,dst_hi;
1169:
1170: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1171:
1.1.1.6 root 1172: SET_VFLG (0);
1173: SET_CFLG (0);
1174: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1175: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1176: if (extra & 0x400)
1.1.1.2 root 1177: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1178: else if (dst_hi != 0) {
1.1.1.6 root 1179: SET_VFLG (1);
1.1 root 1180: }
1.1.1.2 root 1181: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1182: }
1183: #endif
1184: }
1.1.1.23! root 1185: static const char *ccnames[] =
1.1 root 1186: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1187: "VC","VS","PL","MI","GE","LT","GT","LE" };
1188:
1.1.1.4 root 1189: void m68k_reset (void)
1.1 root 1190: {
1.1.1.22 root 1191: if (currprefs.cpu_level != changed_prefs.cpu_level
1192: || currprefs.address_space_24 != changed_prefs.address_space_24)
1193: {
1194: currprefs.address_space_24 = changed_prefs.address_space_24;
1195: currprefs.cpu_level = changed_prefs.cpu_level;
1196: build_cpufunctbl ();
1197: }
1198:
1.1.1.14 root 1199: regs.kick_mask = 0x00F80000;
1200: regs.spcflags = 0;
1201: if (savestate_state == STATE_RESTORE) {
1.1.1.21 root 1202: m68k_setpc (regs.pc);
1.1.1.14 root 1203: /* MakeFromSR() must not swap stack pointer */
1204: regs.s = (regs.sr >> 13) & 1;
1205: MakeFromSR();
1206: /* set stack pointer */
1207: if (regs.s)
1.1.1.23! root 1208: m68k_areg (regs, 7) = regs.isp;
1.1.1.14 root 1209: else
1.1.1.23! root 1210: m68k_areg (regs, 7) = regs.usp;
1.1.1.14 root 1211: return;
1212: }
1213:
1.1.1.3 root 1214: m68k_areg (regs, 7) = get_long (0x00f80000);
1215: m68k_setpc (get_long (0x00f80004));
1.1 root 1216: regs.s = 1;
1217: regs.m = 0;
1218: regs.stopped = 0;
1219: regs.t1 = 0;
1220: regs.t0 = 0;
1.1.1.6 root 1221: SET_ZFLG (0);
1222: SET_XFLG (0);
1223: SET_CFLG (0);
1224: SET_VFLG (0);
1225: SET_NFLG (0);
1.1 root 1226: regs.intmask = 7;
1227: regs.vbr = regs.sfc = regs.dfc = 0;
1228: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1.1.1.20 root 1229: regs.irc = 0xffff;
1230: fill_prefetch_slow ();
1.1 root 1231: }
1232:
1.1.1.4 root 1233: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1234: {
1.1.1.3 root 1235: uaecptr pc = m68k_getpc ();
1.1.1.22 root 1236:
1.1.1.3 root 1237: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1238: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1239: m68k_incpc (2);
1.1.1.20 root 1240: fill_prefetch_slow ();
1.1.1.4 root 1241: return 4;
1.1.1.3 root 1242: }
1243:
1244: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1245: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1246: broken_in = 1;
1.1.1.12 root 1247: set_special (SPCFLAG_BRK);
1.1 root 1248: quit_program = 1;
1249: }
1.1.1.2 root 1250: if (opcode == 0xFF0D) {
1.1.1.3 root 1251: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1252: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1253: uae_u16 arg = get_iword (2);
1254: m68k_incpc (4);
1255: ersatz_perform (arg);
1.1.1.20 root 1256: fill_prefetch_slow ();
1.1.1.4 root 1257: return 4;
1.1.1.17 root 1258: } else if ((pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.2 root 1259: /* User-mode STOP replacement */
1.1.1.3 root 1260: m68k_setstopped (1);
1.1.1.4 root 1261: return 4;
1.1.1.2 root 1262: }
1.1 root 1263: }
1.1.1.3 root 1264:
1.1.1.17 root 1265: if ((opcode & 0xF000) == 0xA000 && (pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.3 root 1266: /* Calltrap. */
1267: m68k_incpc(2);
1268: call_calltrap (opcode & 0xFFF);
1.1.1.20 root 1269: fill_prefetch_slow ();
1.1.1.4 root 1270: return 4;
1.1.1.3 root 1271: }
1272:
1.1 root 1273: if ((opcode & 0xF000) == 0xF000) {
1274: Exception(0xB,0);
1.1.1.4 root 1275: return 4;
1.1 root 1276: }
1277: if ((opcode & 0xF000) == 0xA000) {
1.1.1.17 root 1278: if ((pc & 0xFFFF0000) == RTAREA_BASE) {
1.1.1.3 root 1279: /* Calltrap. */
1280: call_calltrap (opcode & 0xFFF);
1281: }
1282: Exception(0xA,0);
1.1.1.4 root 1283: return 4;
1.1 root 1284: }
1.1.1.12 root 1285: #if 1
1.1.1.4 root 1286: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.10 root 1287: #endif
1.1.1.3 root 1288: Exception (4,0);
1.1.1.4 root 1289: return 4;
1.1 root 1290: }
1291:
1.1.1.3 root 1292: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1293: {
1.1.1.12 root 1294: if ((opcode & 0xFE0) == 0x0500) {
1295: /* PFLUSH */
1296: mmusr = 0;
1297: write_log ("PFLUSH\n");
1298: } else if ((opcode & 0x0FD8) == 0x548) {
1299: /* PTEST */
1300: write_log ("PTEST\n");
1.1 root 1301: } else
1.1.1.3 root 1302: op_illg (opcode);
1.1 root 1303: }
1304:
1.1.1.4 root 1305: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1306:
1.1.1.3 root 1307: static uaecptr last_trace_ad = 0;
1.1 root 1308:
1.1.1.7 root 1309: static void do_trace (void)
1.1 root 1310: {
1.1.1.11 root 1311: if (regs.t0 && currprefs.cpu_level >= 2) {
1.1.1.7 root 1312: uae_u16 opcode;
1313: /* should also include TRAP, CHK, SR modification FPcc */
1314: /* probably never used so why bother */
1315: /* We can afford this to be inefficient... */
1316: m68k_setpc (m68k_getpc ());
1.1.1.20 root 1317: fill_prefetch_slow ();
1.1.1.7 root 1318: opcode = get_word (regs.pc);
1319: if (opcode == 0x4e72 /* RTE */
1320: || opcode == 0x4e74 /* RTD */
1321: || opcode == 0x4e75 /* RTS */
1322: || opcode == 0x4e77 /* RTR */
1323: || opcode == 0x4e76 /* TRAPV */
1324: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1325: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1326: || (opcode & 0xff00) == 0x6100 /* BSR */
1327: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1328: && cctrue((opcode >> 8) & 0xf))
1329: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1330: && !cctrue((opcode >> 8) & 0xf)
1331: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1332: {
1.1.1.4 root 1333: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1334: unset_special (SPCFLAG_TRACE);
1335: set_special (SPCFLAG_DOTRACE);
1.1 root 1336: }
1.1.1.7 root 1337: } else if (regs.t1) {
1338: last_trace_ad = m68k_getpc ();
1.1.1.12 root 1339: unset_special (SPCFLAG_TRACE);
1340: set_special (SPCFLAG_DOTRACE);
1.1 root 1341: }
1342: }
1343:
1.1.1.19 root 1344: static int do_specialties (int cycles)
1.1 root 1345: {
1.1.1.9 root 1346: if (regs.spcflags & SPCFLAG_COPPER)
1347: do_copper ();
1348:
1.1.1.3 root 1349: /*n_spcinsns++;*/
1.1.1.19 root 1350: while ((regs.spcflags & SPCFLAG_BLTNASTY) && cycles > 0) {
1.1.1.18 root 1351: int c = blitnasty();
1.1.1.19 root 1352: if (!c) {
1353: cycles -= 2 * CYCLE_UNIT;
1354: if (cycles < CYCLE_UNIT)
1355: cycles = 0;
1356: c = 1;
1357: }
1.1.1.18 root 1358: do_cycles (c * CYCLE_UNIT);
1.1.1.9 root 1359: if (regs.spcflags & SPCFLAG_COPPER)
1360: do_copper ();
1.1.1.3 root 1361: }
1.1.1.9 root 1362:
1.1.1.21 root 1363: if (regs.spcflags & SPCFLAG_DOTRACE)
1.1.1.4 root 1364: Exception (9,last_trace_ad);
1.1.1.21 root 1365:
1.1.1.3 root 1366: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.13 root 1367: do_cycles (4 * CYCLE_UNIT);
1.1.1.9 root 1368: if (regs.spcflags & SPCFLAG_COPPER)
1369: do_copper ();
1.1.1.21 root 1370: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) {
1.1.1.4 root 1371: int intr = intlev ();
1.1.1.12 root 1372: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1373: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1374: Interrupt (intr);
1.1.1.3 root 1375: regs.stopped = 0;
1.1.1.12 root 1376: unset_special (SPCFLAG_STOP);
1.1.1.2 root 1377: }
1.1.1.3 root 1378: }
1379: }
1.1.1.7 root 1380: if (regs.spcflags & SPCFLAG_TRACE)
1381: do_trace ();
1.1.1.4 root 1382:
1.1.1.3 root 1383: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1384: int intr = intlev ();
1.1.1.12 root 1385: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1386: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1387: Interrupt (intr);
1.1.1.3 root 1388: regs.stopped = 0;
1389: }
1390: }
1391: if (regs.spcflags & SPCFLAG_INT) {
1.1.1.12 root 1392: unset_special (SPCFLAG_INT);
1393: set_special (SPCFLAG_DOINT);
1.1.1.3 root 1394: }
1.1.1.4 root 1395: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1.1.1.12 root 1396: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1397: return 1;
1.1.1.2 root 1398: }
1.1.1.3 root 1399: return 0;
1.1.1.2 root 1400: }
1401:
1.1.1.8 root 1402: /* It's really sad to have two almost identical functions for this, but we
1403: do it all for performance... :( */
1.1.1.4 root 1404: static void m68k_run_1 (void)
1.1.1.2 root 1405: {
1.1.1.3 root 1406: for (;;) {
1.1.1.4 root 1407: int cycles;
1.1.1.20 root 1408: uae_u32 opcode = regs.ir;
1409:
1.1.1.8 root 1410: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1411: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1412: #if COUNT_INSTRS == 2
1413: if (table68k[opcode].handler != -1)
1414: instrcount[table68k[opcode].handler]++;
1415: #elif COUNT_INSTRS == 1
1416: instrcount[opcode]++;
1417: #endif
1418: cycles = (*cpufunctbl[opcode])(opcode);
1419: /*n_insns++;*/
1420: cycles &= cycles_mask;
1421: cycles |= cycles_val;
1422: do_cycles (cycles);
1423: if (regs.spcflags) {
1.1.1.19 root 1424: if (do_specialties (cycles))
1.1.1.8 root 1425: return;
1426: }
1427: }
1428: }
1429:
1.1.1.12 root 1430: #define DEBUG_PREFETCH
1431:
1.1.1.8 root 1432: /* Same thing, but don't use prefetch to get opcode. */
1433: static void m68k_run_2 (void)
1434: {
1435: for (;;) {
1436: int cycles;
1437: uae_u32 opcode = get_iword (0);
1.1.1.12 root 1438:
1.1.1.2 root 1439: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1440: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1441: #if COUNT_INSTRS == 2
1.1.1.8 root 1442: if (table68k[opcode].handler != -1)
1443: instrcount[table68k[opcode].handler]++;
1.1.1.3 root 1444: #elif COUNT_INSTRS == 1
1.1.1.2 root 1445: instrcount[opcode]++;
1446: #endif
1.1.1.4 root 1447: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.12 root 1448:
1.1.1.2 root 1449: /*n_insns++;*/
1.1.1.4 root 1450: cycles &= cycles_mask;
1451: cycles |= cycles_val;
1.1.1.21 root 1452: do_cycles (cycles);
1.1.1.2 root 1453: if (regs.spcflags) {
1.1.1.19 root 1454: if (do_specialties (cycles))
1.1 root 1455: return;
1456: }
1457: }
1458: }
1459:
1.1.1.13 root 1460: #define m68k_run1(F) (F) ()
1.1.1.2 root 1461:
1.1.1.3 root 1462: int in_m68k_go = 0;
1.1 root 1463:
1.1.1.20 root 1464: static void exception2_handle (uaecptr addr, uaecptr fault)
1465: {
1466: last_addr_for_exception_3 = addr;
1467: last_fault_for_exception_3 = fault;
1468: last_writeaccess_for_exception_3 = 0;
1469: last_instructionaccess_for_exception_3 = 0;
1470: Exception (2, addr);
1471: }
1472:
1.1.1.4 root 1473: void m68k_go (int may_quit)
1.1 root 1474: {
1.1.1.3 root 1475: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1476: write_log ("Bug! m68k_go is not reentrant.\n");
1477: abort ();
1.1.1.3 root 1478: }
1.1.1.4 root 1479:
1480: reset_frame_rate_hack ();
1481: update_68k_cycles ();
1482:
1.1.1.3 root 1483: in_m68k_go++;
1484: for (;;) {
1485: if (quit_program > 0) {
1486: if (quit_program == 1)
1.1 root 1487: break;
1.1.1.3 root 1488: quit_program = 0;
1.1.1.18 root 1489: if (savestate_state == STATE_RESTORE) {
1490: restore_state (savestate_filename);
1491: #if 0
1492: activate_debugger ();
1493: #endif
1494: }
1.1.1.4 root 1495: m68k_reset ();
1496: reset_all_systems ();
1497: customreset ();
1.1.1.14 root 1498: /* We may have been restoring state, but we're done now. */
1499: savestate_restore_finish ();
1.1.1.20 root 1500: fill_prefetch_slow ();
1.1.1.14 root 1501: handle_active_events ();
1.1.1.18 root 1502: if (regs.spcflags)
1.1.1.19 root 1503: do_specialties (0);
1.1.1.20 root 1504: m68k_setpc (regs.pc);
1.1 root 1505: }
1.1.1.14 root 1506:
1.1.1.3 root 1507: if (debugging)
1.1.1.4 root 1508: debug ();
1.1.1.20 root 1509: if (regs.panic) {
1510: regs.panic = 0;
1511: /* program jumped to non-existing memory and cpu was >= 68020 */
1512: get_real_address (regs.isp); /* stack in no one's land? -> reboot */
1513: if (regs.isp & 1)
1514: regs.panic = 1;
1515: if (!regs.panic)
1516: exception2_handle (regs.panic_pc, regs.panic_addr);
1517: if (regs.panic) {
1518: /* system is very badly confused */
1519: write_log ("double bus error or corrupted stack, forcing reboot..\n");
1520: regs.panic = 0;
1.1.1.22 root 1521: uae_reset (1);
1.1.1.20 root 1522: }
1523: }
1.1.1.22 root 1524: m68k_run1 (currprefs.cpu_level == 0 ? m68k_run_1 : m68k_run_2);
1.1 root 1525: }
1.1.1.3 root 1526: in_m68k_go--;
1.1 root 1527: }
1528:
1.1.1.4 root 1529: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1530: {
1.1.1.3 root 1531: uae_u32 opcode, val;
1532: struct instr *dp;
1533:
1534: opcode = get_iword_1(0);
1535: last_op_for_exception_3 = opcode;
1536: m68kpc_offset = 2;
1537:
1.1.1.8 root 1538: if (cpufunctbl[opcode] == op_illg_1) {
1.1.1.3 root 1539: opcode = 0x4AFC;
1540: }
1541: dp = table68k + opcode;
1542:
1543: if (dp->suse) {
1544: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1545: Exception (3, 0);
1546: return;
1547: }
1548: }
1549: if (dp->duse) {
1550: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1551: Exception (3, 0);
1552: return;
1553: }
1554: }
1555: }
1556:
1.1.1.11 root 1557: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1558: {
1559: uaecptr newpc = 0;
1.1.1.4 root 1560: m68kpc_offset = addr - m68k_getpc ();
1561: while (cnt-- > 0) {
1.1 root 1562: char instrname[20],*ccpt;
1563: int opwords;
1.1.1.3 root 1564: uae_u32 opcode;
1.1 root 1565: struct mnemolookup *lookup;
1566: struct instr *dp;
1.1.1.11 root 1567: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1568: for (opwords = 0; opwords < 5; opwords++){
1.1.1.11 root 1569: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1570: }
1.1.1.4 root 1571: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1572: m68kpc_offset += 2;
1.1.1.8 root 1573: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1574: opcode = 0x4AFC;
1575: }
1576: dp = table68k + opcode;
1577: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1578: ;
1.1.1.3 root 1579:
1.1.1.4 root 1580: strcpy (instrname, lookup->name);
1581: ccpt = strstr (instrname, "cc");
1.1 root 1582: if (ccpt != 0) {
1.1.1.4 root 1583: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1584: }
1.1.1.11 root 1585: fprintf (f, "%s", instrname);
1.1.1.3 root 1586: switch (dp->size){
1.1.1.11 root 1587: case sz_byte: fprintf (f, ".B "); break;
1588: case sz_word: fprintf (f, ".W "); break;
1589: case sz_long: fprintf (f, ".L "); break;
1590: default: fprintf (f, " "); break;
1.1 root 1591: }
1592:
1593: if (dp->suse) {
1.1.1.4 root 1594: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1595: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1.1 root 1596: }
1597: if (dp->suse && dp->duse)
1.1.1.11 root 1598: fprintf (f, ",");
1.1 root 1599: if (dp->duse) {
1.1.1.4 root 1600: newpc = m68k_getpc () + m68kpc_offset;
1.1.1.11 root 1601: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1602: }
1603: if (ccpt != 0) {
1604: if (cctrue(dp->cc))
1.1.1.11 root 1605: fprintf (f, " == %08lx (TRUE)", newpc);
1.1.1.3 root 1606: else
1.1.1.11 root 1607: fprintf (f, " == %08lx (FALSE)", newpc);
1.1 root 1608: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.11 root 1609: fprintf (f, " == %08lx", newpc);
1610: fprintf (f, "\n");
1.1 root 1611: }
1.1.1.4 root 1612: if (nextpc)
1613: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1614: }
1615:
1.1.1.11 root 1616: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1.1 root 1617: {
1618: int i;
1.1.1.3 root 1619: for (i = 0; i < 8; i++){
1.1.1.11 root 1620: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1621: if ((i & 3) == 3) fprintf (f, "\n");
1.1.1.3 root 1622: }
1623: for (i = 0; i < 8; i++){
1.1.1.23! root 1624: fprintf (f, "A%d: %08lx ", i, m68k_areg (regs, i));
1.1.1.11 root 1625: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1626: }
1.1.1.23! root 1627: if (regs.s == 0) regs.usp = m68k_areg (regs, 7);
! 1628: if (regs.s && regs.m) regs.msp = m68k_areg (regs, 7);
! 1629: if (regs.s && regs.m == 0) regs.isp = m68k_areg (regs, 7);
1.1.1.11 root 1630: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1631: regs.usp,regs.isp,regs.msp,regs.vbr);
1632: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1633: regs.t1, regs.t0, regs.s, regs.m,
1634: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1635: for (i = 0; i < 8; i++){
1.1.1.11 root 1636: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1637: if ((i & 3) == 3) fprintf (f, "\n");
1.1 root 1638: }
1.1.1.11 root 1639: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1640: (regs.fpsr & 0x8000000) != 0,
1641: (regs.fpsr & 0x4000000) != 0,
1642: (regs.fpsr & 0x2000000) != 0,
1643: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1644:
1.1.1.11 root 1645: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1.1.1.4 root 1646: if (nextpc)
1.1.1.11 root 1647: fprintf (f, "next PC: %08lx\n", *nextpc);
1.1 root 1648: }
1.1.1.14 root 1649:
1650:
1651: /* CPU save/restore code */
1652:
1653: #define CPUTYPE_EC 1
1654: #define CPUMODE_HALT 1
1655:
1.1.1.23! root 1656: const uae_u8 *restore_cpu (const uae_u8 *src)
1.1.1.14 root 1657: {
1658: int i,model,flags;
1659: uae_u32 l;
1660:
1661: model = restore_u32();
1662: switch (model) {
1663: case 68000:
1664: currprefs.cpu_level = 0;
1665: break;
1666: case 68010:
1667: currprefs.cpu_level = 1;
1668: break;
1669: case 68020:
1670: currprefs.cpu_level = 2;
1671: break;
1672: default:
1673: write_log ("Unknown cpu type %d\n", model);
1674: break;
1675: }
1676:
1677: flags = restore_u32();
1678: currprefs.address_space_24 = 0;
1679: if (flags & CPUTYPE_EC)
1680: currprefs.address_space_24 = 1;
1681: for (i = 0; i < 15; i++)
1682: regs.regs[i] = restore_u32 ();
1683: regs.pc = restore_u32 ();
1.1.1.20 root 1684: regs.irc = restore_u16 ();
1685: regs.ir = restore_u16 ();
1.1.1.14 root 1686: regs.usp = restore_u32 ();
1687: regs.isp = restore_u32 ();
1688: regs.sr = restore_u16 ();
1689: l = restore_u32();
1.1.1.18 root 1690: if (l & CPUMODE_HALT) {
1.1.1.14 root 1691: regs.stopped = 1;
1.1.1.18 root 1692: set_special (SPCFLAG_STOP);
1693: } else
1.1.1.14 root 1694: regs.stopped = 0;
1695: if (model >= 68010) {
1696: regs.dfc = restore_u32 ();
1697: regs.sfc = restore_u32 ();
1698: regs.vbr = restore_u32 ();
1699: }
1700: if (model >= 68020) {
1701: caar = restore_u32 ();
1702: cacr = restore_u32 ();
1703: regs.msp = restore_u32 ();
1704: }
1705: write_log ("CPU %d%s%03d, PC=%08.8X\n",
1706: model/1000, flags & 1 ? "EC" : "", model % 1000, regs.pc);
1707:
1708: return src;
1709: }
1710:
1711: static int cpumodel[] = { 68000, 68010, 68020, 68020 };
1712:
1.1.1.22 root 1713: uae_u8 *save_cpu (int *len, uae_u8 *dstptr)
1.1.1.14 root 1714: {
1715: uae_u8 *dstbak,*dst;
1716: int model,i;
1717:
1.1.1.22 root 1718: if (dstptr)
1719: dstbak = dst = dstptr;
1720: else
1721: dstbak = dst = malloc(4+4+15*4+4+4+4+4+2+4+4+4+4+4+4+4);
1.1.1.14 root 1722: model = cpumodel[currprefs.cpu_level];
1723: save_u32 (model); /* MODEL */
1724: save_u32 (currprefs.address_space_24 ? 1 : 0); /* FLAGS */
1725: for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */
1726: save_u32 (m68k_getpc ()); /* PC */
1.1.1.20 root 1727: save_u16 (regs.irc); /* prefetch */
1728: save_u16 (regs.ir); /* instruction prefetch */
1.1.1.14 root 1729: MakeSR ();
1730: save_u32 (!regs.s ? regs.regs[15] : regs.usp); /* USP */
1731: save_u32 (regs.s ? regs.regs[15] : regs.isp); /* ISP */
1732: save_u16 (regs.sr); /* SR/CCR */
1733: save_u32 (regs.stopped ? CPUMODE_HALT : 0); /* flags */
1734: if(model >= 68010) {
1735: save_u32 (regs.dfc); /* DFC */
1736: save_u32 (regs.sfc); /* SFC */
1737: save_u32 (regs.vbr); /* VBR */
1738: }
1739: if(model >= 68020) {
1740: save_u32 (caar); /* CAAR */
1741: save_u32 (cacr); /* CACR */
1742: save_u32 (regs.msp); /* MSP */
1743: }
1744: *len = dst - dstbak;
1745: return dstbak;
1746: }
1.1.1.20 root 1747:
1748: static void exception3f (uae_u32 opcode, uaecptr addr, uaecptr fault, int writeaccess, int instructionaccess)
1749: {
1750: last_addr_for_exception_3 = addr;
1751: last_fault_for_exception_3 = fault;
1752: last_op_for_exception_3 = opcode;
1753: last_writeaccess_for_exception_3 = writeaccess;
1754: last_instructionaccess_for_exception_3 = instructionaccess;
1755: Exception (3, fault);
1756: }
1757:
1758: void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault)
1759: {
1760: exception3f (opcode, addr, fault, 0, 0);
1761: }
1762:
1763: void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault)
1764: {
1765: exception3f (opcode, addr, fault, 0, 1);
1766: }
1767:
1768: void exception2 (uaecptr addr, uaecptr fault)
1769: {
1770: write_log ("delayed exception2!\n");
1771: regs.panic_pc = m68k_getpc();
1772: regs.panic_addr = addr;
1773: regs.panic = 2;
1774: set_special (SPCFLAG_BRK);
1775: m68k_setpc (0xf80000);
1776: fill_prefetch_slow ();
1777: }
1778:
1779: void cpureset (void)
1780: {
1781: customreset ();
1782: #if 0
1783: uae_u16 ins;
1784: if (currprefs.cpu_level == 0 && (currprefs.cpu_compatible || currprefs.cpu_cycle_exact)) {
1785: customreset ();
1786: return;
1787: }
1788: ins = get_word (m68k_getpc() + 2);
1789: if ((ins & ~7) == 0x4ed0) {
1790: int reg = ins & 7;
1791: uae_u32 addr = m68k_areg (regs, reg);
1792: write_log ("reset/jmp (ax) combination emulated\n");
1793: customreset ();
1794: if (addr < 0x80000)
1795: addr += 0xf80000;
1796: m68k_setpc (addr);
1797: }
1798: #endif
1799: }
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