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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
16: #include "machdep/m68k.h"
1.1 root 17: #include "memory.h"
18: #include "custom.h"
1.1.1.2 root 19: #include "readcpu.h"
1.1 root 20: #include "newcpu.h"
21: #include "autoconf.h"
22: #include "ersatz.h"
23: #include "debug.h"
24: #include "compiler.h"
1.1.1.3 root 25: #include "gui.h"
26:
27: /* Opcode of faulting instruction */
28: uae_u16 last_op_for_exception_3;
29: /* PC at fault time */
30: uaecptr last_addr_for_exception_3;
31: /* Address that generated the exception */
32: uaecptr last_fault_for_exception_3;
1.1 root 33:
34: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
35: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
36:
37: int movem_index1[256];
38: int movem_index2[256];
39: int movem_next[256];
40:
41: int fpp_movem_index1[256];
42: int fpp_movem_index2[256];
43: int fpp_movem_next[256];
44:
45: cpuop_func *cpufunctbl[65536];
46:
1.1.1.3 root 47: #define COUNT_INSTRS 0
1.1 root 48:
49: #if COUNT_INSTRS
50: static unsigned long int instrcount[65536];
1.1.1.3 root 51: static uae_u16 opcodenums[65536];
1.1 root 52:
1.1.1.4 root 53: static int compfn (const void *el1, const void *el2)
1.1 root 54: {
1.1.1.3 root 55: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
56: }
57:
58: static char *icountfilename (void)
59: {
60: char *name = getenv ("INSNCOUNT");
61: if (name)
62: return name;
63: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 64: }
65:
1.1.1.4 root 66: void dump_counts (void)
1.1 root 67: {
1.1.1.4 root 68: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 69: unsigned long int total;
1.1 root 70: int i;
1.1.1.3 root 71:
72: write_log ("Writing instruction count file...\n");
1.1.1.4 root 73: for (i = 0; i < 65536; i++) {
1.1 root 74: opcodenums[i] = i;
1.1.1.3 root 75: total += instrcount[i];
1.1 root 76: }
1.1.1.4 root 77: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 78:
79: fprintf (f, "Total: %lu\n", total);
80: for (i=0; i < 65536; i++) {
1.1 root 81: unsigned long int cnt = instrcount[opcodenums[i]];
82: struct instr *dp;
83: struct mnemolookup *lookup;
84: if (!cnt)
85: break;
86: dp = table68k + opcodenums[i];
1.1.1.4 root 87: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
88: ;
1.1.1.3 root 89: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 90: }
1.1.1.4 root 91: fclose (f);
1.1 root 92: }
93: #else
1.1.1.4 root 94: void dump_counts (void)
1.1 root 95: {
96: }
97: #endif
98:
99: int broken_in;
100:
1.1.1.4 root 101: static __inline__ unsigned int cft_map (unsigned int f)
102: {
103: #ifndef HAVE_GET_WORD_UNSWAPPED
104: return f;
105: #else
106: return ((f >> 8) & 255) | ((f & 255) << 8);
107: #endif
108: }
109:
110: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
111:
112: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
113: {
114: op_illg (cft_map (opcode));
115: return 4;
116: }
117:
1.1.1.3 root 118: static void build_cpufunctbl (void)
119: {
120: int i;
121: unsigned long opcode;
122: struct cputbl *tbl = (currprefs.cpu_level == 3 ? op_smalltbl_0
123: : currprefs.cpu_level == 2 ? op_smalltbl_1
124: : currprefs.cpu_level == 1 ? op_smalltbl_2
125: : currprefs.cpu_compatible ? op_smalltbl_4
126: : op_smalltbl_3);
127:
1.1.1.4 root 128: write_log ("Building CPU function table (%d %d %d).\n",
129: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 130:
131: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.4 root 132: cpufunctbl[cft_map (opcode)] = op_illg_1;
1.1.1.3 root 133: for (i = 0; tbl[i].handler != NULL; i++) {
134: if (! tbl[i].specific)
1.1.1.4 root 135: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
1.1.1.3 root 136: }
137: for (opcode = 0; opcode < 65536; opcode++) {
138: cpuop_func *f;
139:
140: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
141: continue;
142:
143: if (table68k[opcode].handler != -1) {
1.1.1.4 root 144: f = cpufunctbl[cft_map (table68k[opcode].handler)];
145: if (f == op_illg_1)
1.1.1.3 root 146: abort();
1.1.1.4 root 147: cpufunctbl[cft_map (opcode)] = f;
1.1.1.3 root 148: }
149: }
150: for (i = 0; tbl[i].handler != NULL; i++) {
151: if (tbl[i].specific)
1.1.1.4 root 152: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
153: }
154: }
155:
156: unsigned long cycles_mask, cycles_val;
157:
158: static void update_68k_cycles (void)
159: {
160: cycles_mask = 0;
161: cycles_val = currprefs.m68k_speed;
162: if (currprefs.m68k_speed < 1) {
163: cycles_mask = 0xFFFFFFFF;
164: cycles_val = 0;
1.1.1.3 root 165: }
166: }
167:
168: void check_prefs_changed_cpu (void)
169: {
170: if (currprefs.cpu_level != changed_prefs.cpu_level
171: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
172: currprefs.cpu_level = changed_prefs.cpu_level;
173: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
174: build_cpufunctbl ();
175: }
1.1.1.4 root 176: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
177: currprefs.m68k_speed = changed_prefs.m68k_speed;
178: reset_frame_rate_hack ();
179: update_68k_cycles ();
180: }
1.1.1.3 root 181: }
182:
1.1 root 183: void init_m68k (void)
184: {
1.1.1.3 root 185: int i;
186:
1.1.1.4 root 187: update_68k_cycles ();
188:
1.1 root 189: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 190: int j;
1.1 root 191: for (j = 0 ; j < 8 ; j++) {
192: if (i & (1 << j)) break;
193: }
194: movem_index1[i] = j;
195: movem_index2[i] = 7-j;
196: movem_next[i] = i & (~(1 << j));
197: }
198: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 199: int j;
1.1 root 200: for (j = 7 ; j >= 0 ; j--) {
201: if (i & (1 << j)) break;
202: }
203: fpp_movem_index1[i] = j;
204: fpp_movem_index2[i] = 7-j;
205: fpp_movem_next[i] = i & (~(1 << j));
206: }
207: #if COUNT_INSTRS
208: {
1.1.1.4 root 209: FILE *f = fopen (icountfilename (), "r");
210: memset (instrcount, 0, sizeof instrcount);
1.1 root 211: if (f) {
1.1.1.3 root 212: uae_u32 opcode, count, total;
1.1 root 213: char name[20];
1.1.1.3 root 214: write_log ("Reading instruction count file...\n");
1.1.1.4 root 215: fscanf (f, "Total: %lu\n", &total);
216: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 217: instrcount[opcode] = count;
218: }
219: fclose(f);
220: }
221: }
222: #endif
1.1.1.5 ! root 223: write_log ("Building CPU table for configuration: 68");
! 224: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
! 225: write_log ("EC");
! 226: switch (currprefs.cpu_level) {
! 227: case 1:
! 228: write_log ("010");
! 229: break;
! 230: case 2:
! 231: write_log ("020");
! 232: break;
! 233: case 3:
! 234: write_log ("020/881");
! 235: break;
! 236: default:
! 237: write_log ("000");
! 238: break;
! 239: }
! 240: if (currprefs.cpu_compatible)
! 241: write_log (" (compatible mode)");
! 242: write_log ("\n");
! 243:
1.1 root 244: read_table68k ();
245: do_merges ();
1.1.1.2 root 246:
1.1.1.4 root 247: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 248:
1.1.1.3 root 249: build_cpufunctbl ();
250: }
1.1.1.4 root 251:
1.1 root 252: struct regstruct regs, lastint_regs;
253: static struct regstruct regs_backup[16];
254: static int backup_pointer = 0;
1.1.1.3 root 255: static long int m68kpc_offset;
1.1 root 256: int lastint_no;
257:
1.1.1.3 root 258: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
259: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
260: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
261:
1.1.1.4 root 262: uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 263: {
264: uae_u16 dp;
265: uae_s8 disp8;
266: uae_s16 disp16;
1.1 root 267: int r;
1.1.1.3 root 268: uae_u32 dispreg;
269: uaecptr addr;
270: uae_s32 offset = 0;
1.1.1.2 root 271: char buffer[80];
1.1.1.3 root 272:
273: switch (mode){
1.1 root 274: case Dreg:
1.1.1.3 root 275: sprintf (buffer,"D%d", reg);
1.1 root 276: break;
277: case Areg:
1.1.1.3 root 278: sprintf (buffer,"A%d", reg);
1.1 root 279: break;
280: case Aind:
1.1.1.3 root 281: sprintf (buffer,"(A%d)", reg);
1.1 root 282: break;
283: case Aipi:
1.1.1.3 root 284: sprintf (buffer,"(A%d)+", reg);
1.1 root 285: break;
286: case Apdi:
1.1.1.3 root 287: sprintf (buffer,"-(A%d)", reg);
1.1 root 288: break;
289: case Ad16:
1.1.1.4 root 290: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 291: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
292: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1 root 293: (long unsigned int)addr);
294: break;
295: case Ad8r:
1.1.1.4 root 296: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 297: disp8 = dp & 0xFF;
298: r = (dp & 0x7000) >> 12;
1.1.1.3 root 299: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
300: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 301: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 302:
1.1 root 303: if (dp & 0x100) {
1.1.1.3 root 304: uae_s32 outer = 0, disp = 0;
305: uae_s32 base = m68k_areg(regs,reg);
306: char name[10];
307: sprintf (name,"A%d, ",reg);
308: if (dp & 0x80) { base = 0; name[0] = 0; }
309: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 310: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
311: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 312: base += disp;
313:
1.1.1.4 root 314: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
315: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 316:
317: if (!(dp & 4)) base += dispreg;
318: if (dp & 3) base = get_long (base);
319: if (dp & 4) base += dispreg;
320:
321: addr = base + outer;
322: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
323: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
324: 1 << ((dp >> 9) & 3),
325: disp,outer,
326: (long unsigned int)addr);
327: } else {
328: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
329: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 330: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
331: 1 << ((dp >> 9) & 3), disp8,
332: (long unsigned int)addr);
333: }
334: break;
335: case PC16:
1.1.1.4 root 336: addr = m68k_getpc () + m68kpc_offset;
337: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 338: addr += (uae_s16)disp16;
339: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
1.1 root 340: break;
341: case PC8r:
1.1.1.4 root 342: addr = m68k_getpc () + m68kpc_offset;
343: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 344: disp8 = dp & 0xFF;
345: r = (dp & 0x7000) >> 12;
1.1.1.2 root 346: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 347: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 348: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 349:
1.1 root 350: if (dp & 0x100) {
1.1.1.3 root 351: uae_s32 outer = 0,disp = 0;
352: uae_s32 base = addr;
353: char name[10];
354: sprintf (name,"PC, ");
355: if (dp & 0x80) { base = 0; name[0] = 0; }
356: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 357: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
358: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 359: base += disp;
360:
1.1.1.4 root 361: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
362: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 363:
364: if (!(dp & 4)) base += dispreg;
365: if (dp & 3) base = get_long (base);
366: if (dp & 4) base += dispreg;
367:
368: addr = base + outer;
369: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
370: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
371: 1 << ((dp >> 9) & 3),
372: disp,outer,
373: (long unsigned int)addr);
1.1.1.2 root 374: } else {
1.1.1.3 root 375: addr += (uae_s32)((uae_s8)disp8) + dispreg;
376: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 377: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
378: disp8, (long unsigned int)addr);
379: }
380: break;
381: case absw:
1.1.1.4 root 382: sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 383: m68kpc_offset += 2;
1.1 root 384: break;
385: case absl:
1.1.1.4 root 386: sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 387: m68kpc_offset += 4;
1.1 root 388: break;
389: case imm:
1.1.1.3 root 390: switch (size){
1.1 root 391: case sz_byte:
1.1.1.4 root 392: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 393: m68kpc_offset += 2;
394: break;
1.1 root 395: case sz_word:
1.1.1.4 root 396: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 397: m68kpc_offset += 2;
398: break;
1.1 root 399: case sz_long:
1.1.1.4 root 400: sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 401: m68kpc_offset += 4;
402: break;
1.1 root 403: default:
404: break;
405: }
406: break;
407: case imm0:
1.1.1.4 root 408: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 409: m68kpc_offset += 2;
410: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 411: break;
412: case imm1:
1.1.1.4 root 413: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 414: m68kpc_offset += 2;
415: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 416: break;
417: case imm2:
1.1.1.4 root 418: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 419: m68kpc_offset += 4;
420: sprintf (buffer,"#$%08lx", (long unsigned int)offset);
1.1 root 421: break;
422: case immi:
1.1.1.3 root 423: offset = (uae_s32)(uae_s8)(reg & 0xff);
424: sprintf (buffer,"#$%08lx", (long unsigned int)offset);
1.1 root 425: break;
426: default:
427: break;
428: }
1.1.1.2 root 429: if (buf == 0)
1.1.1.3 root 430: printf ("%s", buffer);
1.1.1.2 root 431: else
1.1.1.4 root 432: strcat (buf, buffer);
1.1.1.2 root 433: return offset;
1.1 root 434: }
435:
1.1.1.3 root 436: /* The plan is that this will take over the job of exception 3 handling -
437: * the CPU emulation functions will just do a longjmp to m68k_go whenever
438: * they hit an odd address. */
1.1.1.4 root 439: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 440: {
441: uae_u16 dp;
442: uae_s8 disp8;
443: uae_s16 disp16;
444: int r;
445: uae_u32 dispreg;
446: uaecptr addr;
447: uae_s32 offset = 0;
448:
449: switch (mode){
450: case Dreg:
451: *val = m68k_dreg (regs, reg);
452: return 1;
453: case Areg:
454: *val = m68k_areg (regs, reg);
455: return 1;
456:
457: case Aind:
458: case Aipi:
459: addr = m68k_areg (regs, reg);
460: break;
461: case Apdi:
462: addr = m68k_areg (regs, reg);
463: break;
464: case Ad16:
1.1.1.4 root 465: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 466: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
467: break;
468: case Ad8r:
469: addr = m68k_areg (regs, reg);
470: d8r_common:
1.1.1.4 root 471: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 472: disp8 = dp & 0xFF;
473: r = (dp & 0x7000) >> 12;
474: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
475: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
476: dispreg <<= (dp >> 9) & 3;
477:
478: if (dp & 0x100) {
479: uae_s32 outer = 0, disp = 0;
480: uae_s32 base = addr;
481: if (dp & 0x80) base = 0;
482: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 483: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
484: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 485: base += disp;
486:
1.1.1.4 root 487: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
488: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 489:
490: if (!(dp & 4)) base += dispreg;
491: if (dp & 3) base = get_long (base);
492: if (dp & 4) base += dispreg;
493:
494: addr = base + outer;
495: } else {
496: addr += (uae_s32)((uae_s8)disp8) + dispreg;
497: }
498: break;
499: case PC16:
1.1.1.4 root 500: addr = m68k_getpc () + m68kpc_offset;
501: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 502: addr += (uae_s16)disp16;
503: break;
504: case PC8r:
1.1.1.4 root 505: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 506: goto d8r_common;
507: case absw:
1.1.1.4 root 508: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 509: m68kpc_offset += 2;
510: break;
511: case absl:
1.1.1.4 root 512: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 513: m68kpc_offset += 4;
514: break;
515: case imm:
516: switch (size){
517: case sz_byte:
1.1.1.4 root 518: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 519: m68kpc_offset += 2;
520: break;
521: case sz_word:
1.1.1.4 root 522: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 523: m68kpc_offset += 2;
524: break;
525: case sz_long:
1.1.1.4 root 526: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 527: m68kpc_offset += 4;
528: break;
529: default:
530: break;
531: }
532: return 1;
533: case imm0:
534: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
535: m68kpc_offset += 2;
536: return 1;
537: case imm1:
538: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
539: m68kpc_offset += 2;
540: return 1;
541: case imm2:
542: *val = get_ilong_1 (m68kpc_offset);
543: m68kpc_offset += 4;
544: return 1;
545: case immi:
546: *val = (uae_s32)(uae_s8)(reg & 0xff);
547: return 1;
548: default:
549: addr = 0;
550: break;
551: }
552: if ((addr & 1) == 0)
553: return 1;
554:
1.1.1.4 root 555: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 556: last_fault_for_exception_3 = addr;
557: return 0;
558: }
559:
1.1.1.5 ! root 560: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
! 561: {
! 562: int reg = (dp >> 12) & 15;
! 563: uae_s32 regd = regs.regs[reg];
! 564: if ((dp & 0x800) == 0)
! 565: regd = (uae_s32)(uae_s16)regd;
! 566: regd <<= (dp >> 9) & 3;
! 567: if (dp & 0x100) {
! 568: uae_s32 outer = 0;
! 569: if (dp & 0x80) base = 0;
! 570: if (dp & 0x40) regd = 0;
! 571:
! 572: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
! 573: if ((dp & 0x30) == 0x30) base += next_ilong();
! 574:
! 575: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
! 576: if ((dp & 0x3) == 0x3) outer = next_ilong();
! 577:
! 578: if ((dp & 0x4) == 0) base += regd;
! 579: if (dp & 0x3) base = get_long (base);
! 580: if (dp & 0x4) base += regd;
! 581:
! 582: return base + outer;
! 583: } else {
! 584: return base + (uae_s32)((uae_s8)dp) + regd;
! 585: }
! 586: }
! 587:
! 588: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
! 589: {
! 590: int reg = (dp >> 12) & 15;
! 591: uae_s32 regd = regs.regs[reg];
! 592: #if 1
! 593: if ((dp & 0x800) == 0)
! 594: regd = (uae_s32)(uae_s16)regd;
! 595: return base + (uae_s8)dp + regd;
! 596: #else
! 597: /* Branch-free code... benchmark this again now that
! 598: * things are no longer inline. */
! 599: uae_s32 regd16;
! 600: uae_u32 mask;
! 601: mask = ((dp & 0x800) >> 11) - 1;
! 602: regd16 = (uae_s32)(uae_s16)regd;
! 603: regd16 &= mask;
! 604: mask = ~mask;
! 605: base += (uae_s8)dp;
! 606: regd &= mask;
! 607: regd |= regd16;
! 608: return base + regd;
! 609: #endif
! 610: }
! 611:
1.1.1.4 root 612: void MakeSR (void)
1.1 root 613: {
614: #if 0
615: assert((regs.t1 & 1) == regs.t1);
616: assert((regs.t0 & 1) == regs.t0);
617: assert((regs.s & 1) == regs.s);
618: assert((regs.m & 1) == regs.m);
619: assert((XFLG & 1) == XFLG);
620: assert((NFLG & 1) == NFLG);
621: assert((ZFLG & 1) == ZFLG);
622: assert((VFLG & 1) == VFLG);
623: assert((CFLG & 1) == CFLG);
624: #endif
625: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
626: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.3 root 627: | (XFLG << 4) | (NFLG << 3) | (ZFLG << 2) | (VFLG << 1)
1.1.1.4 root 628: | CFLG);
1.1 root 629: }
630:
1.1.1.4 root 631: void MakeFromSR (void)
1.1 root 632: {
633: int oldm = regs.m;
634: int olds = regs.s;
635:
636: regs.t1 = (regs.sr >> 15) & 1;
637: regs.t0 = (regs.sr >> 14) & 1;
638: regs.s = (regs.sr >> 13) & 1;
639: regs.m = (regs.sr >> 12) & 1;
640: regs.intmask = (regs.sr >> 8) & 7;
641: XFLG = (regs.sr >> 4) & 1;
642: NFLG = (regs.sr >> 3) & 1;
643: ZFLG = (regs.sr >> 2) & 1;
644: VFLG = (regs.sr >> 1) & 1;
645: CFLG = regs.sr & 1;
1.1.1.3 root 646: if (currprefs.cpu_level >= 2) {
1.1 root 647: if (olds != regs.s) {
1.1.1.3 root 648: if (olds) {
649: if (oldm)
650: regs.msp = m68k_areg(regs, 7);
651: else
652: regs.isp = m68k_areg(regs, 7);
653: m68k_areg(regs, 7) = regs.usp;
654: } else {
655: regs.usp = m68k_areg(regs, 7);
656: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
657: }
1.1 root 658: } else if (olds && oldm != regs.m) {
659: if (oldm) {
1.1.1.2 root 660: regs.msp = m68k_areg(regs, 7);
661: m68k_areg(regs, 7) = regs.isp;
662: } else {
663: regs.isp = m68k_areg(regs, 7);
664: m68k_areg(regs, 7) = regs.msp;
1.1 root 665: }
666: }
667: } else {
668: if (olds != regs.s) {
1.1.1.3 root 669: if (olds) {
670: regs.isp = m68k_areg(regs, 7);
671: m68k_areg(regs, 7) = regs.usp;
672: } else {
673: regs.usp = m68k_areg(regs, 7);
674: m68k_areg(regs, 7) = regs.isp;
675: }
676: }
1.1 root 677: }
1.1.1.3 root 678:
1.1 root 679: regs.spcflags |= SPCFLAG_INT;
680: if (regs.t1 || regs.t0)
1.1.1.3 root 681: regs.spcflags |= SPCFLAG_TRACE;
1.1 root 682: else
1.1.1.3 root 683: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 684: }
685:
1.1.1.3 root 686: void Exception(int nr, uaecptr oldpc)
1.1 root 687: {
1.1.1.2 root 688: compiler_flush_jsr_stack();
1.1 root 689: MakeSR();
690: if (!regs.s) {
1.1.1.2 root 691: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 692: if (currprefs.cpu_level >= 2)
693: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
694: else
695: m68k_areg(regs, 7) = regs.isp;
1.1 root 696: regs.s = 1;
697: }
1.1.1.3 root 698: if (currprefs.cpu_level > 0) {
1.1 root 699: if (nr == 2 || nr == 3) {
700: int i;
1.1.1.3 root 701: /* @@@ this is probably wrong (?) */
1.1 root 702: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 703: m68k_areg(regs, 7) -= 2;
704: put_word (m68k_areg(regs, 7), 0);
1.1 root 705: }
1.1.1.2 root 706: m68k_areg(regs, 7) -= 2;
707: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 708: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 709: m68k_areg(regs, 7) -= 4;
710: put_long (m68k_areg(regs, 7), oldpc);
711: m68k_areg(regs, 7) -= 2;
712: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
713: } else if (regs.m && nr >= 24 && nr < 32) {
714: m68k_areg(regs, 7) -= 2;
715: put_word (m68k_areg(regs, 7), nr * 4);
716: m68k_areg(regs, 7) -= 4;
717: put_long (m68k_areg(regs, 7), m68k_getpc ());
718: m68k_areg(regs, 7) -= 2;
719: put_word (m68k_areg(regs, 7), regs.sr);
720: regs.sr |= (1 << 13);
721: regs.msp = m68k_areg(regs, 7);
722: m68k_areg(regs, 7) = regs.isp;
723: m68k_areg(regs, 7) -= 2;
724: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
725: } else {
726: m68k_areg(regs, 7) -= 2;
727: put_word (m68k_areg(regs, 7), nr * 4);
728: }
729: } else {
730: if (nr == 2 || nr == 3) {
731: m68k_areg(regs, 7) -= 12;
732: /* ??????? */
733: if (nr == 3) {
734: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
735: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
736: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
737: }
738: write_log ("Exception!\n");
739: goto kludge_me_do;
740: }
1.1 root 741: }
1.1.1.2 root 742: m68k_areg(regs, 7) -= 4;
743: put_long (m68k_areg(regs, 7), m68k_getpc ());
1.1.1.3 root 744: kludge_me_do:
1.1.1.2 root 745: m68k_areg(regs, 7) -= 2;
746: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 747: m68k_setpc (get_long (regs.vbr + 4*nr));
748: fill_prefetch_0 ();
1.1 root 749: regs.t1 = regs.t0 = regs.m = 0;
750: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
751: }
752:
753: static void Interrupt(int nr)
754: {
755: assert(nr < 8 && nr >= 0);
756: lastint_regs = regs;
757: lastint_no = nr;
758: Exception(nr+24, 0);
1.1.1.3 root 759:
1.1 root 760: regs.intmask = nr;
761: regs.spcflags |= SPCFLAG_INT;
762: }
763:
764: static int caar, cacr;
765:
1.1.1.3 root 766: void m68k_move2c (int regno, uae_u32 *regp)
1.1 root 767: {
1.1.1.3 root 768: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 769: op_illg (0x4E7B);
770: else
771: switch (regno) {
772: case 0: regs.sfc = *regp & 7; break;
773: case 1: regs.dfc = *regp & 7; break;
774: case 2: cacr = *regp & 0x3; break; /* ignore C and CE */
775: case 0x800: regs.usp = *regp; break;
776: case 0x801: regs.vbr = *regp; break;
777: case 0x802: caar = *regp &0xfc; break;
1.1.1.2 root 778: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
779: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1 root 780: default:
781: op_illg (0x4E7B);
782: break;
783: }
784: }
785:
1.1.1.3 root 786: void m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 787: {
1.1.1.3 root 788: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 789: op_illg (0x4E7A);
790: else
791: switch (regno) {
792: case 0: *regp = regs.sfc; break;
793: case 1: *regp = regs.dfc; break;
794: case 2: *regp = cacr; break;
795: case 0x800: *regp = regs.usp; break;
796: case 0x801: *regp = regs.vbr; break;
797: case 0x802: *regp = caar; break;
1.1.1.2 root 798: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
799: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
1.1 root 800: default:
801: op_illg (0x4E7A);
802: break;
803: }
804: }
805:
806: static __inline__ int
1.1.1.3 root 807: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 808: {
1.1.1.3 root 809: uae_u32 q = 0, cbit = 0;
1.1 root 810: int i;
811:
812: if (div <= src_hi) {
1.1.1.4 root 813: return 1;
1.1 root 814: }
815: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 816: cbit = src_hi & 0x80000000ul;
1.1 root 817: src_hi <<= 1;
1.1.1.2 root 818: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 819: src_lo <<= 1;
820: q = q << 1;
821: if (cbit || div <= src_hi) {
822: q |= 1;
823: src_hi -= div;
824: }
825: }
826: *quot = q;
827: *rem = src_hi;
1.1.1.4 root 828: return 0;
1.1 root 829: }
830:
1.1.1.3 root 831: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 832: {
1.1.1.3 root 833: #if defined(uae_s64)
1.1 root 834: if (src == 0) {
1.1.1.4 root 835: Exception (5, oldpc);
1.1 root 836: return;
837: }
838: if (extra & 0x800) {
839: /* signed variant */
1.1.1.3 root 840: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
841: uae_s64 quot, rem;
842:
1.1 root 843: if (extra & 0x400) {
1.1.1.3 root 844: a &= 0xffffffffu;
845: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 846: }
1.1.1.3 root 847: rem = a % (uae_s64)(uae_s32)src;
848: quot = a / (uae_s64)(uae_s32)src;
849: if ((quot & UVAL64(0xffffffff80000000)) != 0
850: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
851: {
1.1 root 852: VFLG = NFLG = 1;
853: CFLG = 0;
1.1.1.4 root 854: } else {
1.1.1.3 root 855: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1 root 856: VFLG = CFLG = 0;
1.1.1.3 root 857: ZFLG = ((uae_s32)quot) == 0;
858: NFLG = ((uae_s32)quot) < 0;
1.1.1.2 root 859: m68k_dreg(regs, extra & 7) = rem;
860: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 861: }
862: } else {
863: /* unsigned */
1.1.1.3 root 864: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
865: uae_u64 quot, rem;
866:
1.1 root 867: if (extra & 0x400) {
1.1.1.3 root 868: a &= 0xffffffffu;
869: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 870: }
1.1.1.3 root 871: rem = a % (uae_u64)src;
872: quot = a / (uae_u64)src;
873: if (quot > 0xffffffffu) {
1.1 root 874: VFLG = NFLG = 1;
875: CFLG = 0;
1.1.1.4 root 876: } else {
1.1 root 877: VFLG = CFLG = 0;
1.1.1.3 root 878: ZFLG = ((uae_s32)quot) == 0;
879: NFLG = ((uae_s32)quot) < 0;
1.1.1.2 root 880: m68k_dreg(regs, extra & 7) = rem;
881: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 882: }
883: }
884: #else
885: if (src == 0) {
1.1.1.4 root 886: Exception (5, oldpc);
1.1 root 887: return;
888: }
889: if (extra & 0x800) {
890: /* signed variant */
1.1.1.3 root 891: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
892: uae_s32 hi = lo < 0 ? -1 : 0;
893: uae_s32 save_high;
894: uae_u32 quot, rem;
895: uae_u32 sign;
896:
1.1 root 897: if (extra & 0x400) {
1.1.1.3 root 898: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 899: }
900: save_high = hi;
901: sign = (hi ^ src);
902: if (hi < 0) {
1.1.1.4 root 903: hi = ~hi;
904: lo = -lo;
905: if (lo == 0) hi++;
1.1 root 906: }
1.1.1.3 root 907: if ((uae_s32)src < 0) src = -src;
1.1 root 908: if (div_unsigned(hi, lo, src, ", &rem) ||
909: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
910: VFLG = NFLG = 1;
911: CFLG = 0;
1.1.1.4 root 912: } else {
1.1 root 913: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 914: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1 root 915: VFLG = CFLG = 0;
1.1.1.3 root 916: ZFLG = ((uae_s32)quot) == 0;
917: NFLG = ((uae_s32)quot) < 0;
1.1.1.2 root 918: m68k_dreg(regs, extra & 7) = rem;
919: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 920: }
921: } else {
922: /* unsigned */
1.1.1.3 root 923: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
924: uae_u32 hi = 0;
925: uae_u32 quot, rem;
926:
1.1 root 927: if (extra & 0x400) {
1.1.1.3 root 928: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 929: }
930: if (div_unsigned(hi, lo, src, ", &rem)) {
931: VFLG = NFLG = 1;
932: CFLG = 0;
1.1.1.4 root 933: } else {
1.1 root 934: VFLG = CFLG = 0;
1.1.1.3 root 935: ZFLG = ((uae_s32)quot) == 0;
936: NFLG = ((uae_s32)quot) < 0;
1.1.1.2 root 937: m68k_dreg(regs, extra & 7) = rem;
938: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 939: }
940: }
941: #endif
942: }
943:
944: static __inline__ void
1.1.1.3 root 945: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 946: {
1.1.1.3 root 947: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
948: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
949: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
950: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
951: uae_u32 lo;
952:
953: lo = r0 + ((r1 << 16) & 0xffff0000ul);
954: if (lo < r0) r3++;
955: r0 = lo;
956: lo = r0 + ((r2 << 16) & 0xffff0000ul);
957: if (lo < r0) r3++;
958: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 959: *dst_lo = lo;
960: *dst_hi = r3;
961: }
962:
1.1.1.3 root 963: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 964: {
1.1.1.3 root 965: #if defined(uae_s64)
1.1 root 966: if (extra & 0x800) {
967: /* signed variant */
1.1.1.3 root 968: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 969:
1.1.1.3 root 970: a *= (uae_s64)(uae_s32)src;
1.1 root 971: VFLG = CFLG = 0;
972: ZFLG = a == 0;
973: NFLG = a < 0;
974: if (extra & 0x400)
1.1.1.2 root 975: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 976: else if ((a & UVAL64(0xffffffff80000000)) != 0
977: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
978: {
1.1 root 979: VFLG = 1;
980: }
1.1.1.3 root 981: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 982: } else {
983: /* unsigned */
1.1.1.3 root 984: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
985:
986: a *= (uae_u64)src;
1.1 root 987: VFLG = CFLG = 0;
988: ZFLG = a == 0;
1.1.1.3 root 989: NFLG = ((uae_s64)a) < 0;
1.1 root 990: if (extra & 0x400)
1.1.1.2 root 991: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 992: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1 root 993: VFLG = 1;
994: }
1.1.1.3 root 995: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 996: }
997: #else
998: if (extra & 0x800) {
999: /* signed variant */
1.1.1.3 root 1000: uae_s32 src1,src2;
1001: uae_u32 dst_lo,dst_hi;
1002: uae_u32 sign;
1.1 root 1003:
1.1.1.3 root 1004: src1 = (uae_s32)src;
1005: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1006: sign = (src1 ^ src2);
1007: if (src1 < 0) src1 = -src1;
1008: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1009: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1010: if (sign & 0x80000000) {
1011: dst_hi = ~dst_hi;
1012: dst_lo = -dst_lo;
1013: if (dst_lo == 0) dst_hi++;
1014: }
1015: VFLG = CFLG = 0;
1016: ZFLG = dst_hi == 0 && dst_lo == 0;
1.1.1.3 root 1017: NFLG = ((uae_s32)dst_hi) < 0;
1.1 root 1018: if (extra & 0x400)
1.1.1.2 root 1019: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1020: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1021: && ((dst_hi & 0xffffffff) != 0xffffffff
1022: || (dst_lo & 0x80000000) != 0x80000000))
1023: {
1.1 root 1024: VFLG = 1;
1025: }
1.1.1.2 root 1026: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1027: } else {
1028: /* unsigned */
1.1.1.3 root 1029: uae_u32 dst_lo,dst_hi;
1030:
1031: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1032:
1033: VFLG = CFLG = 0;
1034: ZFLG = dst_hi == 0 && dst_lo == 0;
1.1.1.3 root 1035: NFLG = ((uae_s32)dst_hi) < 0;
1.1 root 1036: if (extra & 0x400)
1.1.1.2 root 1037: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1038: else if (dst_hi != 0) {
1039: VFLG = 1;
1040: }
1.1.1.2 root 1041: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1042: }
1043: #endif
1044: }
1045: static char* ccnames[] =
1046: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1047: "VC","VS","PL","MI","GE","LT","GT","LE" };
1048:
1.1.1.4 root 1049: void m68k_reset (void)
1.1 root 1050: {
1.1.1.3 root 1051: m68k_areg (regs, 7) = get_long (0x00f80000);
1052: m68k_setpc (get_long (0x00f80004));
1053: fill_prefetch_0 ();
1.1.1.2 root 1054: regs.kick_mask = 0xF80000;
1.1 root 1055: regs.s = 1;
1056: regs.m = 0;
1057: regs.stopped = 0;
1058: regs.t1 = 0;
1059: regs.t0 = 0;
1060: ZFLG = CFLG = NFLG = VFLG = 0;
1061: regs.spcflags = 0;
1062: regs.intmask = 7;
1063: regs.vbr = regs.sfc = regs.dfc = 0;
1064: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1065: }
1066:
1.1.1.4 root 1067: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1068: {
1.1.1.3 root 1069: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1070:
1.1.1.3 root 1071: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1072: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1073: m68k_incpc (2);
1074: fill_prefetch_0 ();
1.1.1.4 root 1075: return 4;
1.1.1.3 root 1076: }
1077:
1078: compiler_flush_jsr_stack ();
1079: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1080: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1081: broken_in = 1;
1.1 root 1082: regs.spcflags |= SPCFLAG_BRK;
1083: quit_program = 1;
1084: }
1.1.1.2 root 1085: if (opcode == 0xFF0D) {
1.1.1.3 root 1086: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1087: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1088: uae_u16 arg = get_iword (2);
1089: m68k_incpc (4);
1090: ersatz_perform (arg);
1091: fill_prefetch_0 ();
1.1.1.4 root 1092: return 4;
1.1.1.3 root 1093: } else if ((pc & 0xF80000) == 0xF00000) {
1.1.1.2 root 1094: /* User-mode STOP replacement */
1.1.1.3 root 1095: m68k_setstopped (1);
1.1.1.4 root 1096: return 4;
1.1.1.2 root 1097: }
1.1 root 1098: }
1.1.1.3 root 1099:
1100: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1101: /* Calltrap. */
1102: m68k_incpc(2);
1103: call_calltrap (opcode & 0xFFF);
1104: fill_prefetch_0 ();
1.1.1.4 root 1105: return 4;
1.1.1.3 root 1106: }
1107:
1.1 root 1108: if ((opcode & 0xF000) == 0xF000) {
1109: Exception(0xB,0);
1.1.1.4 root 1110: return 4;
1.1 root 1111: }
1112: if ((opcode & 0xF000) == 0xA000) {
1.1.1.3 root 1113: if ((pc & 0xF80000) == 0xF00000) {
1114: /* Calltrap. */
1115: call_calltrap (opcode & 0xFFF);
1116: }
1117: Exception(0xA,0);
1.1.1.4 root 1118: return 4;
1.1 root 1119: }
1.1.1.4 root 1120: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.3 root 1121: Exception (4,0);
1.1.1.4 root 1122: return 4;
1.1 root 1123: }
1124:
1.1.1.3 root 1125: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1126: {
1127: if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1128:
1129: } else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1130: } else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1131: } else
1.1.1.3 root 1132: op_illg (opcode);
1.1 root 1133: }
1134:
1.1.1.4 root 1135: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1136:
1.1.1.3 root 1137: static uaecptr last_trace_ad = 0;
1.1 root 1138:
1.1.1.4 root 1139: static __inline__ void do_trace (void)
1.1 root 1140: {
1141: if (regs.spcflags & SPCFLAG_TRACE) { /* 6 */
1142: if (regs.t0) {
1.1.1.3 root 1143: uae_u16 opcode;
1.1 root 1144: /* should also include TRAP, CHK, SR modification FPcc */
1145: /* probably never used so why bother */
1146: /* We can afford this to be inefficient... */
1.1.1.3 root 1147: m68k_setpc (m68k_getpc ());
1148: fill_prefetch_0 ();
1149: opcode = get_word (regs.pc);
1.1 root 1150: if (opcode == 0x4e72 /* RTE */
1151: || opcode == 0x4e74 /* RTD */
1152: || opcode == 0x4e75 /* RTS */
1153: || opcode == 0x4e77 /* RTR */
1154: || opcode == 0x4e76 /* TRAPV */
1155: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1156: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1157: || (opcode & 0xff00) == 0x6100 /* BSR */
1158: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1.1.1.3 root 1159: && cctrue((opcode >> 8) & 0xf))
1.1 root 1160: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1.1.1.3 root 1161: && !cctrue((opcode >> 8) & 0xf)
1162: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1.1 root 1163: {
1.1.1.4 root 1164: last_trace_ad = m68k_getpc ();
1.1 root 1165: regs.spcflags &= ~SPCFLAG_TRACE;
1166: regs.spcflags |= SPCFLAG_DOTRACE;
1167: }
1168: } else if (regs.t1) {
1.1.1.4 root 1169: last_trace_ad = m68k_getpc ();
1.1 root 1170: regs.spcflags &= ~SPCFLAG_TRACE;
1171: regs.spcflags |= SPCFLAG_DOTRACE;
1172: }
1173: }
1174: }
1175:
1.1.1.3 root 1176: static int do_specialties (void)
1.1 root 1177: {
1.1.1.3 root 1178: /*n_spcinsns++;*/
1179: while (regs.spcflags & SPCFLAG_BLTNASTY) {
1.1.1.4 root 1180: do_cycles (4);
1.1.1.3 root 1181: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1182: do_disk ();
1.1.1.3 root 1183: }
1184: run_compiled_code();
1185: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1186: Exception (9,last_trace_ad);
1.1.1.3 root 1187: }
1188: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.4 root 1189: do_cycles (4);
1.1.1.3 root 1190: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1191: do_disk ();
1.1.1.3 root 1192: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1193: int intr = intlev ();
1.1.1.3 root 1194: regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1195: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1196: Interrupt (intr);
1.1.1.3 root 1197: regs.stopped = 0;
1198: regs.spcflags &= ~SPCFLAG_STOP;
1.1.1.2 root 1199: }
1.1.1.3 root 1200: }
1201: }
1.1.1.4 root 1202: do_trace ();
1203:
1.1.1.3 root 1204: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1205: do_disk ();
1.1.1.3 root 1206:
1207: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1208: int intr = intlev ();
1.1.1.3 root 1209: regs.spcflags &= ~SPCFLAG_DOINT;
1210: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1211: Interrupt (intr);
1.1.1.3 root 1212: regs.stopped = 0;
1213: }
1214: }
1215: if (regs.spcflags & SPCFLAG_INT) {
1216: regs.spcflags &= ~SPCFLAG_INT;
1217: regs.spcflags |= SPCFLAG_DOINT;
1218: }
1.1.1.4 root 1219: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1220: regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1221: return 1;
1.1.1.2 root 1222: }
1.1.1.3 root 1223: return 0;
1.1.1.2 root 1224: }
1225:
1.1.1.4 root 1226: static void m68k_run_1 (void)
1.1.1.2 root 1227: {
1.1.1.3 root 1228: for (;;) {
1.1.1.4 root 1229: int cycles;
1230: uae_u32 opcode = GET_OPCODE;
1.1.1.3 root 1231: #if 0
1232: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1233: debugging = 1;
1234: return;
1235: }
1236: #endif
1.1.1.2 root 1237: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1238: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1239: #if COUNT_INSTRS == 2
1.1.1.4 root 1240: if (table68k[cft_map (opcode)].handler != -1)
1241: instrcount[table68k[cft_map (opcode)].handler]++;
1.1.1.3 root 1242: #elif COUNT_INSTRS == 1
1.1.1.2 root 1243: instrcount[opcode]++;
1244: #endif
1245: #if defined(X86_ASSEMBLY)
1.1.1.3 root 1246: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1247: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1248: : "%edx", "%ecx",
1249: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1250: #else
1.1.1.4 root 1251: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1252: #endif
1253: /*n_insns++;*/
1.1.1.4 root 1254: cycles &= cycles_mask;
1255: cycles |= cycles_val;
1256: do_cycles (cycles);
1.1.1.2 root 1257: if (regs.spcflags) {
1.1.1.4 root 1258: if (do_specialties ())
1.1 root 1259: return;
1260: }
1261: }
1262: }
1263:
1264: #ifdef X86_ASSEMBLY
1.1.1.4 root 1265: static __inline__ void m68k_run1 (void)
1.1 root 1266: {
1267: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.3 root 1268: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (m68k_run_1) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1269: }
1.1.1.2 root 1270: #else
1271: #define m68k_run1 m68k_run_1
1272: #endif
1273:
1.1.1.3 root 1274: int in_m68k_go = 0;
1.1 root 1275:
1.1.1.4 root 1276: void m68k_go (int may_quit)
1.1 root 1277: {
1.1.1.3 root 1278: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1279: write_log ("Bug! m68k_go is not reentrant.\n");
1280: abort ();
1.1.1.3 root 1281: }
1.1.1.4 root 1282:
1283: reset_frame_rate_hack ();
1284: update_68k_cycles ();
1285:
1.1.1.3 root 1286: in_m68k_go++;
1287: for (;;) {
1288: if (quit_program > 0) {
1289: if (quit_program == 1)
1.1 root 1290: break;
1.1.1.3 root 1291: quit_program = 0;
1.1.1.4 root 1292: m68k_reset ();
1293: reset_all_systems ();
1294: customreset ();
1.1 root 1295: }
1.1.1.3 root 1296: if (debugging)
1.1.1.4 root 1297: debug ();
1298: m68k_run1 ();
1.1 root 1299: }
1.1.1.3 root 1300: in_m68k_go--;
1.1 root 1301: }
1302:
1.1.1.4 root 1303: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1304: {
1.1.1.3 root 1305: uae_u32 opcode, val;
1306: struct instr *dp;
1307:
1308: opcode = get_iword_1(0);
1309: last_op_for_exception_3 = opcode;
1310: m68kpc_offset = 2;
1311:
1.1.1.4 root 1312: if (cpufunctbl[cft_map (opcode)] == op_illg_1) {
1.1.1.3 root 1313: opcode = 0x4AFC;
1314: }
1315: dp = table68k + opcode;
1316:
1317: if (dp->suse) {
1318: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1319: Exception (3, 0);
1320: return;
1321: }
1322: }
1323: if (dp->duse) {
1324: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1325: Exception (3, 0);
1326: return;
1327: }
1328: }
1329: }
1330:
1.1.1.4 root 1331: void m68k_disasm (uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1332: {
1333: uaecptr newpc = 0;
1.1.1.4 root 1334: m68kpc_offset = addr - m68k_getpc ();
1335: while (cnt-- > 0) {
1.1 root 1336: char instrname[20],*ccpt;
1337: int opwords;
1.1.1.3 root 1338: uae_u32 opcode;
1.1 root 1339: struct mnemolookup *lookup;
1340: struct instr *dp;
1.1.1.4 root 1341: printf ("%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1342: for (opwords = 0; opwords < 5; opwords++){
1.1.1.4 root 1343: printf ("%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1344: }
1.1.1.4 root 1345: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1346: m68kpc_offset += 2;
1.1.1.4 root 1347: if (cpufunctbl[cft_map (opcode)] == op_illg_1) {
1.1 root 1348: opcode = 0x4AFC;
1349: }
1350: dp = table68k + opcode;
1351: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1352: ;
1.1.1.3 root 1353:
1.1.1.4 root 1354: strcpy (instrname, lookup->name);
1355: ccpt = strstr (instrname, "cc");
1.1 root 1356: if (ccpt != 0) {
1.1.1.4 root 1357: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1358: }
1.1.1.3 root 1359: printf ("%s", instrname);
1360: switch (dp->size){
1361: case sz_byte: printf (".B "); break;
1362: case sz_word: printf (".W "); break;
1363: case sz_long: printf (".L "); break;
1364: default: printf (" "); break;
1.1 root 1365: }
1366:
1367: if (dp->suse) {
1.1.1.4 root 1368: newpc = m68k_getpc () + m68kpc_offset;
1369: newpc += ShowEA (dp->sreg, dp->smode, dp->size, 0);
1.1 root 1370: }
1371: if (dp->suse && dp->duse)
1.1.1.3 root 1372: printf (",");
1.1 root 1373: if (dp->duse) {
1.1.1.4 root 1374: newpc = m68k_getpc () + m68kpc_offset;
1375: newpc += ShowEA (dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1376: }
1377: if (ccpt != 0) {
1378: if (cctrue(dp->cc))
1.1.1.4 root 1379: printf (" == %08lx (TRUE)", newpc);
1.1.1.3 root 1380: else
1.1.1.4 root 1381: printf (" == %08lx (FALSE)", newpc);
1.1 root 1382: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.4 root 1383: printf (" == %08lx", newpc);
1.1.1.3 root 1384: printf ("\n");
1.1 root 1385: }
1.1.1.4 root 1386: if (nextpc)
1387: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1388: }
1389:
1.1.1.4 root 1390: void m68k_dumpstate (uaecptr *nextpc)
1.1 root 1391: {
1392: int i;
1.1.1.3 root 1393: for (i = 0; i < 8; i++){
1394: printf ("D%d: %08lx ", i, m68k_dreg(regs, i));
1395: if ((i & 3) == 3) printf ("\n");
1396: }
1397: for (i = 0; i < 8; i++){
1398: printf ("A%d: %08lx ", i, m68k_areg(regs, i));
1399: if ((i & 3) == 3) printf ("\n");
1.1 root 1400: }
1.1.1.2 root 1401: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1402: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1403: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.3 root 1404: printf ("USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1.1 root 1405: regs.usp,regs.isp,regs.msp,regs.vbr);
1406: printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1407: regs.t1, regs.t0, regs.s, regs.m,
1408: XFLG, NFLG, ZFLG, VFLG, CFLG, regs.intmask);
1.1.1.3 root 1409: for (i = 0; i < 8; i++){
1410: printf ("FP%d: %g ", i, regs.fp[i]);
1411: if ((i & 3) == 3) printf ("\n");
1.1 root 1412: }
1.1.1.3 root 1413: printf ("N=%d Z=%d I=%d NAN=%d\n",
1.1 root 1414: (regs.fpsr & 0x8000000) != 0,
1415: (regs.fpsr & 0x4000000) != 0,
1416: (regs.fpsr & 0x2000000) != 0,
1417: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1418: if (currprefs.cpu_compatible)
1419: printf ("prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1420:
1.1.1.4 root 1421: m68k_disasm(m68k_getpc (), nextpc, 1);
1422: if (nextpc)
1423: printf ("next PC: %08lx\n", *nextpc);
1.1 root 1424: }
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