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1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
1.1 root 16: #include "memory.h"
17: #include "custom.h"
1.1.1.2 root 18: #include "readcpu.h"
1.1 root 19: #include "newcpu.h"
20: #include "autoconf.h"
21: #include "ersatz.h"
22: #include "debug.h"
23: #include "compiler.h"
1.1.1.3 root 24: #include "gui.h"
25:
26: /* Opcode of faulting instruction */
27: uae_u16 last_op_for_exception_3;
28: /* PC at fault time */
29: uaecptr last_addr_for_exception_3;
30: /* Address that generated the exception */
31: uaecptr last_fault_for_exception_3;
1.1 root 32:
33: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
34: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
35:
36: int movem_index1[256];
37: int movem_index2[256];
38: int movem_next[256];
39:
40: int fpp_movem_index1[256];
41: int fpp_movem_index2[256];
42: int fpp_movem_next[256];
43:
44: cpuop_func *cpufunctbl[65536];
45:
1.1.1.3 root 46: #define COUNT_INSTRS 0
1.1 root 47:
48: #if COUNT_INSTRS
49: static unsigned long int instrcount[65536];
1.1.1.3 root 50: static uae_u16 opcodenums[65536];
1.1 root 51:
1.1.1.4 root 52: static int compfn (const void *el1, const void *el2)
1.1 root 53: {
1.1.1.3 root 54: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
55: }
56:
57: static char *icountfilename (void)
58: {
59: char *name = getenv ("INSNCOUNT");
60: if (name)
61: return name;
62: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 63: }
64:
1.1.1.4 root 65: void dump_counts (void)
1.1 root 66: {
1.1.1.4 root 67: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 68: unsigned long int total;
1.1 root 69: int i;
1.1.1.3 root 70:
71: write_log ("Writing instruction count file...\n");
1.1.1.4 root 72: for (i = 0; i < 65536; i++) {
1.1 root 73: opcodenums[i] = i;
1.1.1.3 root 74: total += instrcount[i];
1.1 root 75: }
1.1.1.4 root 76: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 77:
78: fprintf (f, "Total: %lu\n", total);
79: for (i=0; i < 65536; i++) {
1.1 root 80: unsigned long int cnt = instrcount[opcodenums[i]];
81: struct instr *dp;
82: struct mnemolookup *lookup;
83: if (!cnt)
84: break;
85: dp = table68k + opcodenums[i];
1.1.1.4 root 86: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
87: ;
1.1.1.3 root 88: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 89: }
1.1.1.4 root 90: fclose (f);
1.1 root 91: }
92: #else
1.1.1.4 root 93: void dump_counts (void)
1.1 root 94: {
95: }
96: #endif
97:
98: int broken_in;
99:
1.1.1.4 root 100: static __inline__ unsigned int cft_map (unsigned int f)
101: {
102: #ifndef HAVE_GET_WORD_UNSWAPPED
103: return f;
104: #else
105: return ((f >> 8) & 255) | ((f & 255) << 8);
106: #endif
107: }
108:
109: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
110:
111: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
112: {
113: op_illg (cft_map (opcode));
114: return 4;
115: }
116:
1.1.1.3 root 117: static void build_cpufunctbl (void)
118: {
119: int i;
120: unsigned long opcode;
121: struct cputbl *tbl = (currprefs.cpu_level == 3 ? op_smalltbl_0
122: : currprefs.cpu_level == 2 ? op_smalltbl_1
123: : currprefs.cpu_level == 1 ? op_smalltbl_2
124: : currprefs.cpu_compatible ? op_smalltbl_4
125: : op_smalltbl_3);
126:
1.1.1.4 root 127: write_log ("Building CPU function table (%d %d %d).\n",
128: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 129:
130: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.4 root 131: cpufunctbl[cft_map (opcode)] = op_illg_1;
1.1.1.3 root 132: for (i = 0; tbl[i].handler != NULL; i++) {
133: if (! tbl[i].specific)
1.1.1.4 root 134: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
1.1.1.3 root 135: }
136: for (opcode = 0; opcode < 65536; opcode++) {
137: cpuop_func *f;
138:
139: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
140: continue;
141:
142: if (table68k[opcode].handler != -1) {
1.1.1.4 root 143: f = cpufunctbl[cft_map (table68k[opcode].handler)];
144: if (f == op_illg_1)
1.1.1.3 root 145: abort();
1.1.1.4 root 146: cpufunctbl[cft_map (opcode)] = f;
1.1.1.3 root 147: }
148: }
149: for (i = 0; tbl[i].handler != NULL; i++) {
150: if (tbl[i].specific)
1.1.1.4 root 151: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
152: }
153: }
154:
155: unsigned long cycles_mask, cycles_val;
156:
157: static void update_68k_cycles (void)
158: {
159: cycles_mask = 0;
160: cycles_val = currprefs.m68k_speed;
161: if (currprefs.m68k_speed < 1) {
162: cycles_mask = 0xFFFFFFFF;
163: cycles_val = 0;
1.1.1.3 root 164: }
165: }
166:
167: void check_prefs_changed_cpu (void)
168: {
169: if (currprefs.cpu_level != changed_prefs.cpu_level
170: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
171: currprefs.cpu_level = changed_prefs.cpu_level;
172: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
173: build_cpufunctbl ();
174: }
1.1.1.4 root 175: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
176: currprefs.m68k_speed = changed_prefs.m68k_speed;
177: reset_frame_rate_hack ();
178: update_68k_cycles ();
179: }
1.1.1.3 root 180: }
181:
1.1 root 182: void init_m68k (void)
183: {
1.1.1.3 root 184: int i;
185:
1.1.1.4 root 186: update_68k_cycles ();
187:
1.1 root 188: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 189: int j;
1.1 root 190: for (j = 0 ; j < 8 ; j++) {
191: if (i & (1 << j)) break;
192: }
193: movem_index1[i] = j;
194: movem_index2[i] = 7-j;
195: movem_next[i] = i & (~(1 << j));
196: }
197: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 198: int j;
1.1 root 199: for (j = 7 ; j >= 0 ; j--) {
200: if (i & (1 << j)) break;
201: }
202: fpp_movem_index1[i] = j;
203: fpp_movem_index2[i] = 7-j;
204: fpp_movem_next[i] = i & (~(1 << j));
205: }
206: #if COUNT_INSTRS
207: {
1.1.1.4 root 208: FILE *f = fopen (icountfilename (), "r");
209: memset (instrcount, 0, sizeof instrcount);
1.1 root 210: if (f) {
1.1.1.3 root 211: uae_u32 opcode, count, total;
1.1 root 212: char name[20];
1.1.1.3 root 213: write_log ("Reading instruction count file...\n");
1.1.1.4 root 214: fscanf (f, "Total: %lu\n", &total);
215: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 216: instrcount[opcode] = count;
217: }
218: fclose(f);
219: }
220: }
221: #endif
1.1.1.5 root 222: write_log ("Building CPU table for configuration: 68");
223: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
224: write_log ("EC");
225: switch (currprefs.cpu_level) {
226: case 1:
227: write_log ("010");
228: break;
229: case 2:
230: write_log ("020");
231: break;
232: case 3:
233: write_log ("020/881");
234: break;
235: default:
236: write_log ("000");
237: break;
238: }
239: if (currprefs.cpu_compatible)
240: write_log (" (compatible mode)");
241: write_log ("\n");
242:
1.1 root 243: read_table68k ();
244: do_merges ();
1.1.1.2 root 245:
1.1.1.4 root 246: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 247:
1.1.1.3 root 248: build_cpufunctbl ();
249: }
1.1.1.4 root 250:
1.1 root 251: struct regstruct regs, lastint_regs;
252: static struct regstruct regs_backup[16];
253: static int backup_pointer = 0;
1.1.1.3 root 254: static long int m68kpc_offset;
1.1 root 255: int lastint_no;
256:
1.1.1.3 root 257: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
258: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
259: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
260:
1.1.1.4 root 261: uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 262: {
263: uae_u16 dp;
264: uae_s8 disp8;
265: uae_s16 disp16;
1.1 root 266: int r;
1.1.1.3 root 267: uae_u32 dispreg;
268: uaecptr addr;
269: uae_s32 offset = 0;
1.1.1.2 root 270: char buffer[80];
1.1.1.3 root 271:
272: switch (mode){
1.1 root 273: case Dreg:
1.1.1.3 root 274: sprintf (buffer,"D%d", reg);
1.1 root 275: break;
276: case Areg:
1.1.1.3 root 277: sprintf (buffer,"A%d", reg);
1.1 root 278: break;
279: case Aind:
1.1.1.3 root 280: sprintf (buffer,"(A%d)", reg);
1.1 root 281: break;
282: case Aipi:
1.1.1.3 root 283: sprintf (buffer,"(A%d)+", reg);
1.1 root 284: break;
285: case Apdi:
1.1.1.3 root 286: sprintf (buffer,"-(A%d)", reg);
1.1 root 287: break;
288: case Ad16:
1.1.1.4 root 289: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 290: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
291: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1 root 292: (long unsigned int)addr);
293: break;
294: case Ad8r:
1.1.1.4 root 295: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 296: disp8 = dp & 0xFF;
297: r = (dp & 0x7000) >> 12;
1.1.1.3 root 298: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
299: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 300: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 301:
1.1 root 302: if (dp & 0x100) {
1.1.1.3 root 303: uae_s32 outer = 0, disp = 0;
304: uae_s32 base = m68k_areg(regs,reg);
305: char name[10];
306: sprintf (name,"A%d, ",reg);
307: if (dp & 0x80) { base = 0; name[0] = 0; }
308: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 309: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
310: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 311: base += disp;
312:
1.1.1.4 root 313: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
314: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 315:
316: if (!(dp & 4)) base += dispreg;
317: if (dp & 3) base = get_long (base);
318: if (dp & 4) base += dispreg;
319:
320: addr = base + outer;
321: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
322: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
323: 1 << ((dp >> 9) & 3),
324: disp,outer,
325: (long unsigned int)addr);
326: } else {
327: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
328: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 329: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
330: 1 << ((dp >> 9) & 3), disp8,
331: (long unsigned int)addr);
332: }
333: break;
334: case PC16:
1.1.1.4 root 335: addr = m68k_getpc () + m68kpc_offset;
336: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 337: addr += (uae_s16)disp16;
338: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(long unsigned int)addr);
1.1 root 339: break;
340: case PC8r:
1.1.1.4 root 341: addr = m68k_getpc () + m68kpc_offset;
342: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 343: disp8 = dp & 0xFF;
344: r = (dp & 0x7000) >> 12;
1.1.1.2 root 345: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 346: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 347: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 348:
1.1 root 349: if (dp & 0x100) {
1.1.1.3 root 350: uae_s32 outer = 0,disp = 0;
351: uae_s32 base = addr;
352: char name[10];
353: sprintf (name,"PC, ");
354: if (dp & 0x80) { base = 0; name[0] = 0; }
355: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 356: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
357: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 358: base += disp;
359:
1.1.1.4 root 360: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
361: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 362:
363: if (!(dp & 4)) base += dispreg;
364: if (dp & 3) base = get_long (base);
365: if (dp & 4) base += dispreg;
366:
367: addr = base + outer;
368: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
369: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
370: 1 << ((dp >> 9) & 3),
371: disp,outer,
372: (long unsigned int)addr);
1.1.1.2 root 373: } else {
1.1.1.3 root 374: addr += (uae_s32)((uae_s8)disp8) + dispreg;
375: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 376: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
377: disp8, (long unsigned int)addr);
378: }
379: break;
380: case absw:
1.1.1.4 root 381: sprintf (buffer,"$%08lx", (long unsigned int)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 382: m68kpc_offset += 2;
1.1 root 383: break;
384: case absl:
1.1.1.4 root 385: sprintf (buffer,"$%08lx", (long unsigned int)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 386: m68kpc_offset += 4;
1.1 root 387: break;
388: case imm:
1.1.1.3 root 389: switch (size){
1.1 root 390: case sz_byte:
1.1.1.4 root 391: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 392: m68kpc_offset += 2;
393: break;
1.1 root 394: case sz_word:
1.1.1.4 root 395: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 396: m68kpc_offset += 2;
397: break;
1.1 root 398: case sz_long:
1.1.1.4 root 399: sprintf (buffer,"#$%08lx", (long unsigned int)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 400: m68kpc_offset += 4;
401: break;
1.1 root 402: default:
403: break;
404: }
405: break;
406: case imm0:
1.1.1.4 root 407: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 408: m68kpc_offset += 2;
409: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 410: break;
411: case imm1:
1.1.1.4 root 412: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 413: m68kpc_offset += 2;
414: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 415: break;
416: case imm2:
1.1.1.4 root 417: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 418: m68kpc_offset += 4;
419: sprintf (buffer,"#$%08lx", (long unsigned int)offset);
1.1 root 420: break;
421: case immi:
1.1.1.3 root 422: offset = (uae_s32)(uae_s8)(reg & 0xff);
423: sprintf (buffer,"#$%08lx", (long unsigned int)offset);
1.1 root 424: break;
425: default:
426: break;
427: }
1.1.1.2 root 428: if (buf == 0)
1.1.1.3 root 429: printf ("%s", buffer);
1.1.1.2 root 430: else
1.1.1.4 root 431: strcat (buf, buffer);
1.1.1.2 root 432: return offset;
1.1 root 433: }
434:
1.1.1.3 root 435: /* The plan is that this will take over the job of exception 3 handling -
436: * the CPU emulation functions will just do a longjmp to m68k_go whenever
437: * they hit an odd address. */
1.1.1.4 root 438: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 439: {
440: uae_u16 dp;
441: uae_s8 disp8;
442: uae_s16 disp16;
443: int r;
444: uae_u32 dispreg;
445: uaecptr addr;
446: uae_s32 offset = 0;
447:
448: switch (mode){
449: case Dreg:
450: *val = m68k_dreg (regs, reg);
451: return 1;
452: case Areg:
453: *val = m68k_areg (regs, reg);
454: return 1;
455:
456: case Aind:
457: case Aipi:
458: addr = m68k_areg (regs, reg);
459: break;
460: case Apdi:
461: addr = m68k_areg (regs, reg);
462: break;
463: case Ad16:
1.1.1.4 root 464: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 465: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
466: break;
467: case Ad8r:
468: addr = m68k_areg (regs, reg);
469: d8r_common:
1.1.1.4 root 470: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 471: disp8 = dp & 0xFF;
472: r = (dp & 0x7000) >> 12;
473: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
474: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
475: dispreg <<= (dp >> 9) & 3;
476:
477: if (dp & 0x100) {
478: uae_s32 outer = 0, disp = 0;
479: uae_s32 base = addr;
480: if (dp & 0x80) base = 0;
481: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 482: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
483: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 484: base += disp;
485:
1.1.1.4 root 486: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
487: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 488:
489: if (!(dp & 4)) base += dispreg;
490: if (dp & 3) base = get_long (base);
491: if (dp & 4) base += dispreg;
492:
493: addr = base + outer;
494: } else {
495: addr += (uae_s32)((uae_s8)disp8) + dispreg;
496: }
497: break;
498: case PC16:
1.1.1.4 root 499: addr = m68k_getpc () + m68kpc_offset;
500: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 501: addr += (uae_s16)disp16;
502: break;
503: case PC8r:
1.1.1.4 root 504: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 505: goto d8r_common;
506: case absw:
1.1.1.4 root 507: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 508: m68kpc_offset += 2;
509: break;
510: case absl:
1.1.1.4 root 511: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 512: m68kpc_offset += 4;
513: break;
514: case imm:
515: switch (size){
516: case sz_byte:
1.1.1.4 root 517: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 518: m68kpc_offset += 2;
519: break;
520: case sz_word:
1.1.1.4 root 521: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 522: m68kpc_offset += 2;
523: break;
524: case sz_long:
1.1.1.4 root 525: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 526: m68kpc_offset += 4;
527: break;
528: default:
529: break;
530: }
531: return 1;
532: case imm0:
533: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
534: m68kpc_offset += 2;
535: return 1;
536: case imm1:
537: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
538: m68kpc_offset += 2;
539: return 1;
540: case imm2:
541: *val = get_ilong_1 (m68kpc_offset);
542: m68kpc_offset += 4;
543: return 1;
544: case immi:
545: *val = (uae_s32)(uae_s8)(reg & 0xff);
546: return 1;
547: default:
548: addr = 0;
549: break;
550: }
551: if ((addr & 1) == 0)
552: return 1;
553:
1.1.1.4 root 554: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 555: last_fault_for_exception_3 = addr;
556: return 0;
557: }
558:
1.1.1.5 root 559: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
560: {
561: int reg = (dp >> 12) & 15;
562: uae_s32 regd = regs.regs[reg];
563: if ((dp & 0x800) == 0)
564: regd = (uae_s32)(uae_s16)regd;
565: regd <<= (dp >> 9) & 3;
566: if (dp & 0x100) {
567: uae_s32 outer = 0;
568: if (dp & 0x80) base = 0;
569: if (dp & 0x40) regd = 0;
570:
571: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
572: if ((dp & 0x30) == 0x30) base += next_ilong();
573:
574: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
575: if ((dp & 0x3) == 0x3) outer = next_ilong();
576:
577: if ((dp & 0x4) == 0) base += regd;
578: if (dp & 0x3) base = get_long (base);
579: if (dp & 0x4) base += regd;
580:
581: return base + outer;
582: } else {
583: return base + (uae_s32)((uae_s8)dp) + regd;
584: }
585: }
586:
587: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
588: {
589: int reg = (dp >> 12) & 15;
590: uae_s32 regd = regs.regs[reg];
591: #if 1
592: if ((dp & 0x800) == 0)
593: regd = (uae_s32)(uae_s16)regd;
594: return base + (uae_s8)dp + regd;
595: #else
596: /* Branch-free code... benchmark this again now that
597: * things are no longer inline. */
598: uae_s32 regd16;
599: uae_u32 mask;
600: mask = ((dp & 0x800) >> 11) - 1;
601: regd16 = (uae_s32)(uae_s16)regd;
602: regd16 &= mask;
603: mask = ~mask;
604: base += (uae_s8)dp;
605: regd &= mask;
606: regd |= regd16;
607: return base + regd;
608: #endif
609: }
610:
1.1.1.4 root 611: void MakeSR (void)
1.1 root 612: {
613: #if 0
614: assert((regs.t1 & 1) == regs.t1);
615: assert((regs.t0 & 1) == regs.t0);
616: assert((regs.s & 1) == regs.s);
617: assert((regs.m & 1) == regs.m);
618: assert((XFLG & 1) == XFLG);
619: assert((NFLG & 1) == NFLG);
620: assert((ZFLG & 1) == ZFLG);
621: assert((VFLG & 1) == VFLG);
622: assert((CFLG & 1) == CFLG);
623: #endif
624: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
625: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 ! root 626: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
! 627: | GET_CFLG);
1.1 root 628: }
629:
1.1.1.4 root 630: void MakeFromSR (void)
1.1 root 631: {
632: int oldm = regs.m;
633: int olds = regs.s;
634:
635: regs.t1 = (regs.sr >> 15) & 1;
636: regs.t0 = (regs.sr >> 14) & 1;
637: regs.s = (regs.sr >> 13) & 1;
638: regs.m = (regs.sr >> 12) & 1;
639: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 ! root 640: SET_XFLG ((regs.sr >> 4) & 1);
! 641: SET_NFLG ((regs.sr >> 3) & 1);
! 642: SET_ZFLG ((regs.sr >> 2) & 1);
! 643: SET_VFLG ((regs.sr >> 1) & 1);
! 644: SET_CFLG (regs.sr & 1);
1.1.1.3 root 645: if (currprefs.cpu_level >= 2) {
1.1 root 646: if (olds != regs.s) {
1.1.1.3 root 647: if (olds) {
648: if (oldm)
649: regs.msp = m68k_areg(regs, 7);
650: else
651: regs.isp = m68k_areg(regs, 7);
652: m68k_areg(regs, 7) = regs.usp;
653: } else {
654: regs.usp = m68k_areg(regs, 7);
655: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
656: }
1.1 root 657: } else if (olds && oldm != regs.m) {
658: if (oldm) {
1.1.1.2 root 659: regs.msp = m68k_areg(regs, 7);
660: m68k_areg(regs, 7) = regs.isp;
661: } else {
662: regs.isp = m68k_areg(regs, 7);
663: m68k_areg(regs, 7) = regs.msp;
1.1 root 664: }
665: }
666: } else {
667: if (olds != regs.s) {
1.1.1.3 root 668: if (olds) {
669: regs.isp = m68k_areg(regs, 7);
670: m68k_areg(regs, 7) = regs.usp;
671: } else {
672: regs.usp = m68k_areg(regs, 7);
673: m68k_areg(regs, 7) = regs.isp;
674: }
675: }
1.1 root 676: }
1.1.1.3 root 677:
1.1 root 678: regs.spcflags |= SPCFLAG_INT;
679: if (regs.t1 || regs.t0)
1.1.1.3 root 680: regs.spcflags |= SPCFLAG_TRACE;
1.1 root 681: else
1.1.1.3 root 682: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 683: }
684:
1.1.1.3 root 685: void Exception(int nr, uaecptr oldpc)
1.1 root 686: {
1.1.1.2 root 687: compiler_flush_jsr_stack();
1.1 root 688: MakeSR();
689: if (!regs.s) {
1.1.1.2 root 690: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 691: if (currprefs.cpu_level >= 2)
692: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
693: else
694: m68k_areg(regs, 7) = regs.isp;
1.1 root 695: regs.s = 1;
696: }
1.1.1.3 root 697: if (currprefs.cpu_level > 0) {
1.1 root 698: if (nr == 2 || nr == 3) {
699: int i;
1.1.1.3 root 700: /* @@@ this is probably wrong (?) */
1.1 root 701: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 702: m68k_areg(regs, 7) -= 2;
703: put_word (m68k_areg(regs, 7), 0);
1.1 root 704: }
1.1.1.2 root 705: m68k_areg(regs, 7) -= 2;
706: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 707: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 708: m68k_areg(regs, 7) -= 4;
709: put_long (m68k_areg(regs, 7), oldpc);
710: m68k_areg(regs, 7) -= 2;
711: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
712: } else if (regs.m && nr >= 24 && nr < 32) {
713: m68k_areg(regs, 7) -= 2;
714: put_word (m68k_areg(regs, 7), nr * 4);
715: m68k_areg(regs, 7) -= 4;
716: put_long (m68k_areg(regs, 7), m68k_getpc ());
717: m68k_areg(regs, 7) -= 2;
718: put_word (m68k_areg(regs, 7), regs.sr);
719: regs.sr |= (1 << 13);
720: regs.msp = m68k_areg(regs, 7);
721: m68k_areg(regs, 7) = regs.isp;
722: m68k_areg(regs, 7) -= 2;
723: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
724: } else {
725: m68k_areg(regs, 7) -= 2;
726: put_word (m68k_areg(regs, 7), nr * 4);
727: }
728: } else {
729: if (nr == 2 || nr == 3) {
730: m68k_areg(regs, 7) -= 12;
731: /* ??????? */
732: if (nr == 3) {
733: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
734: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
735: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
736: }
737: write_log ("Exception!\n");
738: goto kludge_me_do;
739: }
1.1 root 740: }
1.1.1.2 root 741: m68k_areg(regs, 7) -= 4;
742: put_long (m68k_areg(regs, 7), m68k_getpc ());
1.1.1.3 root 743: kludge_me_do:
1.1.1.2 root 744: m68k_areg(regs, 7) -= 2;
745: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 746: m68k_setpc (get_long (regs.vbr + 4*nr));
747: fill_prefetch_0 ();
1.1 root 748: regs.t1 = regs.t0 = regs.m = 0;
749: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
750: }
751:
752: static void Interrupt(int nr)
753: {
754: assert(nr < 8 && nr >= 0);
755: lastint_regs = regs;
756: lastint_no = nr;
757: Exception(nr+24, 0);
1.1.1.3 root 758:
1.1 root 759: regs.intmask = nr;
760: regs.spcflags |= SPCFLAG_INT;
761: }
762:
763: static int caar, cacr;
764:
1.1.1.3 root 765: void m68k_move2c (int regno, uae_u32 *regp)
1.1 root 766: {
1.1.1.3 root 767: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 768: op_illg (0x4E7B);
769: else
770: switch (regno) {
771: case 0: regs.sfc = *regp & 7; break;
772: case 1: regs.dfc = *regp & 7; break;
773: case 2: cacr = *regp & 0x3; break; /* ignore C and CE */
774: case 0x800: regs.usp = *regp; break;
775: case 0x801: regs.vbr = *regp; break;
776: case 0x802: caar = *regp &0xfc; break;
1.1.1.2 root 777: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
778: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1 root 779: default:
780: op_illg (0x4E7B);
781: break;
782: }
783: }
784:
1.1.1.3 root 785: void m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 786: {
1.1.1.3 root 787: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 788: op_illg (0x4E7A);
789: else
790: switch (regno) {
791: case 0: *regp = regs.sfc; break;
792: case 1: *regp = regs.dfc; break;
793: case 2: *regp = cacr; break;
794: case 0x800: *regp = regs.usp; break;
795: case 0x801: *regp = regs.vbr; break;
796: case 0x802: *regp = caar; break;
1.1.1.2 root 797: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
798: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
1.1 root 799: default:
800: op_illg (0x4E7A);
801: break;
802: }
803: }
804:
805: static __inline__ int
1.1.1.3 root 806: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 807: {
1.1.1.3 root 808: uae_u32 q = 0, cbit = 0;
1.1 root 809: int i;
810:
811: if (div <= src_hi) {
1.1.1.4 root 812: return 1;
1.1 root 813: }
814: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 815: cbit = src_hi & 0x80000000ul;
1.1 root 816: src_hi <<= 1;
1.1.1.2 root 817: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 818: src_lo <<= 1;
819: q = q << 1;
820: if (cbit || div <= src_hi) {
821: q |= 1;
822: src_hi -= div;
823: }
824: }
825: *quot = q;
826: *rem = src_hi;
1.1.1.4 root 827: return 0;
1.1 root 828: }
829:
1.1.1.3 root 830: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 831: {
1.1.1.3 root 832: #if defined(uae_s64)
1.1 root 833: if (src == 0) {
1.1.1.4 root 834: Exception (5, oldpc);
1.1 root 835: return;
836: }
837: if (extra & 0x800) {
838: /* signed variant */
1.1.1.3 root 839: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
840: uae_s64 quot, rem;
841:
1.1 root 842: if (extra & 0x400) {
1.1.1.3 root 843: a &= 0xffffffffu;
844: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 845: }
1.1.1.3 root 846: rem = a % (uae_s64)(uae_s32)src;
847: quot = a / (uae_s64)(uae_s32)src;
848: if ((quot & UVAL64(0xffffffff80000000)) != 0
849: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
850: {
1.1.1.6 ! root 851: SET_VFLG (1);
! 852: SET_NFLG (1);
! 853: SET_CFLG (0);
1.1.1.4 root 854: } else {
1.1.1.3 root 855: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 ! root 856: SET_VFLG (0);
! 857: SET_CFLG (0);
! 858: SET_ZFLG (((uae_s32)quot) == 0);
! 859: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 860: m68k_dreg(regs, extra & 7) = rem;
861: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 862: }
863: } else {
864: /* unsigned */
1.1.1.3 root 865: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
866: uae_u64 quot, rem;
867:
1.1 root 868: if (extra & 0x400) {
1.1.1.3 root 869: a &= 0xffffffffu;
870: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 871: }
1.1.1.3 root 872: rem = a % (uae_u64)src;
873: quot = a / (uae_u64)src;
874: if (quot > 0xffffffffu) {
1.1.1.6 ! root 875: SET_VFLG (1);
! 876: SET_NFLG (1);
! 877: SET_CFLG (0);
1.1.1.4 root 878: } else {
1.1.1.6 ! root 879: SET_VFLG (0);
! 880: SET_CFLG (0);
! 881: SET_ZFLG (((uae_s32)quot) == 0);
! 882: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 883: m68k_dreg(regs, extra & 7) = rem;
884: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 885: }
886: }
887: #else
888: if (src == 0) {
1.1.1.4 root 889: Exception (5, oldpc);
1.1 root 890: return;
891: }
892: if (extra & 0x800) {
893: /* signed variant */
1.1.1.3 root 894: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
895: uae_s32 hi = lo < 0 ? -1 : 0;
896: uae_s32 save_high;
897: uae_u32 quot, rem;
898: uae_u32 sign;
899:
1.1 root 900: if (extra & 0x400) {
1.1.1.3 root 901: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 902: }
903: save_high = hi;
904: sign = (hi ^ src);
905: if (hi < 0) {
1.1.1.4 root 906: hi = ~hi;
907: lo = -lo;
908: if (lo == 0) hi++;
1.1 root 909: }
1.1.1.3 root 910: if ((uae_s32)src < 0) src = -src;
1.1 root 911: if (div_unsigned(hi, lo, src, ", &rem) ||
912: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 ! root 913: SET_VFLG (1);
! 914: SET_NFLG (1);
! 915: SET_CFLG (0);
1.1.1.4 root 916: } else {
1.1 root 917: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 918: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 ! root 919: SET_VFLG (0);
! 920: SET_CFLG (0);
! 921: SET_ZFLG (((uae_s32)quot) == 0);
! 922: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 923: m68k_dreg(regs, extra & 7) = rem;
924: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 925: }
926: } else {
927: /* unsigned */
1.1.1.3 root 928: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
929: uae_u32 hi = 0;
930: uae_u32 quot, rem;
931:
1.1 root 932: if (extra & 0x400) {
1.1.1.3 root 933: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 934: }
935: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 ! root 936: SET_VFLG (1);
! 937: SET_NFLG (1);
! 938: SET_CFLG (0);
1.1.1.4 root 939: } else {
1.1.1.6 ! root 940: SET_VFLG (0);
! 941: SET_CFLG (0);
! 942: SET_ZFLG (((uae_s32)quot) == 0);
! 943: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 944: m68k_dreg(regs, extra & 7) = rem;
945: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 946: }
947: }
948: #endif
949: }
950:
951: static __inline__ void
1.1.1.3 root 952: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 953: {
1.1.1.3 root 954: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
955: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
956: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
957: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
958: uae_u32 lo;
959:
960: lo = r0 + ((r1 << 16) & 0xffff0000ul);
961: if (lo < r0) r3++;
962: r0 = lo;
963: lo = r0 + ((r2 << 16) & 0xffff0000ul);
964: if (lo < r0) r3++;
965: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 966: *dst_lo = lo;
967: *dst_hi = r3;
968: }
969:
1.1.1.3 root 970: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 971: {
1.1.1.3 root 972: #if defined(uae_s64)
1.1 root 973: if (extra & 0x800) {
974: /* signed variant */
1.1.1.3 root 975: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 976:
1.1.1.3 root 977: a *= (uae_s64)(uae_s32)src;
1.1.1.6 ! root 978: SET_VFLG (0);
! 979: SET_CFLG (0);
! 980: SET_ZFLG (a == 0);
! 981: SET_NFLG (a < 0);
1.1 root 982: if (extra & 0x400)
1.1.1.2 root 983: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 984: else if ((a & UVAL64(0xffffffff80000000)) != 0
985: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
986: {
1.1.1.6 ! root 987: SET_VFLG (1);
1.1 root 988: }
1.1.1.3 root 989: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 990: } else {
991: /* unsigned */
1.1.1.3 root 992: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
993:
994: a *= (uae_u64)src;
1.1.1.6 ! root 995: SET_VFLG (0);
! 996: SET_CFLG (0);
! 997: SET_ZFLG (a == 0);
! 998: SET_NFLG (((uae_s64)a) < 0);
1.1 root 999: if (extra & 0x400)
1.1.1.2 root 1000: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 1001: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 ! root 1002: SET_VFLG (1);
1.1 root 1003: }
1.1.1.3 root 1004: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 1005: }
1006: #else
1007: if (extra & 0x800) {
1008: /* signed variant */
1.1.1.3 root 1009: uae_s32 src1,src2;
1010: uae_u32 dst_lo,dst_hi;
1011: uae_u32 sign;
1.1 root 1012:
1.1.1.3 root 1013: src1 = (uae_s32)src;
1014: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1015: sign = (src1 ^ src2);
1016: if (src1 < 0) src1 = -src1;
1017: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1018: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1019: if (sign & 0x80000000) {
1020: dst_hi = ~dst_hi;
1021: dst_lo = -dst_lo;
1022: if (dst_lo == 0) dst_hi++;
1023: }
1.1.1.6 ! root 1024: SET_VFLG (0);
! 1025: SET_CFLG (0);
! 1026: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
! 1027: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1028: if (extra & 0x400)
1.1.1.2 root 1029: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1030: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1031: && ((dst_hi & 0xffffffff) != 0xffffffff
1032: || (dst_lo & 0x80000000) != 0x80000000))
1033: {
1.1.1.6 ! root 1034: SET_VFLG (1);
1.1 root 1035: }
1.1.1.2 root 1036: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1037: } else {
1038: /* unsigned */
1.1.1.3 root 1039: uae_u32 dst_lo,dst_hi;
1040:
1041: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1042:
1.1.1.6 ! root 1043: SET_VFLG (0);
! 1044: SET_CFLG (0);
! 1045: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
! 1046: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1047: if (extra & 0x400)
1.1.1.2 root 1048: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1049: else if (dst_hi != 0) {
1.1.1.6 ! root 1050: SET_VFLG (1);
1.1 root 1051: }
1.1.1.2 root 1052: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1053: }
1054: #endif
1055: }
1056: static char* ccnames[] =
1057: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1058: "VC","VS","PL","MI","GE","LT","GT","LE" };
1059:
1.1.1.4 root 1060: void m68k_reset (void)
1.1 root 1061: {
1.1.1.3 root 1062: m68k_areg (regs, 7) = get_long (0x00f80000);
1063: m68k_setpc (get_long (0x00f80004));
1064: fill_prefetch_0 ();
1.1.1.2 root 1065: regs.kick_mask = 0xF80000;
1.1 root 1066: regs.s = 1;
1067: regs.m = 0;
1068: regs.stopped = 0;
1069: regs.t1 = 0;
1070: regs.t0 = 0;
1.1.1.6 ! root 1071: SET_ZFLG (0);
! 1072: SET_XFLG (0);
! 1073: SET_CFLG (0);
! 1074: SET_VFLG (0);
! 1075: SET_NFLG (0);
1.1 root 1076: regs.spcflags = 0;
1077: regs.intmask = 7;
1078: regs.vbr = regs.sfc = regs.dfc = 0;
1079: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1080: }
1081:
1.1.1.4 root 1082: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1083: {
1.1.1.3 root 1084: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1085:
1.1.1.3 root 1086: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1087: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1088: m68k_incpc (2);
1089: fill_prefetch_0 ();
1.1.1.4 root 1090: return 4;
1.1.1.3 root 1091: }
1092:
1093: compiler_flush_jsr_stack ();
1094: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1095: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1096: broken_in = 1;
1.1 root 1097: regs.spcflags |= SPCFLAG_BRK;
1098: quit_program = 1;
1099: }
1.1.1.2 root 1100: if (opcode == 0xFF0D) {
1.1.1.3 root 1101: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1102: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1103: uae_u16 arg = get_iword (2);
1104: m68k_incpc (4);
1105: ersatz_perform (arg);
1106: fill_prefetch_0 ();
1.1.1.4 root 1107: return 4;
1.1.1.3 root 1108: } else if ((pc & 0xF80000) == 0xF00000) {
1.1.1.2 root 1109: /* User-mode STOP replacement */
1.1.1.3 root 1110: m68k_setstopped (1);
1.1.1.4 root 1111: return 4;
1.1.1.2 root 1112: }
1.1 root 1113: }
1.1.1.3 root 1114:
1115: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1116: /* Calltrap. */
1117: m68k_incpc(2);
1118: call_calltrap (opcode & 0xFFF);
1119: fill_prefetch_0 ();
1.1.1.4 root 1120: return 4;
1.1.1.3 root 1121: }
1122:
1.1 root 1123: if ((opcode & 0xF000) == 0xF000) {
1124: Exception(0xB,0);
1.1.1.4 root 1125: return 4;
1.1 root 1126: }
1127: if ((opcode & 0xF000) == 0xA000) {
1.1.1.3 root 1128: if ((pc & 0xF80000) == 0xF00000) {
1129: /* Calltrap. */
1130: call_calltrap (opcode & 0xFFF);
1131: }
1132: Exception(0xA,0);
1.1.1.4 root 1133: return 4;
1.1 root 1134: }
1.1.1.4 root 1135: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.3 root 1136: Exception (4,0);
1.1.1.4 root 1137: return 4;
1.1 root 1138: }
1139:
1.1.1.3 root 1140: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1141: {
1142: if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1143:
1144: } else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1145: } else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1146: } else
1.1.1.3 root 1147: op_illg (opcode);
1.1 root 1148: }
1149:
1.1.1.4 root 1150: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1151:
1.1.1.3 root 1152: static uaecptr last_trace_ad = 0;
1.1 root 1153:
1.1.1.4 root 1154: static __inline__ void do_trace (void)
1.1 root 1155: {
1156: if (regs.spcflags & SPCFLAG_TRACE) { /* 6 */
1157: if (regs.t0) {
1.1.1.3 root 1158: uae_u16 opcode;
1.1 root 1159: /* should also include TRAP, CHK, SR modification FPcc */
1160: /* probably never used so why bother */
1161: /* We can afford this to be inefficient... */
1.1.1.3 root 1162: m68k_setpc (m68k_getpc ());
1163: fill_prefetch_0 ();
1164: opcode = get_word (regs.pc);
1.1 root 1165: if (opcode == 0x4e72 /* RTE */
1166: || opcode == 0x4e74 /* RTD */
1167: || opcode == 0x4e75 /* RTS */
1168: || opcode == 0x4e77 /* RTR */
1169: || opcode == 0x4e76 /* TRAPV */
1170: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1171: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1172: || (opcode & 0xff00) == 0x6100 /* BSR */
1173: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1.1.1.3 root 1174: && cctrue((opcode >> 8) & 0xf))
1.1 root 1175: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1.1.1.3 root 1176: && !cctrue((opcode >> 8) & 0xf)
1177: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1.1 root 1178: {
1.1.1.4 root 1179: last_trace_ad = m68k_getpc ();
1.1 root 1180: regs.spcflags &= ~SPCFLAG_TRACE;
1181: regs.spcflags |= SPCFLAG_DOTRACE;
1182: }
1183: } else if (regs.t1) {
1.1.1.4 root 1184: last_trace_ad = m68k_getpc ();
1.1 root 1185: regs.spcflags &= ~SPCFLAG_TRACE;
1186: regs.spcflags |= SPCFLAG_DOTRACE;
1187: }
1188: }
1189: }
1190:
1.1.1.3 root 1191: static int do_specialties (void)
1.1 root 1192: {
1.1.1.3 root 1193: /*n_spcinsns++;*/
1194: while (regs.spcflags & SPCFLAG_BLTNASTY) {
1.1.1.4 root 1195: do_cycles (4);
1.1.1.3 root 1196: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1197: do_disk ();
1.1.1.3 root 1198: }
1199: run_compiled_code();
1200: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1201: Exception (9,last_trace_ad);
1.1.1.3 root 1202: }
1203: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.4 root 1204: do_cycles (4);
1.1.1.3 root 1205: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1206: do_disk ();
1.1.1.3 root 1207: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1208: int intr = intlev ();
1.1.1.3 root 1209: regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1210: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1211: Interrupt (intr);
1.1.1.3 root 1212: regs.stopped = 0;
1213: regs.spcflags &= ~SPCFLAG_STOP;
1.1.1.2 root 1214: }
1.1.1.3 root 1215: }
1216: }
1.1.1.4 root 1217: do_trace ();
1218:
1.1.1.3 root 1219: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1220: do_disk ();
1.1.1.3 root 1221:
1222: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1223: int intr = intlev ();
1.1.1.3 root 1224: regs.spcflags &= ~SPCFLAG_DOINT;
1225: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1226: Interrupt (intr);
1.1.1.3 root 1227: regs.stopped = 0;
1228: }
1229: }
1230: if (regs.spcflags & SPCFLAG_INT) {
1231: regs.spcflags &= ~SPCFLAG_INT;
1232: regs.spcflags |= SPCFLAG_DOINT;
1233: }
1.1.1.4 root 1234: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1235: regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1236: return 1;
1.1.1.2 root 1237: }
1.1.1.3 root 1238: return 0;
1.1.1.2 root 1239: }
1240:
1.1.1.4 root 1241: static void m68k_run_1 (void)
1.1.1.2 root 1242: {
1.1.1.3 root 1243: for (;;) {
1.1.1.4 root 1244: int cycles;
1245: uae_u32 opcode = GET_OPCODE;
1.1.1.3 root 1246: #if 0
1247: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1248: debugging = 1;
1249: return;
1250: }
1251: #endif
1.1.1.2 root 1252: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1253: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1254: #if COUNT_INSTRS == 2
1.1.1.4 root 1255: if (table68k[cft_map (opcode)].handler != -1)
1256: instrcount[table68k[cft_map (opcode)].handler]++;
1.1.1.3 root 1257: #elif COUNT_INSTRS == 1
1.1.1.2 root 1258: instrcount[opcode]++;
1259: #endif
1260: #if defined(X86_ASSEMBLY)
1.1.1.3 root 1261: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1262: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1263: : "%edx", "%ecx",
1264: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1265: #else
1.1.1.4 root 1266: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1267: #endif
1268: /*n_insns++;*/
1.1.1.4 root 1269: cycles &= cycles_mask;
1270: cycles |= cycles_val;
1271: do_cycles (cycles);
1.1.1.2 root 1272: if (regs.spcflags) {
1.1.1.4 root 1273: if (do_specialties ())
1.1 root 1274: return;
1275: }
1276: }
1277: }
1278:
1279: #ifdef X86_ASSEMBLY
1.1.1.4 root 1280: static __inline__ void m68k_run1 (void)
1.1 root 1281: {
1282: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.3 root 1283: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp" : : "r" (m68k_run_1) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1284: }
1.1.1.2 root 1285: #else
1286: #define m68k_run1 m68k_run_1
1287: #endif
1288:
1.1.1.3 root 1289: int in_m68k_go = 0;
1.1 root 1290:
1.1.1.4 root 1291: void m68k_go (int may_quit)
1.1 root 1292: {
1.1.1.3 root 1293: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1294: write_log ("Bug! m68k_go is not reentrant.\n");
1295: abort ();
1.1.1.3 root 1296: }
1.1.1.4 root 1297:
1298: reset_frame_rate_hack ();
1299: update_68k_cycles ();
1300:
1.1.1.3 root 1301: in_m68k_go++;
1302: for (;;) {
1303: if (quit_program > 0) {
1304: if (quit_program == 1)
1.1 root 1305: break;
1.1.1.3 root 1306: quit_program = 0;
1.1.1.4 root 1307: m68k_reset ();
1308: reset_all_systems ();
1309: customreset ();
1.1 root 1310: }
1.1.1.3 root 1311: if (debugging)
1.1.1.4 root 1312: debug ();
1313: m68k_run1 ();
1.1 root 1314: }
1.1.1.3 root 1315: in_m68k_go--;
1.1 root 1316: }
1317:
1.1.1.4 root 1318: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1319: {
1.1.1.3 root 1320: uae_u32 opcode, val;
1321: struct instr *dp;
1322:
1323: opcode = get_iword_1(0);
1324: last_op_for_exception_3 = opcode;
1325: m68kpc_offset = 2;
1326:
1.1.1.4 root 1327: if (cpufunctbl[cft_map (opcode)] == op_illg_1) {
1.1.1.3 root 1328: opcode = 0x4AFC;
1329: }
1330: dp = table68k + opcode;
1331:
1332: if (dp->suse) {
1333: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1334: Exception (3, 0);
1335: return;
1336: }
1337: }
1338: if (dp->duse) {
1339: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1340: Exception (3, 0);
1341: return;
1342: }
1343: }
1344: }
1345:
1.1.1.4 root 1346: void m68k_disasm (uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1347: {
1348: uaecptr newpc = 0;
1.1.1.4 root 1349: m68kpc_offset = addr - m68k_getpc ();
1350: while (cnt-- > 0) {
1.1 root 1351: char instrname[20],*ccpt;
1352: int opwords;
1.1.1.3 root 1353: uae_u32 opcode;
1.1 root 1354: struct mnemolookup *lookup;
1355: struct instr *dp;
1.1.1.4 root 1356: printf ("%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1357: for (opwords = 0; opwords < 5; opwords++){
1.1.1.4 root 1358: printf ("%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1359: }
1.1.1.4 root 1360: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1361: m68kpc_offset += 2;
1.1.1.4 root 1362: if (cpufunctbl[cft_map (opcode)] == op_illg_1) {
1.1 root 1363: opcode = 0x4AFC;
1364: }
1365: dp = table68k + opcode;
1366: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1367: ;
1.1.1.3 root 1368:
1.1.1.4 root 1369: strcpy (instrname, lookup->name);
1370: ccpt = strstr (instrname, "cc");
1.1 root 1371: if (ccpt != 0) {
1.1.1.4 root 1372: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1373: }
1.1.1.3 root 1374: printf ("%s", instrname);
1375: switch (dp->size){
1376: case sz_byte: printf (".B "); break;
1377: case sz_word: printf (".W "); break;
1378: case sz_long: printf (".L "); break;
1379: default: printf (" "); break;
1.1 root 1380: }
1381:
1382: if (dp->suse) {
1.1.1.4 root 1383: newpc = m68k_getpc () + m68kpc_offset;
1384: newpc += ShowEA (dp->sreg, dp->smode, dp->size, 0);
1.1 root 1385: }
1386: if (dp->suse && dp->duse)
1.1.1.3 root 1387: printf (",");
1.1 root 1388: if (dp->duse) {
1.1.1.4 root 1389: newpc = m68k_getpc () + m68kpc_offset;
1390: newpc += ShowEA (dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1391: }
1392: if (ccpt != 0) {
1393: if (cctrue(dp->cc))
1.1.1.4 root 1394: printf (" == %08lx (TRUE)", newpc);
1.1.1.3 root 1395: else
1.1.1.4 root 1396: printf (" == %08lx (FALSE)", newpc);
1.1 root 1397: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.4 root 1398: printf (" == %08lx", newpc);
1.1.1.3 root 1399: printf ("\n");
1.1 root 1400: }
1.1.1.4 root 1401: if (nextpc)
1402: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1403: }
1404:
1.1.1.4 root 1405: void m68k_dumpstate (uaecptr *nextpc)
1.1 root 1406: {
1407: int i;
1.1.1.3 root 1408: for (i = 0; i < 8; i++){
1409: printf ("D%d: %08lx ", i, m68k_dreg(regs, i));
1410: if ((i & 3) == 3) printf ("\n");
1411: }
1412: for (i = 0; i < 8; i++){
1413: printf ("A%d: %08lx ", i, m68k_areg(regs, i));
1414: if ((i & 3) == 3) printf ("\n");
1.1 root 1415: }
1.1.1.2 root 1416: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1417: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1418: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.3 root 1419: printf ("USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1.1 root 1420: regs.usp,regs.isp,regs.msp,regs.vbr);
1421: printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1422: regs.t1, regs.t0, regs.s, regs.m,
1.1.1.6 ! root 1423: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1424: for (i = 0; i < 8; i++){
1425: printf ("FP%d: %g ", i, regs.fp[i]);
1426: if ((i & 3) == 3) printf ("\n");
1.1 root 1427: }
1.1.1.3 root 1428: printf ("N=%d Z=%d I=%d NAN=%d\n",
1.1 root 1429: (regs.fpsr & 0x8000000) != 0,
1430: (regs.fpsr & 0x4000000) != 0,
1431: (regs.fpsr & 0x2000000) != 0,
1432: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1433: if (currprefs.cpu_compatible)
1434: printf ("prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1435:
1.1.1.4 root 1436: m68k_disasm(m68k_getpc (), nextpc, 1);
1437: if (nextpc)
1438: printf ("next PC: %08lx\n", *nextpc);
1.1 root 1439: }
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