![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to newcpu.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [UNIX Amiga Emulator] / uae / src|
Return to newcpu.c CVS log | Up to [UNIX Amiga Emulator] / uae / src |
1.1.1.3 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
1.1.1.3 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11:
12: #include "config.h"
13: #include "options.h"
14: #include "events.h"
1.1.1.3 root 15: #include "uae.h"
1.1 root 16: #include "memory.h"
17: #include "custom.h"
1.1.1.2 root 18: #include "readcpu.h"
1.1 root 19: #include "newcpu.h"
20: #include "autoconf.h"
21: #include "ersatz.h"
22: #include "debug.h"
23: #include "compiler.h"
1.1.1.3 root 24: #include "gui.h"
25:
26: /* Opcode of faulting instruction */
27: uae_u16 last_op_for_exception_3;
28: /* PC at fault time */
29: uaecptr last_addr_for_exception_3;
30: /* Address that generated the exception */
31: uaecptr last_fault_for_exception_3;
1.1 root 32:
33: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
34: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
35:
36: int movem_index1[256];
37: int movem_index2[256];
38: int movem_next[256];
39:
40: int fpp_movem_index1[256];
41: int fpp_movem_index2[256];
42: int fpp_movem_next[256];
43:
44: cpuop_func *cpufunctbl[65536];
45:
1.1.1.3 root 46: #define COUNT_INSTRS 0
1.1 root 47:
48: #if COUNT_INSTRS
49: static unsigned long int instrcount[65536];
1.1.1.3 root 50: static uae_u16 opcodenums[65536];
1.1 root 51:
1.1.1.4 root 52: static int compfn (const void *el1, const void *el2)
1.1 root 53: {
1.1.1.3 root 54: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
55: }
56:
57: static char *icountfilename (void)
58: {
59: char *name = getenv ("INSNCOUNT");
60: if (name)
61: return name;
62: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
1.1 root 63: }
64:
1.1.1.4 root 65: void dump_counts (void)
1.1 root 66: {
1.1.1.4 root 67: FILE *f = fopen (icountfilename (), "w");
1.1.1.3 root 68: unsigned long int total;
1.1 root 69: int i;
1.1.1.3 root 70:
71: write_log ("Writing instruction count file...\n");
1.1.1.4 root 72: for (i = 0; i < 65536; i++) {
1.1 root 73: opcodenums[i] = i;
1.1.1.3 root 74: total += instrcount[i];
1.1 root 75: }
1.1.1.4 root 76: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
1.1.1.3 root 77:
78: fprintf (f, "Total: %lu\n", total);
79: for (i=0; i < 65536; i++) {
1.1 root 80: unsigned long int cnt = instrcount[opcodenums[i]];
81: struct instr *dp;
82: struct mnemolookup *lookup;
83: if (!cnt)
84: break;
85: dp = table68k + opcodenums[i];
1.1.1.4 root 86: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
87: ;
1.1.1.3 root 88: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
1.1 root 89: }
1.1.1.4 root 90: fclose (f);
1.1 root 91: }
92: #else
1.1.1.4 root 93: void dump_counts (void)
1.1 root 94: {
95: }
96: #endif
97:
98: int broken_in;
99:
1.1.1.4 root 100: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
101:
102: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
103: {
1.1.1.8 ! root 104: op_illg (opcode);
1.1.1.4 root 105: return 4;
106: }
107:
1.1.1.3 root 108: static void build_cpufunctbl (void)
109: {
110: int i;
111: unsigned long opcode;
112: struct cputbl *tbl = (currprefs.cpu_level == 3 ? op_smalltbl_0
113: : currprefs.cpu_level == 2 ? op_smalltbl_1
114: : currprefs.cpu_level == 1 ? op_smalltbl_2
115: : currprefs.cpu_compatible ? op_smalltbl_4
116: : op_smalltbl_3);
117:
1.1.1.4 root 118: write_log ("Building CPU function table (%d %d %d).\n",
119: currprefs.cpu_level, currprefs.cpu_compatible, currprefs.address_space_24);
1.1.1.3 root 120:
121: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.8 ! root 122: cpufunctbl[opcode] = op_illg_1;
1.1.1.3 root 123: for (i = 0; tbl[i].handler != NULL; i++) {
124: if (! tbl[i].specific)
1.1.1.8 ! root 125: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.3 root 126: }
127: for (opcode = 0; opcode < 65536; opcode++) {
128: cpuop_func *f;
129:
130: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level)
131: continue;
132:
133: if (table68k[opcode].handler != -1) {
1.1.1.8 ! root 134: f = cpufunctbl[table68k[opcode].handler];
1.1.1.4 root 135: if (f == op_illg_1)
1.1.1.3 root 136: abort();
1.1.1.8 ! root 137: cpufunctbl[opcode] = f;
1.1.1.3 root 138: }
139: }
140: for (i = 0; tbl[i].handler != NULL; i++) {
141: if (tbl[i].specific)
1.1.1.8 ! root 142: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1.1.4 root 143: }
144: }
145:
146: unsigned long cycles_mask, cycles_val;
147:
148: static void update_68k_cycles (void)
149: {
150: cycles_mask = 0;
151: cycles_val = currprefs.m68k_speed;
152: if (currprefs.m68k_speed < 1) {
153: cycles_mask = 0xFFFFFFFF;
154: cycles_val = 0;
1.1.1.3 root 155: }
156: }
157:
158: void check_prefs_changed_cpu (void)
159: {
160: if (currprefs.cpu_level != changed_prefs.cpu_level
161: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
162: currprefs.cpu_level = changed_prefs.cpu_level;
163: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
164: build_cpufunctbl ();
165: }
1.1.1.4 root 166: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
167: currprefs.m68k_speed = changed_prefs.m68k_speed;
168: reset_frame_rate_hack ();
169: update_68k_cycles ();
170: }
1.1.1.3 root 171: }
172:
1.1 root 173: void init_m68k (void)
174: {
1.1.1.3 root 175: int i;
176:
1.1.1.4 root 177: update_68k_cycles ();
178:
1.1 root 179: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 180: int j;
1.1 root 181: for (j = 0 ; j < 8 ; j++) {
182: if (i & (1 << j)) break;
183: }
184: movem_index1[i] = j;
185: movem_index2[i] = 7-j;
186: movem_next[i] = i & (~(1 << j));
187: }
188: for (i = 0 ; i < 256 ; i++) {
1.1.1.3 root 189: int j;
1.1 root 190: for (j = 7 ; j >= 0 ; j--) {
191: if (i & (1 << j)) break;
192: }
1.1.1.8 ! root 193: fpp_movem_index1[i] = 7-j;
! 194: fpp_movem_index2[i] = j;
1.1 root 195: fpp_movem_next[i] = i & (~(1 << j));
196: }
197: #if COUNT_INSTRS
198: {
1.1.1.4 root 199: FILE *f = fopen (icountfilename (), "r");
200: memset (instrcount, 0, sizeof instrcount);
1.1 root 201: if (f) {
1.1.1.3 root 202: uae_u32 opcode, count, total;
1.1 root 203: char name[20];
1.1.1.3 root 204: write_log ("Reading instruction count file...\n");
1.1.1.4 root 205: fscanf (f, "Total: %lu\n", &total);
206: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
1.1 root 207: instrcount[opcode] = count;
208: }
209: fclose(f);
210: }
211: }
212: #endif
1.1.1.5 root 213: write_log ("Building CPU table for configuration: 68");
214: if (currprefs.address_space_24 && currprefs.cpu_level > 1)
215: write_log ("EC");
216: switch (currprefs.cpu_level) {
217: case 1:
218: write_log ("010");
219: break;
220: case 2:
221: write_log ("020");
222: break;
223: case 3:
224: write_log ("020/881");
225: break;
226: default:
227: write_log ("000");
228: break;
229: }
230: if (currprefs.cpu_compatible)
231: write_log (" (compatible mode)");
232: write_log ("\n");
233:
1.1 root 234: read_table68k ();
235: do_merges ();
1.1.1.2 root 236:
1.1.1.4 root 237: write_log ("%d CPU functions\n", nr_cpuop_funcs);
1.1 root 238:
1.1.1.3 root 239: build_cpufunctbl ();
240: }
1.1.1.4 root 241:
1.1 root 242: struct regstruct regs, lastint_regs;
243: static struct regstruct regs_backup[16];
244: static int backup_pointer = 0;
1.1.1.3 root 245: static long int m68kpc_offset;
1.1 root 246: int lastint_no;
247:
1.1.1.3 root 248: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
249: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
250: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
251:
1.1.1.4 root 252: uae_s32 ShowEA (int reg, amodes mode, wordsizes size, char *buf)
1.1.1.3 root 253: {
254: uae_u16 dp;
255: uae_s8 disp8;
256: uae_s16 disp16;
1.1 root 257: int r;
1.1.1.3 root 258: uae_u32 dispreg;
259: uaecptr addr;
260: uae_s32 offset = 0;
1.1.1.2 root 261: char buffer[80];
1.1.1.3 root 262:
263: switch (mode){
1.1 root 264: case Dreg:
1.1.1.3 root 265: sprintf (buffer,"D%d", reg);
1.1 root 266: break;
267: case Areg:
1.1.1.3 root 268: sprintf (buffer,"A%d", reg);
1.1 root 269: break;
270: case Aind:
1.1.1.3 root 271: sprintf (buffer,"(A%d)", reg);
1.1 root 272: break;
273: case Aipi:
1.1.1.3 root 274: sprintf (buffer,"(A%d)+", reg);
1.1 root 275: break;
276: case Apdi:
1.1.1.3 root 277: sprintf (buffer,"-(A%d)", reg);
1.1 root 278: break;
279: case Ad16:
1.1.1.4 root 280: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 281: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
282: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
1.1.1.8 ! root 283: (unsigned long)addr);
1.1 root 284: break;
285: case Ad8r:
1.1.1.4 root 286: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 287: disp8 = dp & 0xFF;
288: r = (dp & 0x7000) >> 12;
1.1.1.3 root 289: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
290: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 291: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 292:
1.1 root 293: if (dp & 0x100) {
1.1.1.3 root 294: uae_s32 outer = 0, disp = 0;
295: uae_s32 base = m68k_areg(regs,reg);
296: char name[10];
297: sprintf (name,"A%d, ",reg);
298: if (dp & 0x80) { base = 0; name[0] = 0; }
299: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 300: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
301: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 302: base += disp;
303:
1.1.1.4 root 304: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
305: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 306:
307: if (!(dp & 4)) base += dispreg;
308: if (dp & 3) base = get_long (base);
309: if (dp & 4) base += dispreg;
310:
311: addr = base + outer;
312: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
313: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
314: 1 << ((dp >> 9) & 3),
315: disp,outer,
1.1.1.8 ! root 316: (unsigned long)addr);
1.1.1.3 root 317: } else {
318: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
319: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
1.1 root 320: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
321: 1 << ((dp >> 9) & 3), disp8,
1.1.1.8 ! root 322: (unsigned long)addr);
1.1 root 323: }
324: break;
325: case PC16:
1.1.1.4 root 326: addr = m68k_getpc () + m68kpc_offset;
327: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 328: addr += (uae_s16)disp16;
1.1.1.8 ! root 329: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
1.1 root 330: break;
331: case PC8r:
1.1.1.4 root 332: addr = m68k_getpc () + m68kpc_offset;
333: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1 root 334: disp8 = dp & 0xFF;
335: r = (dp & 0x7000) >> 12;
1.1.1.2 root 336: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
1.1.1.3 root 337: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
1.1 root 338: dispreg <<= (dp >> 9) & 3;
1.1.1.3 root 339:
1.1 root 340: if (dp & 0x100) {
1.1.1.3 root 341: uae_s32 outer = 0,disp = 0;
342: uae_s32 base = addr;
343: char name[10];
344: sprintf (name,"PC, ");
345: if (dp & 0x80) { base = 0; name[0] = 0; }
346: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 347: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
348: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 349: base += disp;
350:
1.1.1.4 root 351: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
352: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 353:
354: if (!(dp & 4)) base += dispreg;
355: if (dp & 3) base = get_long (base);
356: if (dp & 4) base += dispreg;
357:
358: addr = base + outer;
359: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
360: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
361: 1 << ((dp >> 9) & 3),
362: disp,outer,
1.1.1.8 ! root 363: (unsigned long)addr);
1.1.1.2 root 364: } else {
1.1.1.3 root 365: addr += (uae_s32)((uae_s8)disp8) + dispreg;
366: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
1.1 root 367: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
1.1.1.8 ! root 368: disp8, (unsigned long)addr);
1.1 root 369: }
370: break;
371: case absw:
1.1.1.8 ! root 372: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
1.1.1.3 root 373: m68kpc_offset += 2;
1.1 root 374: break;
375: case absl:
1.1.1.8 ! root 376: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
1.1.1.3 root 377: m68kpc_offset += 4;
1.1 root 378: break;
379: case imm:
1.1.1.3 root 380: switch (size){
1.1 root 381: case sz_byte:
1.1.1.4 root 382: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
1.1.1.3 root 383: m68kpc_offset += 2;
384: break;
1.1 root 385: case sz_word:
1.1.1.4 root 386: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
1.1.1.3 root 387: m68kpc_offset += 2;
388: break;
1.1 root 389: case sz_long:
1.1.1.8 ! root 390: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
1.1.1.3 root 391: m68kpc_offset += 4;
392: break;
1.1 root 393: default:
394: break;
395: }
396: break;
397: case imm0:
1.1.1.4 root 398: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
1.1.1.3 root 399: m68kpc_offset += 2;
400: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
1.1 root 401: break;
402: case imm1:
1.1.1.4 root 403: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 404: m68kpc_offset += 2;
405: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
1.1 root 406: break;
407: case imm2:
1.1.1.4 root 408: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
1.1.1.3 root 409: m68kpc_offset += 4;
1.1.1.8 ! root 410: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 411: break;
412: case immi:
1.1.1.3 root 413: offset = (uae_s32)(uae_s8)(reg & 0xff);
1.1.1.8 ! root 414: sprintf (buffer,"#$%08lx", (unsigned long)offset);
1.1 root 415: break;
416: default:
417: break;
418: }
1.1.1.2 root 419: if (buf == 0)
1.1.1.3 root 420: printf ("%s", buffer);
1.1.1.2 root 421: else
1.1.1.4 root 422: strcat (buf, buffer);
1.1.1.2 root 423: return offset;
1.1 root 424: }
425:
1.1.1.3 root 426: /* The plan is that this will take over the job of exception 3 handling -
427: * the CPU emulation functions will just do a longjmp to m68k_go whenever
428: * they hit an odd address. */
1.1.1.4 root 429: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
1.1.1.3 root 430: {
431: uae_u16 dp;
432: uae_s8 disp8;
433: uae_s16 disp16;
434: int r;
435: uae_u32 dispreg;
436: uaecptr addr;
437: uae_s32 offset = 0;
438:
439: switch (mode){
440: case Dreg:
441: *val = m68k_dreg (regs, reg);
442: return 1;
443: case Areg:
444: *val = m68k_areg (regs, reg);
445: return 1;
446:
447: case Aind:
448: case Aipi:
449: addr = m68k_areg (regs, reg);
450: break;
451: case Apdi:
452: addr = m68k_areg (regs, reg);
453: break;
454: case Ad16:
1.1.1.4 root 455: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 456: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
457: break;
458: case Ad8r:
459: addr = m68k_areg (regs, reg);
460: d8r_common:
1.1.1.4 root 461: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 462: disp8 = dp & 0xFF;
463: r = (dp & 0x7000) >> 12;
464: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
465: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
466: dispreg <<= (dp >> 9) & 3;
467:
468: if (dp & 0x100) {
469: uae_s32 outer = 0, disp = 0;
470: uae_s32 base = addr;
471: if (dp & 0x80) base = 0;
472: if (dp & 0x40) dispreg = 0;
1.1.1.4 root 473: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
474: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 475: base += disp;
476:
1.1.1.4 root 477: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
478: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
1.1.1.3 root 479:
480: if (!(dp & 4)) base += dispreg;
481: if (dp & 3) base = get_long (base);
482: if (dp & 4) base += dispreg;
483:
484: addr = base + outer;
485: } else {
486: addr += (uae_s32)((uae_s8)disp8) + dispreg;
487: }
488: break;
489: case PC16:
1.1.1.4 root 490: addr = m68k_getpc () + m68kpc_offset;
491: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
1.1.1.3 root 492: addr += (uae_s16)disp16;
493: break;
494: case PC8r:
1.1.1.4 root 495: addr = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 496: goto d8r_common;
497: case absw:
1.1.1.4 root 498: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
1.1.1.3 root 499: m68kpc_offset += 2;
500: break;
501: case absl:
1.1.1.4 root 502: addr = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 503: m68kpc_offset += 4;
504: break;
505: case imm:
506: switch (size){
507: case sz_byte:
1.1.1.4 root 508: *val = get_iword_1 (m68kpc_offset) & 0xff;
1.1.1.3 root 509: m68kpc_offset += 2;
510: break;
511: case sz_word:
1.1.1.4 root 512: *val = get_iword_1 (m68kpc_offset) & 0xffff;
1.1.1.3 root 513: m68kpc_offset += 2;
514: break;
515: case sz_long:
1.1.1.4 root 516: *val = get_ilong_1 (m68kpc_offset);
1.1.1.3 root 517: m68kpc_offset += 4;
518: break;
519: default:
520: break;
521: }
522: return 1;
523: case imm0:
524: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
525: m68kpc_offset += 2;
526: return 1;
527: case imm1:
528: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
529: m68kpc_offset += 2;
530: return 1;
531: case imm2:
532: *val = get_ilong_1 (m68kpc_offset);
533: m68kpc_offset += 4;
534: return 1;
535: case immi:
536: *val = (uae_s32)(uae_s8)(reg & 0xff);
537: return 1;
538: default:
539: addr = 0;
540: break;
541: }
542: if ((addr & 1) == 0)
543: return 1;
544:
1.1.1.4 root 545: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
1.1.1.3 root 546: last_fault_for_exception_3 = addr;
547: return 0;
548: }
549:
1.1.1.5 root 550: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
551: {
552: int reg = (dp >> 12) & 15;
553: uae_s32 regd = regs.regs[reg];
554: if ((dp & 0x800) == 0)
555: regd = (uae_s32)(uae_s16)regd;
556: regd <<= (dp >> 9) & 3;
557: if (dp & 0x100) {
558: uae_s32 outer = 0;
559: if (dp & 0x80) base = 0;
560: if (dp & 0x40) regd = 0;
561:
562: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
563: if ((dp & 0x30) == 0x30) base += next_ilong();
564:
565: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
566: if ((dp & 0x3) == 0x3) outer = next_ilong();
567:
568: if ((dp & 0x4) == 0) base += regd;
569: if (dp & 0x3) base = get_long (base);
570: if (dp & 0x4) base += regd;
571:
572: return base + outer;
573: } else {
574: return base + (uae_s32)((uae_s8)dp) + regd;
575: }
576: }
577:
578: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
579: {
580: int reg = (dp >> 12) & 15;
581: uae_s32 regd = regs.regs[reg];
582: #if 1
583: if ((dp & 0x800) == 0)
584: regd = (uae_s32)(uae_s16)regd;
585: return base + (uae_s8)dp + regd;
586: #else
587: /* Branch-free code... benchmark this again now that
588: * things are no longer inline. */
589: uae_s32 regd16;
590: uae_u32 mask;
591: mask = ((dp & 0x800) >> 11) - 1;
592: regd16 = (uae_s32)(uae_s16)regd;
593: regd16 &= mask;
594: mask = ~mask;
595: base += (uae_s8)dp;
596: regd &= mask;
597: regd |= regd16;
598: return base + regd;
599: #endif
600: }
601:
1.1.1.4 root 602: void MakeSR (void)
1.1 root 603: {
604: #if 0
605: assert((regs.t1 & 1) == regs.t1);
606: assert((regs.t0 & 1) == regs.t0);
607: assert((regs.s & 1) == regs.s);
608: assert((regs.m & 1) == regs.m);
609: assert((XFLG & 1) == XFLG);
610: assert((NFLG & 1) == NFLG);
611: assert((ZFLG & 1) == ZFLG);
612: assert((VFLG & 1) == VFLG);
613: assert((CFLG & 1) == CFLG);
614: #endif
615: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
616: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
1.1.1.6 root 617: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
618: | GET_CFLG);
1.1 root 619: }
620:
1.1.1.4 root 621: void MakeFromSR (void)
1.1 root 622: {
623: int oldm = regs.m;
624: int olds = regs.s;
625:
626: regs.t1 = (regs.sr >> 15) & 1;
627: regs.t0 = (regs.sr >> 14) & 1;
628: regs.s = (regs.sr >> 13) & 1;
629: regs.m = (regs.sr >> 12) & 1;
630: regs.intmask = (regs.sr >> 8) & 7;
1.1.1.6 root 631: SET_XFLG ((regs.sr >> 4) & 1);
632: SET_NFLG ((regs.sr >> 3) & 1);
633: SET_ZFLG ((regs.sr >> 2) & 1);
634: SET_VFLG ((regs.sr >> 1) & 1);
635: SET_CFLG (regs.sr & 1);
1.1.1.3 root 636: if (currprefs.cpu_level >= 2) {
1.1 root 637: if (olds != regs.s) {
1.1.1.3 root 638: if (olds) {
639: if (oldm)
640: regs.msp = m68k_areg(regs, 7);
641: else
642: regs.isp = m68k_areg(regs, 7);
643: m68k_areg(regs, 7) = regs.usp;
644: } else {
645: regs.usp = m68k_areg(regs, 7);
646: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
647: }
1.1 root 648: } else if (olds && oldm != regs.m) {
649: if (oldm) {
1.1.1.2 root 650: regs.msp = m68k_areg(regs, 7);
651: m68k_areg(regs, 7) = regs.isp;
652: } else {
653: regs.isp = m68k_areg(regs, 7);
654: m68k_areg(regs, 7) = regs.msp;
1.1 root 655: }
656: }
657: } else {
658: if (olds != regs.s) {
1.1.1.3 root 659: if (olds) {
660: regs.isp = m68k_areg(regs, 7);
661: m68k_areg(regs, 7) = regs.usp;
662: } else {
663: regs.usp = m68k_areg(regs, 7);
664: m68k_areg(regs, 7) = regs.isp;
665: }
666: }
1.1 root 667: }
1.1.1.3 root 668:
1.1 root 669: regs.spcflags |= SPCFLAG_INT;
670: if (regs.t1 || regs.t0)
1.1.1.3 root 671: regs.spcflags |= SPCFLAG_TRACE;
1.1 root 672: else
1.1.1.3 root 673: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1 root 674: }
675:
1.1.1.3 root 676: void Exception(int nr, uaecptr oldpc)
1.1 root 677: {
1.1.1.2 root 678: compiler_flush_jsr_stack();
1.1 root 679: MakeSR();
680: if (!regs.s) {
1.1.1.2 root 681: regs.usp = m68k_areg(regs, 7);
1.1.1.3 root 682: if (currprefs.cpu_level >= 2)
683: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
684: else
685: m68k_areg(regs, 7) = regs.isp;
1.1 root 686: regs.s = 1;
687: }
1.1.1.3 root 688: if (currprefs.cpu_level > 0) {
1.1 root 689: if (nr == 2 || nr == 3) {
690: int i;
1.1.1.3 root 691: /* @@@ this is probably wrong (?) */
1.1 root 692: for (i = 0 ; i < 12 ; i++) {
1.1.1.2 root 693: m68k_areg(regs, 7) -= 2;
694: put_word (m68k_areg(regs, 7), 0);
1.1 root 695: }
1.1.1.2 root 696: m68k_areg(regs, 7) -= 2;
697: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
1.1 root 698: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
1.1.1.3 root 699: m68k_areg(regs, 7) -= 4;
700: put_long (m68k_areg(regs, 7), oldpc);
701: m68k_areg(regs, 7) -= 2;
702: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
703: } else if (regs.m && nr >= 24 && nr < 32) {
704: m68k_areg(regs, 7) -= 2;
705: put_word (m68k_areg(regs, 7), nr * 4);
706: m68k_areg(regs, 7) -= 4;
707: put_long (m68k_areg(regs, 7), m68k_getpc ());
708: m68k_areg(regs, 7) -= 2;
709: put_word (m68k_areg(regs, 7), regs.sr);
710: regs.sr |= (1 << 13);
711: regs.msp = m68k_areg(regs, 7);
712: m68k_areg(regs, 7) = regs.isp;
713: m68k_areg(regs, 7) -= 2;
714: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
715: } else {
716: m68k_areg(regs, 7) -= 2;
717: put_word (m68k_areg(regs, 7), nr * 4);
718: }
719: } else {
720: if (nr == 2 || nr == 3) {
721: m68k_areg(regs, 7) -= 12;
722: /* ??????? */
723: if (nr == 3) {
724: put_long (m68k_areg(regs, 7), last_fault_for_exception_3);
725: put_word (m68k_areg(regs, 7)+4, last_op_for_exception_3);
726: put_long (m68k_areg(regs, 7)+8, last_addr_for_exception_3);
727: }
728: write_log ("Exception!\n");
729: goto kludge_me_do;
730: }
1.1 root 731: }
1.1.1.2 root 732: m68k_areg(regs, 7) -= 4;
733: put_long (m68k_areg(regs, 7), m68k_getpc ());
1.1.1.3 root 734: kludge_me_do:
1.1.1.2 root 735: m68k_areg(regs, 7) -= 2;
736: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 737: m68k_setpc (get_long (regs.vbr + 4*nr));
738: fill_prefetch_0 ();
1.1 root 739: regs.t1 = regs.t0 = regs.m = 0;
740: regs.spcflags &= ~(SPCFLAG_TRACE | SPCFLAG_DOTRACE);
741: }
742:
743: static void Interrupt(int nr)
744: {
745: assert(nr < 8 && nr >= 0);
746: lastint_regs = regs;
747: lastint_no = nr;
748: Exception(nr+24, 0);
1.1.1.3 root 749:
1.1 root 750: regs.intmask = nr;
751: regs.spcflags |= SPCFLAG_INT;
752: }
753:
754: static int caar, cacr;
755:
1.1.1.3 root 756: void m68k_move2c (int regno, uae_u32 *regp)
1.1 root 757: {
1.1.1.3 root 758: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 759: op_illg (0x4E7B);
760: else
761: switch (regno) {
762: case 0: regs.sfc = *regp & 7; break;
763: case 1: regs.dfc = *regp & 7; break;
764: case 2: cacr = *regp & 0x3; break; /* ignore C and CE */
765: case 0x800: regs.usp = *regp; break;
766: case 0x801: regs.vbr = *regp; break;
767: case 0x802: caar = *regp &0xfc; break;
1.1.1.2 root 768: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
769: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1 root 770: default:
771: op_illg (0x4E7B);
772: break;
773: }
774: }
775:
1.1.1.3 root 776: void m68k_movec2 (int regno, uae_u32 *regp)
1.1 root 777: {
1.1.1.3 root 778: if (currprefs.cpu_level == 1 && (regno & 0x7FF) > 1)
1.1 root 779: op_illg (0x4E7A);
780: else
781: switch (regno) {
782: case 0: *regp = regs.sfc; break;
783: case 1: *regp = regs.dfc; break;
784: case 2: *regp = cacr; break;
785: case 0x800: *regp = regs.usp; break;
786: case 0x801: *regp = regs.vbr; break;
787: case 0x802: *regp = caar; break;
1.1.1.2 root 788: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
789: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
1.1 root 790: default:
791: op_illg (0x4E7A);
792: break;
793: }
794: }
795:
1.1.1.8 ! root 796: STATIC_INLINE int
1.1.1.3 root 797: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
1.1 root 798: {
1.1.1.3 root 799: uae_u32 q = 0, cbit = 0;
1.1 root 800: int i;
801:
802: if (div <= src_hi) {
1.1.1.4 root 803: return 1;
1.1 root 804: }
805: for (i = 0 ; i < 32 ; i++) {
1.1.1.2 root 806: cbit = src_hi & 0x80000000ul;
1.1 root 807: src_hi <<= 1;
1.1.1.2 root 808: if (src_lo & 0x80000000ul) src_hi++;
1.1 root 809: src_lo <<= 1;
810: q = q << 1;
811: if (cbit || div <= src_hi) {
812: q |= 1;
813: src_hi -= div;
814: }
815: }
816: *quot = q;
817: *rem = src_hi;
1.1.1.4 root 818: return 0;
1.1 root 819: }
820:
1.1.1.3 root 821: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
1.1 root 822: {
1.1.1.3 root 823: #if defined(uae_s64)
1.1 root 824: if (src == 0) {
1.1.1.4 root 825: Exception (5, oldpc);
1.1 root 826: return;
827: }
828: if (extra & 0x800) {
829: /* signed variant */
1.1.1.3 root 830: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
831: uae_s64 quot, rem;
832:
1.1 root 833: if (extra & 0x400) {
1.1.1.3 root 834: a &= 0xffffffffu;
835: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 836: }
1.1.1.3 root 837: rem = a % (uae_s64)(uae_s32)src;
838: quot = a / (uae_s64)(uae_s32)src;
839: if ((quot & UVAL64(0xffffffff80000000)) != 0
840: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
841: {
1.1.1.6 root 842: SET_VFLG (1);
843: SET_NFLG (1);
844: SET_CFLG (0);
1.1.1.4 root 845: } else {
1.1.1.3 root 846: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
1.1.1.6 root 847: SET_VFLG (0);
848: SET_CFLG (0);
849: SET_ZFLG (((uae_s32)quot) == 0);
850: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 851: m68k_dreg(regs, extra & 7) = rem;
852: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 853: }
854: } else {
855: /* unsigned */
1.1.1.3 root 856: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
857: uae_u64 quot, rem;
858:
1.1 root 859: if (extra & 0x400) {
1.1.1.3 root 860: a &= 0xffffffffu;
861: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
1.1 root 862: }
1.1.1.3 root 863: rem = a % (uae_u64)src;
864: quot = a / (uae_u64)src;
865: if (quot > 0xffffffffu) {
1.1.1.6 root 866: SET_VFLG (1);
867: SET_NFLG (1);
868: SET_CFLG (0);
1.1.1.4 root 869: } else {
1.1.1.6 root 870: SET_VFLG (0);
871: SET_CFLG (0);
872: SET_ZFLG (((uae_s32)quot) == 0);
873: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 874: m68k_dreg(regs, extra & 7) = rem;
875: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 876: }
877: }
878: #else
879: if (src == 0) {
1.1.1.4 root 880: Exception (5, oldpc);
1.1 root 881: return;
882: }
883: if (extra & 0x800) {
884: /* signed variant */
1.1.1.3 root 885: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
886: uae_s32 hi = lo < 0 ? -1 : 0;
887: uae_s32 save_high;
888: uae_u32 quot, rem;
889: uae_u32 sign;
890:
1.1 root 891: if (extra & 0x400) {
1.1.1.3 root 892: hi = (uae_s32)m68k_dreg(regs, extra & 7);
1.1 root 893: }
894: save_high = hi;
895: sign = (hi ^ src);
896: if (hi < 0) {
1.1.1.4 root 897: hi = ~hi;
898: lo = -lo;
899: if (lo == 0) hi++;
1.1 root 900: }
1.1.1.3 root 901: if ((uae_s32)src < 0) src = -src;
1.1 root 902: if (div_unsigned(hi, lo, src, ", &rem) ||
903: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
1.1.1.6 root 904: SET_VFLG (1);
905: SET_NFLG (1);
906: SET_CFLG (0);
1.1.1.4 root 907: } else {
1.1 root 908: if (sign & 0x80000000) quot = -quot;
1.1.1.3 root 909: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
1.1.1.6 root 910: SET_VFLG (0);
911: SET_CFLG (0);
912: SET_ZFLG (((uae_s32)quot) == 0);
913: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 914: m68k_dreg(regs, extra & 7) = rem;
915: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 916: }
917: } else {
918: /* unsigned */
1.1.1.3 root 919: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
920: uae_u32 hi = 0;
921: uae_u32 quot, rem;
922:
1.1 root 923: if (extra & 0x400) {
1.1.1.3 root 924: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1.1 root 925: }
926: if (div_unsigned(hi, lo, src, ", &rem)) {
1.1.1.6 root 927: SET_VFLG (1);
928: SET_NFLG (1);
929: SET_CFLG (0);
1.1.1.4 root 930: } else {
1.1.1.6 root 931: SET_VFLG (0);
932: SET_CFLG (0);
933: SET_ZFLG (((uae_s32)quot) == 0);
934: SET_NFLG (((uae_s32)quot) < 0);
1.1.1.2 root 935: m68k_dreg(regs, extra & 7) = rem;
936: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1.1 root 937: }
938: }
939: #endif
940: }
941:
1.1.1.8 ! root 942: STATIC_INLINE void
1.1.1.3 root 943: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1.1 root 944: {
1.1.1.3 root 945: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
946: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
947: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
948: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
949: uae_u32 lo;
950:
951: lo = r0 + ((r1 << 16) & 0xffff0000ul);
952: if (lo < r0) r3++;
953: r0 = lo;
954: lo = r0 + ((r2 << 16) & 0xffff0000ul);
955: if (lo < r0) r3++;
956: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1.1 root 957: *dst_lo = lo;
958: *dst_hi = r3;
959: }
960:
1.1.1.3 root 961: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1.1 root 962: {
1.1.1.3 root 963: #if defined(uae_s64)
1.1 root 964: if (extra & 0x800) {
965: /* signed variant */
1.1.1.3 root 966: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 967:
1.1.1.3 root 968: a *= (uae_s64)(uae_s32)src;
1.1.1.6 root 969: SET_VFLG (0);
970: SET_CFLG (0);
971: SET_ZFLG (a == 0);
972: SET_NFLG (a < 0);
1.1 root 973: if (extra & 0x400)
1.1.1.2 root 974: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 975: else if ((a & UVAL64(0xffffffff80000000)) != 0
976: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
977: {
1.1.1.6 root 978: SET_VFLG (1);
1.1 root 979: }
1.1.1.3 root 980: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 981: } else {
982: /* unsigned */
1.1.1.3 root 983: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
984:
985: a *= (uae_u64)src;
1.1.1.6 root 986: SET_VFLG (0);
987: SET_CFLG (0);
988: SET_ZFLG (a == 0);
989: SET_NFLG (((uae_s64)a) < 0);
1.1 root 990: if (extra & 0x400)
1.1.1.2 root 991: m68k_dreg(regs, extra & 7) = a >> 32;
1.1.1.3 root 992: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1.1.1.6 root 993: SET_VFLG (1);
1.1 root 994: }
1.1.1.3 root 995: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1.1 root 996: }
997: #else
998: if (extra & 0x800) {
999: /* signed variant */
1.1.1.3 root 1000: uae_s32 src1,src2;
1001: uae_u32 dst_lo,dst_hi;
1002: uae_u32 sign;
1.1 root 1003:
1.1.1.3 root 1004: src1 = (uae_s32)src;
1005: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1.1 root 1006: sign = (src1 ^ src2);
1007: if (src1 < 0) src1 = -src1;
1008: if (src2 < 0) src2 = -src2;
1.1.1.3 root 1009: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1.1 root 1010: if (sign & 0x80000000) {
1011: dst_hi = ~dst_hi;
1012: dst_lo = -dst_lo;
1013: if (dst_lo == 0) dst_hi++;
1014: }
1.1.1.6 root 1015: SET_VFLG (0);
1016: SET_CFLG (0);
1017: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1018: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1019: if (extra & 0x400)
1.1.1.2 root 1020: m68k_dreg(regs, extra & 7) = dst_hi;
1.1.1.3 root 1021: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1022: && ((dst_hi & 0xffffffff) != 0xffffffff
1023: || (dst_lo & 0x80000000) != 0x80000000))
1024: {
1.1.1.6 root 1025: SET_VFLG (1);
1.1 root 1026: }
1.1.1.2 root 1027: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1028: } else {
1029: /* unsigned */
1.1.1.3 root 1030: uae_u32 dst_lo,dst_hi;
1031:
1032: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1.1 root 1033:
1.1.1.6 root 1034: SET_VFLG (0);
1035: SET_CFLG (0);
1036: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1037: SET_NFLG (((uae_s32)dst_hi) < 0);
1.1 root 1038: if (extra & 0x400)
1.1.1.2 root 1039: m68k_dreg(regs, extra & 7) = dst_hi;
1.1 root 1040: else if (dst_hi != 0) {
1.1.1.6 root 1041: SET_VFLG (1);
1.1 root 1042: }
1.1.1.2 root 1043: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1.1 root 1044: }
1045: #endif
1046: }
1047: static char* ccnames[] =
1048: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1049: "VC","VS","PL","MI","GE","LT","GT","LE" };
1050:
1.1.1.4 root 1051: void m68k_reset (void)
1.1 root 1052: {
1.1.1.3 root 1053: m68k_areg (regs, 7) = get_long (0x00f80000);
1054: m68k_setpc (get_long (0x00f80004));
1055: fill_prefetch_0 ();
1.1.1.2 root 1056: regs.kick_mask = 0xF80000;
1.1 root 1057: regs.s = 1;
1058: regs.m = 0;
1059: regs.stopped = 0;
1060: regs.t1 = 0;
1061: regs.t0 = 0;
1.1.1.6 root 1062: SET_ZFLG (0);
1063: SET_XFLG (0);
1064: SET_CFLG (0);
1065: SET_VFLG (0);
1066: SET_NFLG (0);
1.1 root 1067: regs.spcflags = 0;
1068: regs.intmask = 7;
1069: regs.vbr = regs.sfc = regs.dfc = 0;
1070: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1071: }
1072:
1.1.1.4 root 1073: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1.1 root 1074: {
1.1.1.3 root 1075: uaecptr pc = m68k_getpc ();
1.1.1.4 root 1076:
1.1.1.3 root 1077: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1078: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1079: m68k_incpc (2);
1080: fill_prefetch_0 ();
1.1.1.4 root 1081: return 4;
1.1.1.3 root 1082: }
1083:
1084: compiler_flush_jsr_stack ();
1085: if (opcode == 0x4E7B && get_long (0x10) == 0 && (pc & 0xF80000) == 0xF80000) {
1.1.1.4 root 1086: write_log ("Your Kickstart requires a 68020 CPU. Giving up.\n");
1.1.1.3 root 1087: broken_in = 1;
1.1 root 1088: regs.spcflags |= SPCFLAG_BRK;
1089: quit_program = 1;
1090: }
1.1.1.2 root 1091: if (opcode == 0xFF0D) {
1.1.1.3 root 1092: if ((pc & 0xF80000) == 0xF80000) {
1.1.1.2 root 1093: /* This is from the dummy Kickstart replacement */
1.1.1.3 root 1094: uae_u16 arg = get_iword (2);
1095: m68k_incpc (4);
1096: ersatz_perform (arg);
1097: fill_prefetch_0 ();
1.1.1.4 root 1098: return 4;
1.1.1.3 root 1099: } else if ((pc & 0xF80000) == 0xF00000) {
1.1.1.2 root 1100: /* User-mode STOP replacement */
1.1.1.3 root 1101: m68k_setstopped (1);
1.1.1.4 root 1102: return 4;
1.1.1.2 root 1103: }
1.1 root 1104: }
1.1.1.3 root 1105:
1106: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1107: /* Calltrap. */
1108: m68k_incpc(2);
1109: call_calltrap (opcode & 0xFFF);
1110: fill_prefetch_0 ();
1.1.1.4 root 1111: return 4;
1.1.1.3 root 1112: }
1113:
1.1 root 1114: if ((opcode & 0xF000) == 0xF000) {
1115: Exception(0xB,0);
1.1.1.4 root 1116: return 4;
1.1 root 1117: }
1118: if ((opcode & 0xF000) == 0xA000) {
1.1.1.3 root 1119: if ((pc & 0xF80000) == 0xF00000) {
1120: /* Calltrap. */
1121: call_calltrap (opcode & 0xFFF);
1122: }
1123: Exception(0xA,0);
1.1.1.4 root 1124: return 4;
1.1 root 1125: }
1.1.1.4 root 1126: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1.1.1.3 root 1127: Exception (4,0);
1.1.1.4 root 1128: return 4;
1.1 root 1129: }
1130:
1.1.1.3 root 1131: void mmu_op(uae_u32 opcode, uae_u16 extra)
1.1 root 1132: {
1133: if ((extra & 0xB000) == 0) { /* PMOVE instruction */
1134:
1135: } else if ((extra & 0xF000) == 0x2000) { /* PLOAD instruction */
1136: } else if ((extra & 0xF000) == 0x8000) { /* PTEST instruction */
1137: } else
1.1.1.3 root 1138: op_illg (opcode);
1.1 root 1139: }
1140:
1.1.1.4 root 1141: static int n_insns = 0, n_spcinsns = 0;
1.1 root 1142:
1.1.1.3 root 1143: static uaecptr last_trace_ad = 0;
1.1 root 1144:
1.1.1.7 root 1145: static void do_trace (void)
1.1 root 1146: {
1.1.1.7 root 1147: if (regs.t0) {
1148: uae_u16 opcode;
1149: /* should also include TRAP, CHK, SR modification FPcc */
1150: /* probably never used so why bother */
1151: /* We can afford this to be inefficient... */
1152: m68k_setpc (m68k_getpc ());
1153: fill_prefetch_0 ();
1154: opcode = get_word (regs.pc);
1155: if (opcode == 0x4e72 /* RTE */
1156: || opcode == 0x4e74 /* RTD */
1157: || opcode == 0x4e75 /* RTS */
1158: || opcode == 0x4e77 /* RTR */
1159: || opcode == 0x4e76 /* TRAPV */
1160: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1161: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1162: || (opcode & 0xff00) == 0x6100 /* BSR */
1163: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1164: && cctrue((opcode >> 8) & 0xf))
1165: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1166: && !cctrue((opcode >> 8) & 0xf)
1167: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1168: {
1.1.1.4 root 1169: last_trace_ad = m68k_getpc ();
1.1 root 1170: regs.spcflags &= ~SPCFLAG_TRACE;
1171: regs.spcflags |= SPCFLAG_DOTRACE;
1172: }
1.1.1.7 root 1173: } else if (regs.t1) {
1174: last_trace_ad = m68k_getpc ();
1175: regs.spcflags &= ~SPCFLAG_TRACE;
1176: regs.spcflags |= SPCFLAG_DOTRACE;
1.1 root 1177: }
1178: }
1179:
1.1.1.7 root 1180:
1.1.1.3 root 1181: static int do_specialties (void)
1.1 root 1182: {
1.1.1.3 root 1183: /*n_spcinsns++;*/
1184: while (regs.spcflags & SPCFLAG_BLTNASTY) {
1.1.1.4 root 1185: do_cycles (4);
1.1.1.3 root 1186: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1187: do_disk ();
1.1.1.3 root 1188: }
1189: run_compiled_code();
1190: if (regs.spcflags & SPCFLAG_DOTRACE) {
1.1.1.4 root 1191: Exception (9,last_trace_ad);
1.1.1.3 root 1192: }
1193: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.4 root 1194: do_cycles (4);
1.1.1.3 root 1195: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1196: do_disk ();
1.1.1.3 root 1197: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.4 root 1198: int intr = intlev ();
1.1.1.3 root 1199: regs.spcflags &= ~(SPCFLAG_INT | SPCFLAG_DOINT);
1200: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1201: Interrupt (intr);
1.1.1.3 root 1202: regs.stopped = 0;
1203: regs.spcflags &= ~SPCFLAG_STOP;
1.1.1.2 root 1204: }
1.1.1.3 root 1205: }
1206: }
1.1.1.7 root 1207: if (regs.spcflags & SPCFLAG_TRACE)
1208: do_trace ();
1.1.1.4 root 1209:
1.1.1.3 root 1210: if (regs.spcflags & SPCFLAG_DISK)
1.1.1.4 root 1211: do_disk ();
1.1.1.3 root 1212:
1213: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.4 root 1214: int intr = intlev ();
1.1.1.3 root 1215: regs.spcflags &= ~SPCFLAG_DOINT;
1216: if (intr != -1 && intr > regs.intmask) {
1.1.1.4 root 1217: Interrupt (intr);
1.1.1.3 root 1218: regs.stopped = 0;
1219: }
1220: }
1221: if (regs.spcflags & SPCFLAG_INT) {
1222: regs.spcflags &= ~SPCFLAG_INT;
1223: regs.spcflags |= SPCFLAG_DOINT;
1224: }
1.1.1.4 root 1225: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1226: regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1.1.1.3 root 1227: return 1;
1.1.1.2 root 1228: }
1.1.1.3 root 1229: return 0;
1.1.1.2 root 1230: }
1231:
1.1.1.8 ! root 1232: /* It's really sad to have two almost identical functions for this, but we
! 1233: do it all for performance... :( */
1.1.1.4 root 1234: static void m68k_run_1 (void)
1.1.1.2 root 1235: {
1.1.1.3 root 1236: for (;;) {
1.1.1.4 root 1237: int cycles;
1.1.1.8 ! root 1238: uae_u32 opcode = get_iword_prefetch (0);
! 1239: #if 0
! 1240: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
! 1241: debugging = 1;
! 1242: return;
! 1243: }
! 1244: #endif
! 1245: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
! 1246: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
! 1247: #if COUNT_INSTRS == 2
! 1248: if (table68k[opcode].handler != -1)
! 1249: instrcount[table68k[opcode].handler]++;
! 1250: #elif COUNT_INSTRS == 1
! 1251: instrcount[opcode]++;
! 1252: #endif
! 1253: #if defined X86_ASSEMBLY
! 1254: __asm__ __volatile__("\tcall *%%ebx"
! 1255: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
! 1256: : "%edx", "%ecx",
! 1257: "%esi", "%edi", "%ebp", "memory", "cc");
! 1258: #else
! 1259: cycles = (*cpufunctbl[opcode])(opcode);
! 1260: #endif
! 1261: /*n_insns++;*/
! 1262: cycles &= cycles_mask;
! 1263: cycles |= cycles_val;
! 1264: do_cycles (cycles);
! 1265: if (regs.spcflags) {
! 1266: if (do_specialties ())
! 1267: return;
! 1268: }
! 1269: }
! 1270: }
! 1271:
! 1272: /* Same thing, but don't use prefetch to get opcode. */
! 1273: static void m68k_run_2 (void)
! 1274: {
! 1275: for (;;) {
! 1276: int cycles;
! 1277: uae_u32 opcode = get_iword (0);
1.1.1.3 root 1278: #if 0
1279: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1280: debugging = 1;
1281: return;
1282: }
1283: #endif
1.1.1.2 root 1284: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1285: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1.1.1.3 root 1286: #if COUNT_INSTRS == 2
1.1.1.8 ! root 1287: if (table68k[opcode].handler != -1)
! 1288: instrcount[table68k[opcode].handler]++;
1.1.1.3 root 1289: #elif COUNT_INSTRS == 1
1.1.1.2 root 1290: instrcount[opcode]++;
1291: #endif
1.1.1.8 ! root 1292: #if defined X86_ASSEMBLY
1.1.1.3 root 1293: __asm__ __volatile__("\tcall *%%ebx"
1.1.1.4 root 1294: : "=&a" (cycles) : "b" (cpufunctbl[opcode]), "0" (opcode)
1.1.1.3 root 1295: : "%edx", "%ecx",
1296: "%esi", "%edi", "%ebp", "memory", "cc");
1.1.1.2 root 1297: #else
1.1.1.4 root 1298: cycles = (*cpufunctbl[opcode])(opcode);
1.1.1.2 root 1299: #endif
1300: /*n_insns++;*/
1.1.1.4 root 1301: cycles &= cycles_mask;
1302: cycles |= cycles_val;
1303: do_cycles (cycles);
1.1.1.2 root 1304: if (regs.spcflags) {
1.1.1.4 root 1305: if (do_specialties ())
1.1 root 1306: return;
1307: }
1308: }
1309: }
1310:
1311: #ifdef X86_ASSEMBLY
1.1.1.8 ! root 1312: STATIC_INLINE void m68k_run1 (func)
1.1 root 1313: {
1314: /* Work around compiler bug: GCC doesn't push %ebp in m68k_run_1. */
1.1.1.8 ! root 1315: __asm__ __volatile__ ("pushl %%ebp\n\tcall *%0\n\tpopl %%ebp"
! 1316: : : "r" (func) : "%eax", "%edx", "%ecx", "memory", "cc");
1.1 root 1317: }
1.1.1.2 root 1318: #else
1.1.1.8 ! root 1319: #define m68k_run1(F) F
1.1.1.2 root 1320: #endif
1321:
1.1.1.3 root 1322: int in_m68k_go = 0;
1.1 root 1323:
1.1.1.4 root 1324: void m68k_go (int may_quit)
1.1 root 1325: {
1.1.1.3 root 1326: if (in_m68k_go || !may_quit) {
1.1.1.4 root 1327: write_log ("Bug! m68k_go is not reentrant.\n");
1328: abort ();
1.1.1.3 root 1329: }
1.1.1.4 root 1330:
1331: reset_frame_rate_hack ();
1332: update_68k_cycles ();
1333:
1.1.1.3 root 1334: in_m68k_go++;
1335: for (;;) {
1336: if (quit_program > 0) {
1337: if (quit_program == 1)
1.1 root 1338: break;
1.1.1.3 root 1339: quit_program = 0;
1.1.1.4 root 1340: m68k_reset ();
1341: reset_all_systems ();
1342: customreset ();
1.1 root 1343: }
1.1.1.3 root 1344: if (debugging)
1.1.1.4 root 1345: debug ();
1.1.1.8 ! root 1346: m68k_run1 (currprefs.cpu_compatible ? m68k_run_1 : m68k_run_2);
1.1 root 1347: }
1.1.1.3 root 1348: in_m68k_go--;
1.1 root 1349: }
1350:
1.1.1.4 root 1351: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1.1 root 1352: {
1.1.1.3 root 1353: uae_u32 opcode, val;
1354: struct instr *dp;
1355:
1356: opcode = get_iword_1(0);
1357: last_op_for_exception_3 = opcode;
1358: m68kpc_offset = 2;
1359:
1.1.1.8 ! root 1360: if (cpufunctbl[opcode] == op_illg_1) {
1.1.1.3 root 1361: opcode = 0x4AFC;
1362: }
1363: dp = table68k + opcode;
1364:
1365: if (dp->suse) {
1366: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1367: Exception (3, 0);
1368: return;
1369: }
1370: }
1371: if (dp->duse) {
1372: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1373: Exception (3, 0);
1374: return;
1375: }
1376: }
1377: }
1378:
1.1.1.4 root 1379: void m68k_disasm (uaecptr addr, uaecptr *nextpc, int cnt)
1.1.1.3 root 1380: {
1381: uaecptr newpc = 0;
1.1.1.4 root 1382: m68kpc_offset = addr - m68k_getpc ();
1383: while (cnt-- > 0) {
1.1 root 1384: char instrname[20],*ccpt;
1385: int opwords;
1.1.1.3 root 1386: uae_u32 opcode;
1.1 root 1387: struct mnemolookup *lookup;
1388: struct instr *dp;
1.1.1.4 root 1389: printf ("%08lx: ", m68k_getpc () + m68kpc_offset);
1.1.1.3 root 1390: for (opwords = 0; opwords < 5; opwords++){
1.1.1.4 root 1391: printf ("%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1.1 root 1392: }
1.1.1.4 root 1393: opcode = get_iword_1 (m68kpc_offset);
1.1.1.3 root 1394: m68kpc_offset += 2;
1.1.1.8 ! root 1395: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1396: opcode = 0x4AFC;
1397: }
1398: dp = table68k + opcode;
1399: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1400: ;
1.1.1.3 root 1401:
1.1.1.4 root 1402: strcpy (instrname, lookup->name);
1403: ccpt = strstr (instrname, "cc");
1.1 root 1404: if (ccpt != 0) {
1.1.1.4 root 1405: strncpy (ccpt, ccnames[dp->cc], 2);
1.1 root 1406: }
1.1.1.3 root 1407: printf ("%s", instrname);
1408: switch (dp->size){
1409: case sz_byte: printf (".B "); break;
1410: case sz_word: printf (".W "); break;
1411: case sz_long: printf (".L "); break;
1412: default: printf (" "); break;
1.1 root 1413: }
1414:
1415: if (dp->suse) {
1.1.1.4 root 1416: newpc = m68k_getpc () + m68kpc_offset;
1417: newpc += ShowEA (dp->sreg, dp->smode, dp->size, 0);
1.1 root 1418: }
1419: if (dp->suse && dp->duse)
1.1.1.3 root 1420: printf (",");
1.1 root 1421: if (dp->duse) {
1.1.1.4 root 1422: newpc = m68k_getpc () + m68kpc_offset;
1423: newpc += ShowEA (dp->dreg, dp->dmode, dp->size, 0);
1.1 root 1424: }
1425: if (ccpt != 0) {
1426: if (cctrue(dp->cc))
1.1.1.4 root 1427: printf (" == %08lx (TRUE)", newpc);
1.1.1.3 root 1428: else
1.1.1.4 root 1429: printf (" == %08lx (FALSE)", newpc);
1.1 root 1430: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.4 root 1431: printf (" == %08lx", newpc);
1.1.1.3 root 1432: printf ("\n");
1.1 root 1433: }
1.1.1.4 root 1434: if (nextpc)
1435: *nextpc = m68k_getpc () + m68kpc_offset;
1.1 root 1436: }
1437:
1.1.1.4 root 1438: void m68k_dumpstate (uaecptr *nextpc)
1.1 root 1439: {
1440: int i;
1.1.1.3 root 1441: for (i = 0; i < 8; i++){
1442: printf ("D%d: %08lx ", i, m68k_dreg(regs, i));
1443: if ((i & 3) == 3) printf ("\n");
1444: }
1445: for (i = 0; i < 8; i++){
1446: printf ("A%d: %08lx ", i, m68k_areg(regs, i));
1447: if ((i & 3) == 3) printf ("\n");
1.1 root 1448: }
1.1.1.2 root 1449: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1450: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1451: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1.1.1.3 root 1452: printf ("USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1.1 root 1453: regs.usp,regs.isp,regs.msp,regs.vbr);
1454: printf ("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1455: regs.t1, regs.t0, regs.s, regs.m,
1.1.1.6 root 1456: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1.1.1.3 root 1457: for (i = 0; i < 8; i++){
1458: printf ("FP%d: %g ", i, regs.fp[i]);
1459: if ((i & 3) == 3) printf ("\n");
1.1 root 1460: }
1.1.1.3 root 1461: printf ("N=%d Z=%d I=%d NAN=%d\n",
1.1 root 1462: (regs.fpsr & 0x8000000) != 0,
1463: (regs.fpsr & 0x4000000) != 0,
1464: (regs.fpsr & 0x2000000) != 0,
1465: (regs.fpsr & 0x1000000) != 0);
1.1.1.3 root 1466: if (currprefs.cpu_compatible)
1467: printf ("prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1468:
1.1.1.4 root 1469: m68k_disasm(m68k_getpc (), nextpc, 1);
1470: if (nextpc)
1471: printf ("next PC: %08lx\n", *nextpc);
1.1 root 1472: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.