![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to readcpu.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [UNIX Amiga Emulator] / uae / src|
Return to readcpu.c CVS log | Up to [UNIX Amiga Emulator] / uae / src |
1.1.1.2 root 1: /*
1.1 root 2: * UAE - The Un*x Amiga Emulator
3: *
4: * Read 68000 CPU specs from file "table68k"
5: *
6: * Copyright 1995,1996 Bernd Schmidt
7: */
8:
9: #include "sysconfig.h"
10: #include "sysdeps.h"
11: #include <ctype.h>
12:
13: #include "readcpu.h"
14:
1.1.1.2 root 15: int nr_cpuop_funcs;
16:
1.1 root 17: struct mnemolookup lookuptab[] = {
18: { i_ILLG, "ILLEGAL" },
19: { i_OR, "OR" },
20: { i_CHK, "CHK" },
21: { i_CHK2, "CHK2" },
1.1.1.2 root 22: { i_AND, "AND" },
1.1 root 23: { i_EOR, "EOR" },
1.1.1.2 root 24: { i_ORSR, "ORSR" },
25: { i_ANDSR, "ANDSR" },
26: { i_EORSR, "EORSR" },
27: { i_SUB, "SUB" },
28: { i_SUBA, "SUBA" },
29: { i_SUBX, "SUBX" },
30: { i_SBCD, "SBCD" },
31: { i_ADD, "ADD" },
32: { i_ADDA, "ADDA" },
33: { i_ADDX, "ADDX" },
1.1 root 34: { i_ABCD, "ABCD" },
1.1.1.2 root 35: { i_NEG, "NEG" },
36: { i_NEGX, "NEGX" },
37: { i_NBCD, "NBCD" },
38: { i_CLR, "CLR" },
39: { i_NOT, "NOT" },
40: { i_TST, "TST" },
41: { i_BTST, "BTST" },
42: { i_BCHG, "BCHG" },
43: { i_BCLR, "BCLR" },
1.1 root 44: { i_BSET, "BSET" },
1.1.1.2 root 45: { i_CMP, "CMP" },
46: { i_CMPM, "CMPM" },
47: { i_CMPA, "CMPA" },
1.1 root 48: { i_MVPRM, "MVPRM" },
49: { i_MVPMR, "MVPMR" },
1.1.1.2 root 50: { i_MOVE, "MOVE" },
1.1 root 51: { i_MOVEA, "MOVEA" },
52: { i_MVSR2, "MVSR2" },
1.1.1.2 root 53: { i_MV2SR, "MV2SR" },
1.1 root 54: { i_SWAP, "SWAP" },
55: { i_EXG, "EXG" },
56: { i_EXT, "EXT" },
1.1.1.2 root 57: { i_MVMEL, "MVMEL" },
58: { i_MVMLE, "MVMLE" },
1.1 root 59: { i_TRAP, "TRAP" },
1.1.1.2 root 60: { i_MVR2USP, "MVR2USP" },
61: { i_MVUSP2R, "MVUSP2R" },
1.1 root 62: { i_NOP, "NOP" },
63: { i_RESET, "RESET" },
64: { i_RTE, "RTE" },
1.1.1.2 root 65: { i_RTD, "RTD" },
1.1 root 66: { i_LINK, "LINK" },
1.1.1.2 root 67: { i_UNLK, "UNLK" },
68: { i_RTS, "RTS" },
1.1 root 69: { i_STOP, "STOP" },
1.1.1.2 root 70: { i_TRAPV, "TRAPV" },
71: { i_RTR, "RTR" },
1.1 root 72: { i_JSR, "JSR" },
73: { i_JMP, "JMP" },
74: { i_BSR, "BSR" },
75: { i_Bcc, "Bcc" },
76: { i_LEA, "LEA" },
77: { i_PEA, "PEA" },
1.1.1.2 root 78: { i_DBcc, "DBcc" },
79: { i_Scc, "Scc" },
80: { i_DIVU, "DIVU" },
1.1 root 81: { i_DIVS, "DIVS" },
82: { i_MULU, "MULU" },
1.1.1.2 root 83: { i_MULS, "MULS" },
1.1 root 84: { i_ASR, "ASR" },
85: { i_ASL, "ASL" },
86: { i_LSR, "LSR" },
87: { i_LSL, "LSL" },
88: { i_ROL, "ROL" },
89: { i_ROR, "ROR" },
90: { i_ROXL, "ROXL" },
91: { i_ROXR, "ROXR" },
92: { i_ASRW, "ASRW" },
93: { i_ASLW, "ASLW" },
94: { i_LSRW, "LSRW" },
95: { i_LSLW, "LSLW" },
96: { i_ROLW, "ROLW" },
97: { i_RORW, "RORW" },
98: { i_ROXLW, "ROXLW" },
99: { i_ROXRW, "ROXRW" },
1.1.1.2 root 100:
1.1 root 101: { i_MOVE2C, "MOVE2C" },
102: { i_MOVEC2, "MOVEC2" },
103: { i_CAS, "CAS" },
104: { i_CAS2, "CAS2" },
105: { i_MULL, "MULL" },
106: { i_DIVL, "DIVL" },
107: { i_BFTST, "BFTST" },
108: { i_BFEXTU, "BFEXTU" },
109: { i_BFCHG, "BFCHG" },
110: { i_BFEXTS, "BFEXTS" },
111: { i_BFCLR, "BFCLR" },
112: { i_BFFFO, "BFFFO" },
113: { i_BFSET, "BFSET" },
114: { i_BFINS, "BFINS" },
115: { i_PACK, "PACK" },
116: { i_UNPK, "UNPK" },
117: { i_TAS, "TAS" },
118: { i_BKPT, "BKPT" },
119: { i_CALLM, "CALLM" },
120: { i_RTM, "RTM" },
121: { i_TRAPcc, "TRAPcc" },
122: { i_MOVES, "MOVES" },
123: { i_FPP, "FPP" },
124: { i_FDBcc, "FDBcc" },
125: { i_FScc, "FScc" },
126: { i_FTRAPcc, "FTRAPcc" },
127: { i_FBcc, "FBcc" },
128: { i_FBcc, "FBcc" },
129: { i_FSAVE, "FSAVE" },
130: { i_FRESTORE, "FRESTORE" },
1.1.1.5 root 131:
132: { i_CINVL, "CINVL" },
133: { i_CINVP, "CINVP" },
134: { i_CINVA, "CINVA" },
135: { i_CPUSHL, "CPUSHL" },
136: { i_CPUSHP, "CPUSHP" },
137: { i_CPUSHA, "CPUSHA" },
138: { i_MOVE16, "MOVE16" },
139:
1.1 root 140: { i_MMUOP, "MMUOP" },
141: { i_ILLG, "" },
142: };
143:
144: struct instr *table68k;
145:
1.1.1.4 root 146: STATIC_INLINE amodes mode_from_str (const char *str)
1.1 root 147: {
1.1.1.3 root 148: if (strncmp (str, "Dreg", 4) == 0) return Dreg;
149: if (strncmp (str, "Areg", 4) == 0) return Areg;
150: if (strncmp (str, "Aind", 4) == 0) return Aind;
151: if (strncmp (str, "Apdi", 4) == 0) return Apdi;
152: if (strncmp (str, "Aipi", 4) == 0) return Aipi;
153: if (strncmp (str, "Ad16", 4) == 0) return Ad16;
154: if (strncmp (str, "Ad8r", 4) == 0) return Ad8r;
155: if (strncmp (str, "absw", 4) == 0) return absw;
156: if (strncmp (str, "absl", 4) == 0) return absl;
157: if (strncmp (str, "PC16", 4) == 0) return PC16;
158: if (strncmp (str, "PC8r", 4) == 0) return PC8r;
159: if (strncmp (str, "Immd", 4) == 0) return imm;
160: abort ();
161: return 0;
1.1 root 162: }
163:
1.1.1.4 root 164: STATIC_INLINE amodes mode_from_mr (int mode, int reg)
1.1 root 165: {
1.1.1.3 root 166: switch (mode) {
1.1.1.2 root 167: case 0: return Dreg;
1.1 root 168: case 1: return Areg;
169: case 2: return Aind;
170: case 3: return Aipi;
171: case 4: return Apdi;
172: case 5: return Ad16;
173: case 6: return Ad8r;
1.1.1.2 root 174: case 7:
1.1.1.3 root 175: switch (reg) {
1.1 root 176: case 0: return absw;
177: case 1: return absl;
178: case 2: return PC16;
179: case 3: return PC8r;
180: case 4: return imm;
181: case 5:
182: case 6:
183: case 7: return am_illg;
184: }
185: }
1.1.1.3 root 186: abort ();
187: return 0;
1.1 root 188: }
189:
1.1.1.3 root 190: static void build_insn (int insn)
1.1 root 191: {
192: int find = -1;
193: int variants;
1.1.1.6 root 194: int isjmp = 0;
1.1 root 195: struct instr_def id;
196: const char *opcstr;
197: int i;
198:
199: int flaglive = 0, flagdead = 0;
200:
201: id = defs68k[insn];
1.1.1.2 root 202:
1.1.1.6 root 203: /* Note: We treat anything with unknown flags as a jump. That
204: is overkill, but "the programmer" was lazy quite often, and
205: *this* programmer can't be bothered to work out what can and
206: can't trap. Usually, this will be overwritten with the gencomp
207: based information, anyway. */
208:
1.1.1.3 root 209: for (i = 0; i < 5; i++) {
210: switch (id.flaginfo[i].flagset){
1.1.1.6 root 211: case fa_unset: break;
212: case fa_isjmp: isjmp = 1; break;
213: case fa_isbranch: isjmp = 1; break;
214: case fa_zero: flagdead |= 1 << i; break;
215: case fa_one: flagdead |= 1 << i; break;
216: case fa_dontcare: flagdead |= 1 << i; break;
217: case fa_unknown: isjmp = 1; flagdead = -1; goto out1;
218: case fa_set: flagdead |= 1 << i; break;
1.1 root 219: }
220: }
221:
1.1.1.6 root 222: out1:
1.1.1.3 root 223: for (i = 0; i < 5; i++) {
224: switch (id.flaginfo[i].flaguse) {
1.1.1.6 root 225: case fu_unused: break;
226: case fu_isjmp: isjmp = 1; flaglive |= 1 << i; break;
227: case fu_maybecc: isjmp = 1; flaglive |= 1 << i; break;
228: case fu_unknown: isjmp = 1; flaglive |= 1 << i; break;
229: case fu_used: flaglive |= 1 << i; break;
1.1 root 230: }
231: }
1.1.1.6 root 232: out2:
1.1.1.2 root 233:
1.1 root 234: opcstr = id.opcstr;
235: for (variants = 0; variants < (1 << id.n_variable); variants++) {
236: int bitcnt[lastbit];
237: int bitval[lastbit];
238: int bitpos[lastbit];
239: int i;
1.1.1.2 root 240: uae_u16 opc = id.bits;
241: uae_u16 msk, vmsk;
1.1 root 242: int pos = 0;
243: int mnp = 0;
244: int bitno = 0;
245: char mnemonic[10];
1.1.1.2 root 246:
1.1 root 247: wordsizes sz = sz_long;
248: int srcgather = 0, dstgather = 0;
249: int usesrc = 0, usedst = 0;
250: int srctype = 0;
251: int srcpos = -1, dstpos = -1;
1.1.1.2 root 252:
1.1 root 253: amodes srcmode = am_unknown, destmode = am_unknown;
254: int srcreg = -1, destreg = -1;
1.1.1.2 root 255:
1.1.1.3 root 256: for (i = 0; i < lastbit; i++)
1.1 root 257: bitcnt[i] = bitval[i] = 0;
258:
259: vmsk = 1 << id.n_variable;
1.1.1.2 root 260:
1.1.1.3 root 261: for (i = 0, msk = 0x8000; i < 16; i++, msk >>= 1) {
1.1 root 262: if (!(msk & id.mask)) {
263: int currbit = id.bitpos[bitno++];
264: int bit_set;
265: vmsk >>= 1;
266: bit_set = variants & vmsk ? 1 : 0;
267: if (bit_set)
268: opc |= msk;
269: bitpos[currbit] = 15 - i;
270: bitcnt[currbit]++;
271: bitval[currbit] <<= 1;
272: bitval[currbit] |= bit_set;
273: }
274: }
1.1.1.2 root 275:
1.1 root 276: if (bitval[bitj] == 0) bitval[bitj] = 8;
277: /* first check whether this one does not match after all */
278: if (bitval[bitz] == 3 || bitval[bitC] == 1)
1.1.1.2 root 279: continue;
280: if (bitcnt[bitI] && (bitval[bitI] == 0x00 || bitval[bitI] == 0xff))
1.1 root 281: continue;
282:
283: /* bitI and bitC get copied to biti and bitc */
284: if (bitcnt[bitI]) {
1.1.1.2 root 285: bitval[biti] = bitval[bitI]; bitpos[biti] = bitpos[bitI];
1.1 root 286: }
1.1.1.2 root 287: if (bitcnt[bitC])
1.1 root 288: bitval[bitc] = bitval[bitC];
1.1.1.2 root 289:
1.1 root 290: pos = 0;
291: while (opcstr[pos] && !isspace(opcstr[pos])) {
292: if (opcstr[pos] == '.') {
293: pos++;
1.1.1.3 root 294: switch (opcstr[pos]) {
1.1.1.2 root 295:
1.1.1.6 root 296: case 'B': sz = sz_byte; break;
297: case 'W': sz = sz_word; break;
298: case 'L': sz = sz_long; break;
299: case 'z':
1.1.1.3 root 300: switch (bitval[bitz]) {
1.1.1.6 root 301: case 0: sz = sz_byte; break;
302: case 1: sz = sz_word; break;
303: case 2: sz = sz_long; break;
304: default: abort();
1.1 root 305: }
306: break;
1.1.1.6 root 307: default: abort();
1.1 root 308: }
1.1.1.2 root 309: } else {
1.1 root 310: mnemonic[mnp] = opcstr[pos];
1.1.1.3 root 311: if (mnemonic[mnp] == 'f') {
1.1 root 312: find = -1;
1.1.1.3 root 313: switch (bitval[bitf]) {
1.1.1.6 root 314: case 0: mnemonic[mnp] = 'R'; break;
315: case 1: mnemonic[mnp] = 'L'; break;
316: default: abort();
1.1 root 317: }
318: }
319: mnp++;
320: }
1.1.1.2 root 321: pos++;
1.1 root 322: }
323: mnemonic[mnp] = 0;
1.1.1.2 root 324:
1.1 root 325: /* now, we have read the mnemonic and the size */
1.1.1.2 root 326: while (opcstr[pos] && isspace(opcstr[pos]))
1.1 root 327: pos++;
1.1.1.2 root 328:
1.1 root 329: /* A goto a day keeps the D******a away. */
330: if (opcstr[pos] == 0)
331: goto endofline;
1.1.1.2 root 332:
1.1 root 333: /* parse the source address */
334: usesrc = 1;
1.1.1.3 root 335: switch (opcstr[pos++]) {
1.1.1.6 root 336: case 'D':
1.1 root 337: srcmode = Dreg;
338: switch (opcstr[pos++]) {
1.1.1.6 root 339: case 'r': srcreg = bitval[bitr]; srcgather = 1; srcpos = bitpos[bitr]; break;
340: case 'R': srcreg = bitval[bitR]; srcgather = 1; srcpos = bitpos[bitR]; break;
341: default: abort();
1.1 root 342: }
343: break;
1.1.1.6 root 344: case 'A':
1.1 root 345: srcmode = Areg;
346: switch (opcstr[pos++]) {
1.1.1.6 root 347: case 'r': srcreg = bitval[bitr]; srcgather = 1; srcpos = bitpos[bitr]; break;
348: case 'R': srcreg = bitval[bitR]; srcgather = 1; srcpos = bitpos[bitR]; break;
349: default: abort();
1.1 root 350: }
351: switch (opcstr[pos]) {
1.1.1.6 root 352: case 'p': srcmode = Apdi; pos++; break;
353: case 'P': srcmode = Aipi; pos++; break;
1.1 root 354: }
355: break;
1.1.1.6 root 356: case 'L':
357: srcmode = absl;
358: break;
359: case '#':
1.1.1.3 root 360: switch (opcstr[pos++]) {
1.1.1.6 root 361: case 'z': srcmode = imm; break;
362: case '0': srcmode = imm0; break;
363: case '1': srcmode = imm1; break;
364: case '2': srcmode = imm2; break;
365: case 'i': srcmode = immi; srcreg = (uae_s32)(uae_s8)bitval[biti];
1.1 root 366: if (CPU_EMU_SIZE < 4) {
367: /* Used for branch instructions */
368: srctype = 1;
1.1.1.2 root 369: srcgather = 1;
1.1 root 370: srcpos = bitpos[biti];
371: }
372: break;
1.1.1.6 root 373: case 'j': srcmode = immi; srcreg = bitval[bitj];
1.1 root 374: if (CPU_EMU_SIZE < 3) {
375: /* 1..8 for ADDQ/SUBQ and rotshi insns */
376: srcgather = 1;
377: srctype = 3;
378: srcpos = bitpos[bitj];
379: }
380: break;
1.1.1.6 root 381: case 'J': srcmode = immi; srcreg = bitval[bitJ];
1.1 root 382: if (CPU_EMU_SIZE < 5) {
383: /* 0..15 */
384: srcgather = 1;
385: srctype = 2;
386: srcpos = bitpos[bitJ];
387: }
388: break;
1.1.1.6 root 389: case 'k': srcmode = immi; srcreg = bitval[bitk];
1.1 root 390: if (CPU_EMU_SIZE < 3) {
391: srcgather = 1;
392: srctype = 4;
393: srcpos = bitpos[bitk];
394: }
395: break;
1.1.1.6 root 396: case 'K': srcmode = immi; srcreg = bitval[bitK];
1.1 root 397: if (CPU_EMU_SIZE < 5) {
398: /* 0..15 */
399: srcgather = 1;
400: srctype = 5;
401: srcpos = bitpos[bitK];
402: }
403: break;
1.1.1.6 root 404: case 'p': srcmode = immi; srcreg = bitval[bitK];
405: if (CPU_EMU_SIZE < 5) {
406: /* 0..3 */
407: srcgather = 1;
408: srctype = 7;
409: srcpos = bitpos[bitp];
410: }
411: break;
412: default: abort();
1.1 root 413: }
414: break;
1.1.1.6 root 415: case 'd':
1.1 root 416: srcreg = bitval[bitD];
417: srcmode = mode_from_mr(bitval[bitd],bitval[bitD]);
1.1.1.3 root 418: if (srcmode == am_illg)
419: continue;
1.1.1.2 root 420: if (CPU_EMU_SIZE < 2 &&
421: (srcmode == Areg || srcmode == Dreg || srcmode == Aind
1.1 root 422: || srcmode == Ad16 || srcmode == Ad8r || srcmode == Aipi
423: || srcmode == Apdi))
1.1.1.6 root 424: {
425: srcgather = 1; srcpos = bitpos[bitD];
426: }
1.1 root 427: if (opcstr[pos] == '[') {
428: pos++;
429: if (opcstr[pos] == '!') {
430: /* exclusion */
1.1.1.2 root 431: do {
1.1 root 432: pos++;
1.1.1.2 root 433: if (mode_from_str(opcstr+pos) == srcmode)
1.1 root 434: goto nomatch;
1.1.1.2 root 435: pos += 4;
1.1 root 436: } while (opcstr[pos] == ',');
437: pos++;
438: } else {
439: if (opcstr[pos+4] == '-') {
440: /* replacement */
1.1.1.2 root 441: if (mode_from_str(opcstr+pos) == srcmode)
1.1 root 442: srcmode = mode_from_str(opcstr+pos+5);
443: else
444: goto nomatch;
445: pos += 10;
446: } else {
447: /* normal */
448: while(mode_from_str(opcstr+pos) != srcmode) {
449: pos += 4;
450: if (opcstr[pos] == ']')
451: goto nomatch;
452: pos++;
453: }
454: while(opcstr[pos] != ']') pos++;
455: pos++;
456: break;
457: }
458: }
459: }
460: /* Some addressing modes are invalid as destination */
461: if (srcmode == imm || srcmode == PC16 || srcmode == PC8r)
1.1.1.2 root 462: goto nomatch;
1.1 root 463: break;
1.1.1.6 root 464: case 's':
1.1 root 465: srcreg = bitval[bitS];
466: srcmode = mode_from_mr(bitval[bits],bitval[bitS]);
1.1.1.2 root 467:
1.1.1.3 root 468: if (srcmode == am_illg)
469: continue;
1.1.1.2 root 470: if (CPU_EMU_SIZE < 2 &&
471: (srcmode == Areg || srcmode == Dreg || srcmode == Aind
1.1 root 472: || srcmode == Ad16 || srcmode == Ad8r || srcmode == Aipi
473: || srcmode == Apdi))
1.1.1.6 root 474: {
475: srcgather = 1; srcpos = bitpos[bitS];
476: }
1.1 root 477: if (opcstr[pos] == '[') {
478: pos++;
479: if (opcstr[pos] == '!') {
480: /* exclusion */
1.1.1.2 root 481: do {
1.1 root 482: pos++;
1.1.1.2 root 483: if (mode_from_str(opcstr+pos) == srcmode)
1.1 root 484: goto nomatch;
1.1.1.2 root 485: pos += 4;
1.1 root 486: } while (opcstr[pos] == ',');
487: pos++;
488: } else {
489: if (opcstr[pos+4] == '-') {
490: /* replacement */
1.1.1.2 root 491: if (mode_from_str(opcstr+pos) == srcmode)
1.1 root 492: srcmode = mode_from_str(opcstr+pos+5);
493: else
494: goto nomatch;
495: pos += 10;
496: } else {
497: /* normal */
498: while(mode_from_str(opcstr+pos) != srcmode) {
499: pos += 4;
1.1.1.2 root 500: if (opcstr[pos] == ']')
1.1 root 501: goto nomatch;
502: pos++;
503: }
504: while(opcstr[pos] != ']') pos++;
505: pos++;
506: }
507: }
508: }
509: break;
1.1.1.6 root 510: default: abort();
1.1 root 511: }
512: /* safety check - might have changed */
1.1.1.2 root 513: if (srcmode != Areg && srcmode != Dreg && srcmode != Aind
1.1 root 514: && srcmode != Ad16 && srcmode != Ad8r && srcmode != Aipi
515: && srcmode != Apdi && srcmode != immi)
1.1.1.6 root 516: {
517: srcgather = 0;
518: }
1.1 root 519: if (srcmode == Areg && sz == sz_byte)
520: goto nomatch;
1.1.1.2 root 521:
1.1 root 522: if (opcstr[pos] != ',')
523: goto endofline;
524: pos++;
1.1.1.2 root 525:
1.1 root 526: /* parse the destination address */
1.1.1.2 root 527: usedst = 1;
1.1.1.3 root 528: switch (opcstr[pos++]) {
1.1.1.6 root 529: case 'D':
1.1 root 530: destmode = Dreg;
531: switch (opcstr[pos++]) {
1.1.1.6 root 532: case 'r': destreg = bitval[bitr]; dstgather = 1; dstpos = bitpos[bitr]; break;
533: case 'R': destreg = bitval[bitR]; dstgather = 1; dstpos = bitpos[bitR]; break;
534: default: abort();
1.1 root 535: }
1.1.1.6 root 536: if (dstpos < 0 || dstpos >= 32)
537: abort ();
1.1 root 538: break;
1.1.1.6 root 539: case 'A':
1.1 root 540: destmode = Areg;
541: switch (opcstr[pos++]) {
1.1.1.6 root 542: case 'r': destreg = bitval[bitr]; dstgather = 1; dstpos = bitpos[bitr]; break;
543: case 'R': destreg = bitval[bitR]; dstgather = 1; dstpos = bitpos[bitR]; break;
544: case 'x': destreg = 0; dstgather = 0; dstpos = 0; break;
545: default: abort();
1.1 root 546: }
1.1.1.6 root 547: if (dstpos < 0 || dstpos >= 32)
548: abort ();
1.1 root 549: switch (opcstr[pos]) {
1.1.1.6 root 550: case 'p': destmode = Apdi; pos++; break;
551: case 'P': destmode = Aipi; pos++; break;
1.1 root 552: }
553: break;
1.1.1.6 root 554: case 'L':
555: destmode = absl;
556: break;
557: case '#':
1.1.1.3 root 558: switch (opcstr[pos++]) {
1.1.1.6 root 559: case 'z': destmode = imm; break;
560: case '0': destmode = imm0; break;
561: case '1': destmode = imm1; break;
562: case '2': destmode = imm2; break;
563: case 'i': destmode = immi; destreg = (uae_s32)(uae_s8)bitval[biti]; break;
564: case 'j': destmode = immi; destreg = bitval[bitj]; break;
565: case 'J': destmode = immi; destreg = bitval[bitJ]; break;
566: case 'k': destmode = immi; destreg = bitval[bitk]; break;
567: case 'K': destmode = immi; destreg = bitval[bitK]; break;
568: default: abort();
1.1 root 569: }
570: break;
1.1.1.6 root 571: case 'd':
1.1 root 572: destreg = bitval[bitD];
573: destmode = mode_from_mr(bitval[bitd],bitval[bitD]);
1.1.1.3 root 574: if (destmode == am_illg)
575: continue;
1.1.1.2 root 576: if (CPU_EMU_SIZE < 1 &&
577: (destmode == Areg || destmode == Dreg || destmode == Aind
1.1 root 578: || destmode == Ad16 || destmode == Ad8r || destmode == Aipi
579: || destmode == Apdi))
1.1.1.6 root 580: {
581: dstgather = 1; dstpos = bitpos[bitD];
582: }
1.1.1.2 root 583:
1.1 root 584: if (opcstr[pos] == '[') {
585: pos++;
586: if (opcstr[pos] == '!') {
587: /* exclusion */
1.1.1.2 root 588: do {
1.1 root 589: pos++;
1.1.1.2 root 590: if (mode_from_str(opcstr+pos) == destmode)
1.1 root 591: goto nomatch;
1.1.1.2 root 592: pos += 4;
1.1 root 593: } while (opcstr[pos] == ',');
594: pos++;
595: } else {
596: if (opcstr[pos+4] == '-') {
597: /* replacement */
1.1.1.2 root 598: if (mode_from_str(opcstr+pos) == destmode)
1.1 root 599: destmode = mode_from_str(opcstr+pos+5);
600: else
601: goto nomatch;
602: pos += 10;
603: } else {
604: /* normal */
605: while(mode_from_str(opcstr+pos) != destmode) {
606: pos += 4;
607: if (opcstr[pos] == ']')
608: goto nomatch;
609: pos++;
610: }
611: while(opcstr[pos] != ']') pos++;
612: pos++;
613: break;
614: }
615: }
616: }
617: /* Some addressing modes are invalid as destination */
618: if (destmode == imm || destmode == PC16 || destmode == PC8r)
619: goto nomatch;
620: break;
1.1.1.6 root 621: case 's':
1.1 root 622: destreg = bitval[bitS];
623: destmode = mode_from_mr(bitval[bits],bitval[bitS]);
1.1.1.2 root 624:
1.1.1.3 root 625: if (destmode == am_illg)
626: continue;
1.1.1.2 root 627: if (CPU_EMU_SIZE < 1 &&
628: (destmode == Areg || destmode == Dreg || destmode == Aind
1.1 root 629: || destmode == Ad16 || destmode == Ad8r || destmode == Aipi
630: || destmode == Apdi))
1.1.1.6 root 631: {
632: dstgather = 1; dstpos = bitpos[bitS];
633: }
1.1.1.2 root 634:
1.1 root 635: if (opcstr[pos] == '[') {
636: pos++;
637: if (opcstr[pos] == '!') {
638: /* exclusion */
1.1.1.2 root 639: do {
1.1 root 640: pos++;
641: if (mode_from_str(opcstr+pos) == destmode)
642: goto nomatch;
1.1.1.2 root 643: pos += 4;
1.1 root 644: } while (opcstr[pos] == ',');
645: pos++;
646: } else {
647: if (opcstr[pos+4] == '-') {
648: /* replacement */
1.1.1.2 root 649: if (mode_from_str(opcstr+pos) == destmode)
1.1 root 650: destmode = mode_from_str(opcstr+pos+5);
651: else
652: goto nomatch;
653: pos += 10;
654: } else {
655: /* normal */
656: while(mode_from_str(opcstr+pos) != destmode) {
657: pos += 4;
658: if (opcstr[pos] == ']')
659: goto nomatch;
660: pos++;
661: }
662: while(opcstr[pos] != ']') pos++;
663: pos++;
664: }
665: }
666: }
667: break;
1.1.1.6 root 668: default: abort();
1.1 root 669: }
670: /* safety check - might have changed */
1.1.1.2 root 671: if (destmode != Areg && destmode != Dreg && destmode != Aind
1.1 root 672: && destmode != Ad16 && destmode != Ad8r && destmode != Aipi
673: && destmode != Apdi)
1.1.1.6 root 674: {
675: dstgather = 0;
676: }
1.1.1.2 root 677:
1.1 root 678: if (destmode == Areg && sz == sz_byte)
679: goto nomatch;
680: #if 0
681: if (sz == sz_byte && (destmode == Aipi || destmode == Apdi)) {
682: dstgather = 0;
683: }
684: #endif
1.1.1.6 root 685: endofline:
1.1 root 686: /* now, we have a match */
687: if (table68k[opc].mnemo != i_ILLG)
688: fprintf(stderr, "Double match: %x: %s\n", opc, opcstr);
689: if (find == -1) {
1.1.1.3 root 690: for (find = 0;; find++) {
1.1.1.2 root 691: if (strcmp(mnemonic, lookuptab[find].name) == 0) {
1.1 root 692: table68k[opc].mnemo = lookuptab[find].mnemo;
693: break;
1.1.1.2 root 694: }
695: if (strlen(lookuptab[find].name) == 0) abort();
1.1 root 696: }
697: }
698: else {
699: table68k[opc].mnemo = lookuptab[find].mnemo;
700: }
701: table68k[opc].cc = bitval[bitc];
702: if (table68k[opc].mnemo == i_BTST
703: || table68k[opc].mnemo == i_BSET
704: || table68k[opc].mnemo == i_BCLR
1.1.1.2 root 705: || table68k[opc].mnemo == i_BCHG)
1.1.1.6 root 706: {
707: sz = destmode == Dreg ? sz_long : sz_byte;
708: }
1.1 root 709: table68k[opc].size = sz;
710: table68k[opc].sreg = srcreg;
711: table68k[opc].dreg = destreg;
712: table68k[opc].smode = srcmode;
713: table68k[opc].dmode = destmode;
714: table68k[opc].spos = srcgather ? srcpos : -1;
715: table68k[opc].dpos = dstgather ? dstpos : -1;
716: table68k[opc].suse = usesrc;
717: table68k[opc].duse = usedst;
718: table68k[opc].stype = srctype;
719: table68k[opc].plev = id.plevel;
1.1.1.2 root 720: table68k[opc].clev = id.cpulevel;
1.1 root 721: #if 0
722: for (i = 0; i < 5; i++) {
723: table68k[opc].flaginfo[i].flagset = id.flaginfo[i].flagset;
724: table68k[opc].flaginfo[i].flaguse = id.flaginfo[i].flaguse;
725: }
726: #endif
727: table68k[opc].flagdead = flagdead;
728: table68k[opc].flaglive = flaglive;
1.1.1.6 root 729: table68k[opc].isjmp = isjmp;
730: nomatch:
1.1 root 731: /* FOO! */;
732: }
733: }
734:
735:
1.1.1.3 root 736: void read_table68k (void)
1.1 root 737: {
738: int i;
739:
1.1.1.2 root 740: table68k = (struct instr *)xmalloc (65536 * sizeof (struct instr));
1.1.1.3 root 741: for (i = 0; i < 65536; i++) {
1.1 root 742: table68k[i].mnemo = i_ILLG;
743: table68k[i].handler = -1;
744: }
745: for (i = 0; i < n_defs68k; i++) {
746: build_insn (i);
747: }
748: }
749:
750: static int mismatch;
751:
1.1.1.3 root 752: static void handle_merges (long int opcode)
1.1 root 753: {
1.1.1.2 root 754: uae_u16 smsk;
755: uae_u16 dmsk;
1.1 root 756: int sbitdst, dstend;
757: int srcreg, dstreg;
1.1.1.2 root 758:
1.1 root 759: if (table68k[opcode].spos == -1) {
760: sbitdst = 1; smsk = 0;
1.1.1.2 root 761: } else {
762: switch (table68k[opcode].stype) {
763: case 0:
1.1 root 764: smsk = 7; sbitdst = 8; break;
1.1.1.2 root 765: case 1:
1.1 root 766: smsk = 255; sbitdst = 256; break;
1.1.1.2 root 767: case 2:
1.1 root 768: smsk = 15; sbitdst = 16; break;
1.1.1.2 root 769: case 3:
1.1 root 770: smsk = 7; sbitdst = 8; break;
1.1.1.2 root 771: case 4:
1.1 root 772: smsk = 7; sbitdst = 8; break;
1.1.1.2 root 773: case 5:
1.1 root 774: smsk = 63; sbitdst = 64; break;
1.1.1.6 root 775: case 7:
776: smsk = 3; sbitdst = 4; break;
1.1.1.2 root 777: default:
1.1 root 778: smsk = 0; sbitdst = 0;
779: abort();
780: break;
1.1.1.2 root 781: }
782: smsk <<= table68k[opcode].spos;
1.1 root 783: }
784: if (table68k[opcode].dpos == -1) {
785: dstend = 1; dmsk = 0;
1.1.1.2 root 786: } else {
787: dmsk = 7 << table68k[opcode].dpos;
1.1 root 788: dstend = 8;
789: }
790: for (srcreg=0; srcreg < sbitdst; srcreg++) {
791: for (dstreg=0; dstreg < dstend; dstreg++) {
1.1.1.2 root 792: uae_u16 code = opcode;
1.1 root 793:
794: code = (code & ~smsk) | (srcreg << table68k[opcode].spos);
1.1.1.2 root 795: code = (code & ~dmsk) | (dstreg << table68k[opcode].dpos);
796:
1.1 root 797: /* Check whether this is in fact the same instruction.
798: * The instructions should never differ, except for the
799: * Bcc.(BW) case. */
800: if (table68k[code].mnemo != table68k[opcode].mnemo
801: || table68k[code].size != table68k[opcode].size
802: || table68k[code].suse != table68k[opcode].suse
1.1.1.2 root 803: || table68k[code].duse != table68k[opcode].duse)
1.1 root 804: {
805: mismatch++; continue;
806: }
1.1.1.2 root 807: if (table68k[opcode].suse
1.1 root 808: && (table68k[opcode].spos != table68k[code].spos
809: || table68k[opcode].smode != table68k[code].smode
810: || table68k[opcode].stype != table68k[code].stype))
811: {
812: mismatch++; continue;
813: }
1.1.1.2 root 814: if (table68k[opcode].duse
1.1 root 815: && (table68k[opcode].dpos != table68k[code].dpos
816: || table68k[opcode].dmode != table68k[code].dmode))
817: {
818: mismatch++; continue;
819: }
1.1.1.2 root 820:
1.1 root 821: if (code != opcode)
822: table68k[code].handler = opcode;
823: }
824: }
825: }
826:
1.1.1.3 root 827: void do_merges (void)
1.1 root 828: {
829: long int opcode;
1.1.1.2 root 830: int nr = 0;
1.1 root 831: mismatch = 0;
832: for (opcode = 0; opcode < 65536; opcode++) {
833: if (table68k[opcode].handler != -1 || table68k[opcode].mnemo == i_ILLG)
834: continue;
1.1.1.2 root 835: nr++;
1.1 root 836: handle_merges (opcode);
837: }
1.1.1.2 root 838: nr_cpuop_funcs = nr;
1.1 root 839: }
840:
1.1.1.3 root 841: int get_no_mismatches (void)
1.1 root 842: {
843: return mismatch;
844: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.