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Annotation of xinu/h/dtc86.h, revision 1.1.1.1

1.1       root        1: /* dtc86.h */
                      2: 
                      3: /* Digital Technology Corp. DTC-86 disk controller host interface */
                      4: 
                      5: /*==============================================================================
                      6:  * The following is the structure for the dtc controller interface registers.
                      7:  *     You may notice that the bytes have been swapped.  This is due to the
                      8:  *     way the 68000 does byte transfers.  See the User's Manual for details.
                      9:  *==============================================================================
                     10:  */
                     11: 
                     12: struct dtc     {                       /* controller interface regs.   */
                     13:        char    dt_ccsr;                /* command completion status    */
                     14:        char    dt_csr;                 /* control and status register  */
                     15:        char    dt_darm;                /*      dar middle              */
                     16:        char    dt_darl;                /* data address register - low  */
                     17:        char    dt_carm;                /*      car middle              */
                     18:        char    dt_carl;                /* command address register low */
                     19:        char    dt_carh;                /* car high                     */
                     20:        char    dt_darh;                /* dar high                     */
                     21: };
                     22: 
                     23: /* bits in the dtc csr register */
                     24: 
                     25: #define        DTGO    0x00                    /* device start command         */
                     26: #define        DTINTR  0x01                    /* enable interface interrupt   */
                     27: #define        DTDONE  0x80                    /* command done                 */
                     28: #define        DTERROR 0x02                    /* some error occurred          */
                     29: #define        DTRESET 0x04                    /* reset the interface board    */
                     30: 
                     31: #define lbyte(value)   (char)(  ((long)value )       & (0xff))
                     32: #define mbyte(value)   (char)( (((long)value ) >>8)  & (0xff))
                     33: #define hbyte(value)   (char)( (((long)value ) >>16) & (0xff))

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