Annotation of xinu/h/slu7201.h, revision 1.1.1.1

1.1       root        1: /* slu7201.h--only used for ATT7300, since MECB has no such SLU */
                      2: /* The NEC7201 is a dual UART, used for console on ATT7300 because of
                      3:    its programmable baudrates as defined below */
                      4: 
                      5: /* console is channel A: #define SLUCSR1 (struct csr *)0xe50000  */
                      6: /* channel B: #define SLUCSR2 (struct csr *)0xe50002 */
                      7: 
                      8: /* magic addrs to write to to select baud rate for console SLU1-- */
                      9: #define SLUSELECT38400 ((char *)0x4b0001)
                     10: #define SLUSELECT19200 ((char *)0x4b0002)
                     11: #define SLUSELECT9600 ((char *)0x4b0004)
                     12: #define SLUSELECT4800 ((char *)0x4b0008)
                     13: #define SLUSELECT2400 ((char *)0x4b0010)
                     14: #define SLUSELECT1200 ((char *)0x4b0020)
                     15: 
                     16: /* control/status regs--write reg # to cstat, then read or write stat/cmd */
                     17: /* valid when current reg = 0, the base state we stay in most of the time-- */
                     18: #define SLUREGMASK     0x7             /* bits for reg # for next access */
                     19: #define SLURESET      (3<<3)            /* reg 0 cmd to reset chip */
                     20: /* control reg defaults-- program reg2, then reg 4, then others */
                     21: /* reread data sheet before trying to use channel B */
                     22: #define SLUCREG1DEF   0              /* no ints */
                     23: #define SLUTRANSIE    (1<<1)         /* trans int ena */
                     24: #define SLURECVIE     (2<<3)         /* recv int on ea char recvd */
                     25: #define SLUINTBITS    (0x3<<3|SLUTRANSIE) /* 2bits receiver, 1 bit xmit int */
                     26: #define SLUCREG2DEF   0              /* non-DMA, nonvect ints, etc. */
                     27: #define SLUCREG3DEF   (0xc1)         /* 8 bits on recv, recv ena, inactive cts*/
                     28: #define SLUCREG4DEF   (0x44)          /* 16x clock,async,1stopbit,no par.*/
                     29: #define SLUCREG5DEF    0x68          /* 8 bits,no brk,trans ena,rts lev,no crc*/
                     30: #define SLUCREG5DTR    (1<<7)         /* 1 here makes DTR* low (asserted) */
                     31: /* status reg 0 */
                     32: #define        SLUTRANSREADY   (1<<2)          /* device ready bit             */
                     33: #define SLURECVREADY   (1<<0)          /* receiver ready bit */
                     34: #define SLUASCII7BITS   0177           /* mask for 7 bits of ASCII char,
                     35:                                          to mask off parity bit */
                     36: #define SLUCHMASK      0x7f             /* 7 ASCII bits */
                     37: 
                     38: struct csr     {
                     39:        unsigned short cbuf;    /* write for transmit, read for input */
                     40:        short dummy;            /* skip other reg in between */
                     41:        unsigned short cstat;   /* read for status, write for control reg */
                     42: };
                     43: 

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