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1.1 root 1: /* sluaccess7201.h */
2: /* assumes inclusion of slu7201.h */
3: /* The specific chip is the NEC7201A dual UART */
4:
5: /* get/set_control_reg7201 and slu_init7201 are in the SA and Xinu libraries.
6: get/set_control_reg7201 provide an effectively-readable UART control
7: register set even though the hardware SLU, a NEC 7201A,
8: has 5 write-only control regs. They simply maintain a copy of the bits
9: put into the control reg in a private memory location and supply them
10: via get_control_reg. Naturally, this system only works if all accesses
11: to the hardware control reg. go through this package. */
12:
13: #define sluinitcsr(ioaddr) slu_init7201(ioaddr)
14: #define slutransready(ioaddr) ((ioaddr->cstat)&SLUTRANSREADY)
15: #define slurecvready(ioaddr) ((ioaddr->cstat)&SLURECVREADY)
16: #define slugetch(ioaddr) (((ioaddr)->cbuf)&SLUCHMASK)
17: #define sluputch(ioaddr, ch) ((ioaddr)->cbuf = (ch))
18: #define slurenable(ioaddr) set_control_reg7201(ioaddr,get_control_reg7201(ioaddr,1)|SLURECVIE,1)
19: #define slurdisable(ioaddr) set_control_reg7201(ioaddr,get_control_reg7201(ioaddr,1)&~SLURECVIE,1)
20: /* reenable trans ints if nec, start output with null-- */
21: #define slutenable(ioaddr) slu_tstart7201(ioaddr)
22: #define slutdisable(ioaddr) set_control_reg7201(ioaddr,get_control_reg7201(ioaddr,1)&(~SLUTRANSIE),1)
23: /* unimplemented-- */
24: #define slusetbrk(ioaddr)
25: #define slurstbrk(ioaddr)
26: #define slugetintstate(ioaddr) get_control_reg7201(ioaddr,1)&SLUINTBITS
27: #define slusetintstate(ioaddr,oldstate) set_control_reg7201(ioaddr,oldstate| \
28: (get_control_reg7201(ioaddr,1)&~SLUINTBITS),1)
29:
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