All symbols starting with `d' in machdep/i386

• DATA machdep/i386/asm.h:85
• data16 machdep/i386/asm.h:67
• data3 machdep/i386/pmon_ipc.h:62
• data32 machdep/i386/bios_asm.s:35
• dbf_handler machdep/i386/dbl_fault.c:79
• dbf_init machdep/i386/dbl_fault.c:53
• dbf_stack machdep/i386/dbl_fault.c:48
• DBF_STACK_SIZE machdep/i386/dbl_fault.c:47
• dbf_state machdep/i386/dbl_fault.c:46
• dbf_tss machdep/i386/dbl_fault.c:45
• DBLFLT_SEL machdep/i386/seg.h:140
• DDM_DEBUG machdep/i386/xpr.h:53
• defer_table machdep/i386/intr.c:58
• DEFINE_INLINE_FUNCTIONS machdep/i386/io_prim.c:36
• DEFINE_SPL machdep/i386/intr.c:284
• DEFINE_SPLNOP machdep/i386/intr.c:292
• disable_cache machdep/i386/cpu_inline.h:229
• disabled_irq_mask machdep/i386/intr.c:61
• dispatch_table machdep/i386/intr.c:56
• Divide machdep/i386/asm.h:60
• DMA2_CHAN0_ADDR_PORT machdep/i386/dma.h:191
• DMA2_CHAN0_COUNT_PORT machdep/i386/dma.h:192
• DMA2_CHAN1_ADDR_PORT machdep/i386/dma.h:193
• DMA2_CHAN1_COUNT_PORT machdep/i386/dma.h:194
• DMA2_CHAN1_HICOUNT_PORT machdep/i386/dma.h:205
• DMA2_CHAN1_HIPAGE_PORT machdep/i386/dma.h:210
• DMA2_CHAN1_PAGE_PORT machdep/i386/dma.h:200
• DMA2_CHAN2_ADDR_PORT machdep/i386/dma.h:195
• DMA2_CHAN2_COUNT_PORT machdep/i386/dma.h:196
• DMA2_CHAN2_HICOUNT_PORT machdep/i386/dma.h:206
• DMA2_CHAN2_HIPAGE_PORT machdep/i386/dma.h:211
• DMA2_CHAN2_PAGE_PORT machdep/i386/dma.h:201
• DMA2_CHAN3_ADDR_PORT machdep/i386/dma.h:197
• DMA2_CHAN3_COUNT_PORT machdep/i386/dma.h:198
• DMA2_CHAN3_HICOUNT_PORT machdep/i386/dma.c:78
• DMA2_CHAN3_HIPAGE_PORT machdep/i386/dma.h:212
• DMA2_CHAN3_PAGE_PORT machdep/i386/dma.h:202
• DMA2_CLEAR_FF_PORT machdep/i386/dma.h:218
• DMA2_CMD_STATUS_PORT machdep/i386/dma.h:214
• DMA2_EXTEND_MODE_PORT machdep/i386/dma.c:87
• DMA2_MASK_PORT machdep/i386/dma.h:216
• DMA2_MASTER_RESET_PORT machdep/i386/dma.h:219
• DMA2_MODE_PORT machdep/i386/dma.h:217
• DMA2_REQ_PORT machdep/i386/dma.h:215
• DMA_ADRS_DECR machdep/i386/dma.h:73
• DMA_ADRS_INCR machdep/i386/dma.h:72
• dma_assign_chan machdep/i386/dma.c:174
• dma_assigned_bits machdep/i386/dma.c:89
• dma_buf_alloc machdep/i386/dma_buf.c:81
• dma_buf_free machdep/i386/dma_buf.c:121
• dma_buf_initialize machdep/i386/dma_buf.c:48
• dma_buf_lg machdep/i386/dma_buf.c:41
• dma_buf_lg_create machdep/i386/dma_buf.c:165
• DMA_BUF_LG_LEN machdep/i386/dma_exported.h:42
• dma_buf_region_t machdep/i386/dma_buf_internal.h:39
• dma_buf_sm machdep/i386/dma_buf.c:41
• dma_buf_sm_create machdep/i386/dma_buf.c:148
• DMA_BUF_SM_LEN machdep/i386/dma_exported.h:41
• dma_buf_t machdep/i386/dma_exported.h:47
• dma_buf_type_t machdep/i386/dma_buf_internal.h:46
• DMA_CASCADE_CHAN machdep/i386/dma_internal.h:42
• DMA_CHAN0_ADDR_PORT machdep/i386/dma.h:154
• DMA_CHAN0_COUNT_PORT machdep/i386/dma.h:155
• DMA_CHAN0_HICOUNT_PORT machdep/i386/dma.h:169
• DMA_CHAN0_HIPAGE_PORT machdep/i386/dma.h:175
• DMA_CHAN0_PAGE_PORT machdep/i386/dma.h:163
• DMA_CHAN0_SEL machdep/i386/dma.h:62
• DMA_CHAN1_ADDR_PORT machdep/i386/dma.h:156
• DMA_CHAN1_COUNT_PORT machdep/i386/dma.h:157
• DMA_CHAN1_HICOUNT_PORT machdep/i386/dma.h:170
• DMA_CHAN1_HIPAGE_PORT machdep/i386/dma.h:176
• DMA_CHAN1_PAGE_PORT machdep/i386/dma.h:164
• DMA_CHAN1_SEL machdep/i386/dma.h:63
• DMA_CHAN2_ADDR_PORT machdep/i386/dma.h:158
• DMA_CHAN2_COUNT_PORT machdep/i386/dma.h:159
• DMA_CHAN2_HICOUNT_PORT machdep/i386/dma.h:171
• DMA_CHAN2_HIPAGE_PORT machdep/i386/dma.h:177
• DMA_CHAN2_PAGE_PORT machdep/i386/dma.h:165
• DMA_CHAN2_SEL machdep/i386/dma.h:64
• DMA_CHAN3_ADDR_PORT machdep/i386/dma.h:160
• DMA_CHAN3_COUNT_PORT machdep/i386/dma.h:161
• DMA_CHAN3_HICOUNT_PORT machdep/i386/dma.h:172
• DMA_CHAN3_HIPAGE_PORT machdep/i386/dma.h:178
• DMA_CHAN3_PAGE_PORT machdep/i386/dma.h:166
• DMA_CHAN3_SEL machdep/i386/dma.h:65
• dma_chan_adrs_dir machdep/i386/dma.c:264
• dma_chan_autoinit machdep/i386/dma.c:248
• DMA_CHAN_IS_ASSIGNED machdep/i386/dma_internal.h:69
• _dma_chan_port machdep/i386/dma_internal.h:44
• dma_chan_xfer_dir machdep/i386/dma.c:280
• dma_chan_xfer_mode machdep/i386/dma.c:229
• dma_chip_disable machdep/i386/dma_inline.h:119
• dma_chip_enable machdep/i386/dma_inline.h:105
• _dma_chip_port machdep/i386/dma_internal.h:55
• DMA_CLEAR_FF_PORT machdep/i386/dma.h:184
• dma_cmd_regs machdep/i386/dma.c:91
• dma_cmd_reg_t machdep/i386/dma.h:54
• DMA_CMD_STATUS_PORT machdep/i386/dma.h:180
• DMA_DACK_ACT_HIGH machdep/i386/dma.h:53
• DMA_DACK_ACT_LOW machdep/i386/dma.h:52
• dma_deassign_chan machdep/i386/dma.c:187
• DMA_DEBUG machdep/i386/dma_inline.h:47
• DMA_DELAY machdep/i386/dma_inline.h:58
• DMA_DREQ_ACT_HIGH machdep/i386/dma.h:49
• DMA_DREQ_ACT_LOW machdep/i386/dma.h:50
• DMA_EOP_IN machdep/i386/dma.h:140
• DMA_EOP_OUT machdep/i386/dma.h:139
• DMA_EXTEND_MODE_PORT machdep/i386/dma.h:186
• dma_extend_mode_reg_t machdep/i386/dma.h:145
• dma_init_extend_mode machdep/i386/dma.c:147
• dma_initialize machdep/i386/dma.c:106
• dma_mask_chan machdep/i386/dma.c:197
• DMA_MASK_CLEAR machdep/i386/dma.h:100
• DMA_MASK_PORT machdep/i386/dma.h:182
• dma_mask_reg_t machdep/i386/dma.h:103
• DMA_MASK_SET machdep/i386/dma.h:101
• dma_master_reset machdep/i386/dma_inline.h:64
• DMA_MASTER_RESET_PORT machdep/i386/dma.h:185
• DMA_MODE_BLOCK machdep/i386/dma.h:77
• DMA_MODE_CASCADE machdep/i386/dma.h:78
• DMA_MODE_DEMAND machdep/i386/dma.h:75
• DMA_MODE_PORT machdep/i386/dma.h:183
• dma_mode_reg_t machdep/i386/dma.h:79
• DMA_MODE_SINGLE machdep/i386/dma.h:76
• DMA_NCHAN machdep/i386/dma_internal.h:40
• DMA_NCHIPS machdep/i386/dma_internal.h:41
• DMA_PRIO_FIXED machdep/i386/dma.h:45
• DMA_PRIO_ROTATING machdep/i386/dma.h:46
• DMA_REQ_PORT machdep/i386/dma.h:181
• dma_req_reg_t machdep/i386/dma.h:91
• DMA_REQ_RESET machdep/i386/dma.h:88
• DMA_REQ_SET machdep/i386/dma.h:89
• dma_set_chan_addr machdep/i386/dma_inline.h:201
• dma_set_chan_count machdep/i386/dma_inline.h:265
• dma_set_chan_extend_mode machdep/i386/dma_inline.h:179
• dma_set_chan_mask machdep/i386/dma_inline.h:136
• dma_set_chan_mode machdep/i386/dma_inline.h:157
• dma_set_cmd machdep/i386/dma_inline.h:79
• dma_status_reg_t machdep/i386/dma.h:118
• DMA_STOP_DISABLE machdep/i386/dma.h:142
• DMA_STOP_ENABLE machdep/i386/dma.h:143
• dma_timing machdep/i386/dma.c:470
• DMA_TIMING_A machdep/i386/dma.h:134
• DMA_TIMING_B machdep/i386/dma.h:135
• DMA_TIMING_BURST machdep/i386/dma.h:136
• DMA_TIMING_COMPAT machdep/i386/dma.h:133
• dma_unmask_chan machdep/i386/dma.c:213
• dma_write_regs machdep/i386/dma.c:90
• dma_xfer machdep/i386/dma.c:360
• dma_xfer_abort machdep/i386/dma.c:423
• dma_xfer_chan machdep/i386/dma.c:299
• dma_xfer_done machdep/i386/dma.c:398
• DMA_XFER_READ machdep/i386/dma.h:69
• dma_xfer_t machdep/i386/dma_exported.h:61
• DMA_XFER_VERIFY machdep/i386/dma.h:67
• dma_xfer_width machdep/i386/dma.c:439
• DMA_XFER_WRITE machdep/i386/dma.h:68
• DMA_XFR_16_BIT_BYTE machdep/i386/dma.h:130
• DMA_XFR_16_BIT_WORD machdep/i386/dma.h:128
• DMA_XFR_32_BIT machdep/i386/dma.h:129
• DMA_XFR_8_BIT machdep/i386/dma.h:127
• dmmax machdep/i386/swapgeneric.m:98
• dmmin machdep/i386/swapgeneric.m:98
• dmtext machdep/i386/swapgeneric.m:98
• domainname machdep/i386/swapgeneric.m:87
• dprintf machdep/i386/dma_inline.h:50
• dr6 machdep/i386/cpu_inline.h:249
• dumplo machdep/i386/swapgeneric.m:97