Source to iokit/Drivers/audio/drvPPCDACA/PPCI2CInterface.h
/*
* Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 1.1 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright (c) 1998 Apple Computer, Inc. All rights reserved.
*
* Interface definition for the keylargo I2C interface
*
* HISTORY
*
*/
#ifndef _PPCI2CINTERFACE_H
#define _PPCI2CINTERFACE_H
#include <IOKit/IOTypes.h>
#include <IOKit/IOLib.h>
class PPCI2CInterface
{
// Add here the default constructors
private:
// These are the possible states the driver can be in:
typedef enum {
ki2cStateIdle = 0,
ki2cStateWaitingForIADDR,
ki2cStateWaitingForIDATA,
ki2cStateWaitingForISTOP,
ki2cStateWaitingForISTART,
} PPCI2CState;
// Constansts for the mode register:
typedef enum {
kDumbMode = 0x00, //
kStandardMode = 0x01, //
kStandardSubMode = 0x02, //
kCombinedMode = 0x03, //
kModeMask = 0x03 //
} I2CMode;
typedef enum {
k100KhzMode = 0x00, //
k50KhzMode = 0x01, //
k25KhzMode = 0x02, //
kReservedMode = 0x03, //
kSpeedMask = 0x03 //
} I2CSpeed;
enum {
I2CModeShift = 2
};
enum {
I2CSpeedShift = 0
};
// Constants for the Control register
typedef enum {
kClrCNTRL = 0x00, // 0 -> Clears all the control bits
kAakCNTRL = 0x01, // 1 -> AAK sent, 0 -> not AAK sent
kXAddrCNTRL = 0x02, // when set -> transmit address phase (not used by manual mode)
kStopCNTRL = 0x04, // when set -> transmit stop condition
kStartCNTRL = 0x08, // when set -> transmit start condition (manual mode only)
kCNTRLMask = 0x0F // Masks all the control bits
} I2CControl;
enum {
I2CControlShift = 0
};
// Constants for the STATUS register
typedef enum {
kBusySTATUS = 0x01, // 1 -> busy
kLastAakSTATUS = 0x02, // value of last AAK bit
kLastReadWriteSTATUS = 0x04, // value of last R/W bit transmitted
kIsdaSTATUS = 0x08, // data line SDA
kSclSTATUS = 0x10, // clock line SCL
kSTATUSMask = 0x1F // Mask all the status bits
} I2CStatus;
enum {
I2CStatusShift = 0
};
// Constants for the ISR register
typedef enum {
kIDataISR = 0x01, // Data Byte Sent or Received Interrupt
kIAddrISR = 0x02, // Address Phase Sent Interrupt
kIStopISR = 0x04, // Stop Condition Sent Interrupt
kIStartISR = 0x08, // Start Condition Sent Interrupt
kISRMask = 0x0F
} I2CInterruptStatus;
enum {
I2CInterruptStatusShift = 0
};
// Constants for the IER register
typedef enum {
kEDataIER = 0x01, // Enable Data Byte Sent or Received Interrupt
kEAddrIER = 0x02, // Enable AAddress Phase Sent Interrupt
kEStopIER = 0x04, // Enable Stop Condition Sent Interrupt
kEStartIER = 0x08, // Enable Start Condition Sent Interrupt
kIERMask = 0x0F
} I2CInterruptEnable;
enum {
I2CInterruptEnableShift = 0
};
// Constants for the Address register
enum I2CAddress {
kADDRMask = 0x7F //
};
typedef enum {
kWriteADDR = 0x00, //
kReadADDR = 0x01, //
kRWMask = 0x01 //
} I2CRWMode;
enum {
I2CAddressShift = 1
};
enum {
I2CRWShift = 0
};
// redefine the types so it makes easyer to handle
// new i2c if they have wider registers.
typedef UInt8 *I2CRegister;